sse.md (reduc_plus_scal_v4df): Avoid the use of haddv4df...
2018-10-02 Richard Biener <rguenther@suse.de> * config/i386/sse.md (reduc_plus_scal_v4df): Avoid the use of haddv4df, first reduce to SSE width and exploit the fact that we only need element zero with the reduction result. (reduc_plus_scal_v2df): Likewise. From-SVN: r264785
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2018-10-02 Richard Biener <rguenther@suse.de>
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* config/i386/sse.md (reduc_plus_scal_v4df): Avoid the use
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of haddv4df, first reduce to SSE width and exploit the fact
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that we only need element zero with the reduction result.
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(reduc_plus_scal_v2df): Likewise.
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2018-10-02 Eric Botcazou <ebotcazou@adacore.com>
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* dojump.h (do_jump): Delete.
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@ -2473,24 +2473,28 @@
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(match_operand:V4DF 1 "register_operand")]
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"TARGET_AVX"
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{
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rtx tmp = gen_reg_rtx (V4DFmode);
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rtx tmp2 = gen_reg_rtx (V4DFmode);
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rtx vec_res = gen_reg_rtx (V4DFmode);
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emit_insn (gen_avx_haddv4df3 (tmp, operands[1], operands[1]));
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emit_insn (gen_avx_vperm2f128v4df3 (tmp2, tmp, tmp, GEN_INT (1)));
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emit_insn (gen_addv4df3 (vec_res, tmp, tmp2));
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emit_insn (gen_vec_extractv4dfdf (operands[0], vec_res, const0_rtx));
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rtx tmp = gen_reg_rtx (V2DFmode);
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emit_insn (gen_vec_extract_hi_v4df (tmp, operands[1]));
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rtx tmp2 = gen_reg_rtx (V2DFmode);
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emit_insn (gen_addv2df3 (tmp2, tmp, gen_lowpart (V2DFmode, operands[1])));
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rtx tmp3 = gen_reg_rtx (V2DFmode);
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emit_insn (gen_vec_interleave_highv2df (tmp3, tmp2, tmp2));
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emit_insn (gen_adddf3 (operands[0],
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gen_lowpart (DFmode, tmp2),
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gen_lowpart (DFmode, tmp3)));
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DONE;
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})
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(define_expand "reduc_plus_scal_v2df"
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[(match_operand:DF 0 "register_operand")
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(match_operand:V2DF 1 "register_operand")]
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"TARGET_SSE3"
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"TARGET_SSE2"
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{
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rtx tmp = gen_reg_rtx (V2DFmode);
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emit_insn (gen_sse3_haddv2df3 (tmp, operands[1], operands[1]));
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emit_insn (gen_vec_extractv2dfdf (operands[0], tmp, const0_rtx));
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emit_insn (gen_vec_interleave_highv2df (tmp, operands[1], operands[1]));
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emit_insn (gen_adddf3 (operands[0],
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gen_lowpart (DFmode, tmp),
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gen_lowpart (DFmode, operands[1])));
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DONE;
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})
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