Various scheduling strengthenings
gcc/ 2014-08-26 David Malcolm <dmalcolm@redhat.com> * sched-int.h (sched_init_insn_luid): Strengthen param 1 from rtx to rtx_insn *. (struct reg_use_data): Likewise for field "insn". (insn_cost): Likewise for param. (real_insn_for_shadow): Likewise for return type and param. (increase_insn_priority): Likewise for param 1. (debug_dependencies): Likewise for both params. * haifa-sched.c (insn_delay): Likewise for param "insn". (real_insn_for_shadow): Likewise for return type and param "insn". (update_insn_after_change): Likewise for param "insn". (recompute_todo_spec): Likewise for param "next" and locals "pro", "other". (insn_cost): Likewise for param "insn". (increase_insn_priority): Likewise. (calculate_reg_deaths): Likewise. (setup_insn_reg_pressure_info): Likewise. (model_schedule): Strengthen from vec<rtx> to vec<rtx_insn *>. (model_index): Strengthen param "insn" from rtx to rtx_insn *. (model_recompute): Likewise. (must_restore_pattern_p): Likewise for param "next". (model_excess_cost): Likewise for param "insn". (queue_remove): Likewise. (adjust_priority): Likewise for param "prev". (update_register_pressure): Likewise for param "insn". (setup_insn_max_reg_pressure): Likewise for local "insn". (update_reg_and_insn_max_reg_pressure): Likewise for param "insn". (model_add_to_schedule): Likewise. (model_reset_queue_indices): Likewise for local "insn". (unschedule_insns_until): Strengthen local "recompute_vec" from auto_vec<rtx> to auto_vec<rtx_insn *>. Strengthen locals "last", "con" from rtx to rtx_insn *. (restore_last_backtrack_point): Likewise for both locals "x". Add checked casts. (estimate_insn_tick): Likewise for param "insn". (commit_schedule): Likewise for params "prev_head", "tail" and local "x". (verify_shadows): Likewise for locals "i1", "i2". (dump_insn_stream): Likewise for params "head", "tail" and locals "next_tail", "insn". (schedule_block): Likewise for locals "insn", "x". Add a checked cast. (fix_inter_tick): Likewise for params "head", "tail". (create_check_block_twin): Likewise for local "jump". (haifa_change_pattern): Likewise for param "insn". (haifa_speculate_insn): Likewise. (dump_new_block_header): Likewise for params "head", "tail". (fix_jump_move): Likewise for param "jump". (move_block_after_check): Likewise. (sched_init_insn_luid): Likewise for param "insn". (sched_init_luids): Likewise for local "insn". (insn_luid): Likewise for param "insn". (init_h_i_d): Likewise. (haifa_init_h_i_d): Likewise for local "insn". (haifa_init_insn): Likewise for param "insn". * sched-deps.c (add_dependence): Likewise for local "real_pro", "other". (create_insn_reg_use): Likewise for param "insn". (setup_insn_reg_uses): Likewise. Add a checked cast. * sched-ebb.c (debug_ebb_dependencies): Strengthen params "head", "tail" from rtx to rtx_insn *. * sched-rgn.c (void debug_dependencies): Likewise, also for locals "insn", "next_tail". From-SVN: r214547
This commit is contained in:
David Malcolm
David Malcolm
parent
40a243d452
commit
f57aa6b04a
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@ -1,3 +1,69 @@
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2014-08-26 David Malcolm <dmalcolm@redhat.com>
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* sched-int.h (sched_init_insn_luid): Strengthen param 1 from rtx
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to rtx_insn *.
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(struct reg_use_data): Likewise for field "insn".
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(insn_cost): Likewise for param.
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(real_insn_for_shadow): Likewise for return type and param.
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(increase_insn_priority): Likewise for param 1.
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(debug_dependencies): Likewise for both params.
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* haifa-sched.c (insn_delay): Likewise for param "insn".
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(real_insn_for_shadow): Likewise for return type and param "insn".
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(update_insn_after_change): Likewise for param "insn".
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(recompute_todo_spec): Likewise for param "next" and locals "pro",
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"other".
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(insn_cost): Likewise for param "insn".
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(increase_insn_priority): Likewise.
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(calculate_reg_deaths): Likewise.
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(setup_insn_reg_pressure_info): Likewise.
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(model_schedule): Strengthen from vec<rtx> to vec<rtx_insn *>.
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(model_index): Strengthen param "insn" from rtx to rtx_insn *.
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(model_recompute): Likewise.
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(must_restore_pattern_p): Likewise for param "next".
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(model_excess_cost): Likewise for param "insn".
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(queue_remove): Likewise.
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(adjust_priority): Likewise for param "prev".
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(update_register_pressure): Likewise for param "insn".
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(setup_insn_max_reg_pressure): Likewise for local "insn".
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(update_reg_and_insn_max_reg_pressure): Likewise for param "insn".
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(model_add_to_schedule): Likewise.
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(model_reset_queue_indices): Likewise for local "insn".
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(unschedule_insns_until): Strengthen local "recompute_vec" from
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auto_vec<rtx> to auto_vec<rtx_insn *>. Strengthen locals "last",
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"con" from rtx to rtx_insn *.
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(restore_last_backtrack_point): Likewise for both locals "x". Add
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checked casts.
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(estimate_insn_tick): Likewise for param "insn".
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(commit_schedule): Likewise for params "prev_head", "tail" and
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local "x".
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(verify_shadows): Likewise for locals "i1", "i2".
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(dump_insn_stream): Likewise for params "head", "tail" and locals
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"next_tail", "insn".
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(schedule_block): Likewise for locals "insn", "x". Add a checked
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cast.
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(fix_inter_tick): Likewise for params "head", "tail".
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(create_check_block_twin): Likewise for local "jump".
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(haifa_change_pattern): Likewise for param "insn".
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(haifa_speculate_insn): Likewise.
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(dump_new_block_header): Likewise for params "head", "tail".
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(fix_jump_move): Likewise for param "jump".
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(move_block_after_check): Likewise.
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(sched_init_insn_luid): Likewise for param "insn".
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(sched_init_luids): Likewise for local "insn".
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(insn_luid): Likewise for param "insn".
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(init_h_i_d): Likewise.
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(haifa_init_h_i_d): Likewise for local "insn".
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(haifa_init_insn): Likewise for param "insn".
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* sched-deps.c (add_dependence): Likewise for local "real_pro",
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"other".
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(create_insn_reg_use): Likewise for param "insn".
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(setup_insn_reg_uses): Likewise. Add a checked cast.
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* sched-ebb.c (debug_ebb_dependencies): Strengthen params "head",
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"tail" from rtx to rtx_insn *.
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* sched-rgn.c (void debug_dependencies): Likewise, also for locals
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"insn", "next_tail".
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2014-08-26 David Malcolm <dmalcolm@redhat.com>
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* haifa-sched.c (struct model_insn_info): Strengthen field "insn"
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@ -419,7 +419,7 @@ basic_block (* sched_create_empty_bb) (basic_block);
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/* Return the number of cycles until INSN is expected to be ready.
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Return zero if it already is. */
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static int
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insn_delay (rtx insn)
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insn_delay (rtx_insn *insn)
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{
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return MAX (INSN_TICK (insn) - clock_var, 0);
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}
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@ -750,17 +750,17 @@ record_delay_slot_pair (rtx_insn *i1, rtx_insn *i2, int cycles, int stages)
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/* Examine the delay pair hashtable to see if INSN is a shadow for another,
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and return the other insn if so. Return NULL otherwise. */
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rtx
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real_insn_for_shadow (rtx insn)
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rtx_insn *
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real_insn_for_shadow (rtx_insn *insn)
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{
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struct delay_pair *pair;
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if (!delay_htab)
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return NULL_RTX;
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return NULL;
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pair = delay_htab_i2->find_with_hash (insn, htab_hash_pointer (insn));
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if (!pair || pair->stages > 0)
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return NULL_RTX;
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return NULL;
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return pair->i1;
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}
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@ -831,7 +831,7 @@ static int rank_for_schedule (const void *, const void *);
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static void swap_sort (rtx_insn **, int);
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static void queue_insn (rtx_insn *, int, const char *);
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static int schedule_insn (rtx_insn *);
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static void adjust_priority (rtx);
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static void adjust_priority (rtx_insn *);
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static void advance_one_cycle (void);
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static void extend_h_i_d (void);
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@ -864,7 +864,7 @@ static int early_queue_to_ready (state_t, struct ready_list *);
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static rtx_insn *ready_remove (struct ready_list *, int);
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static void ready_remove_insn (rtx);
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static void fix_inter_tick (rtx, rtx);
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static void fix_inter_tick (rtx_insn *, rtx_insn *);
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static int fix_tick_ready (rtx_insn *);
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static void change_queue_index (rtx_insn *, int);
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@ -872,8 +872,8 @@ static void change_queue_index (rtx_insn *, int);
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speculative instructions. */
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static void extend_h_i_d (void);
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static void init_h_i_d (rtx);
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static int haifa_speculate_insn (rtx, ds_t, rtx *);
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static void init_h_i_d (rtx_insn *);
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static int haifa_speculate_insn (rtx_insn *, ds_t, rtx *);
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static void generate_recovery_code (rtx_insn *);
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static void process_insn_forw_deps_be_in_spec (rtx, rtx_insn *, ds_t);
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static void begin_speculative_block (rtx_insn *);
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@ -881,11 +881,11 @@ static void add_to_speculative_block (rtx_insn *);
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static void init_before_recovery (basic_block *);
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static void create_check_block_twin (rtx_insn *, bool);
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static void fix_recovery_deps (basic_block);
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static bool haifa_change_pattern (rtx, rtx);
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static void dump_new_block_header (int, basic_block, rtx, rtx);
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static bool haifa_change_pattern (rtx_insn *, rtx);
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static void dump_new_block_header (int, basic_block, rtx_insn *, rtx_insn *);
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static void restore_bb_notes (basic_block);
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static void fix_jump_move (rtx);
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static void move_block_after_check (rtx);
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static void fix_jump_move (rtx_insn *);
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static void move_block_after_check (rtx_insn *);
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static void move_succs (vec<edge, va_gc> **, basic_block);
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static void sched_remove_insn (rtx_insn *);
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static void clear_priorities (rtx_insn *, rtx_vec_t *);
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@ -1144,7 +1144,7 @@ cond_clobbered_p (rtx_insn *insn, HARD_REG_SET set_regs)
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/* This function should be called after modifying the pattern of INSN,
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to update scheduler data structures as needed. */
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static void
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update_insn_after_change (rtx insn)
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update_insn_after_change (rtx_insn *insn)
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{
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sd_iterator_def sd_it;
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dep_t dep;
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@ -1184,7 +1184,7 @@ static void restore_pattern (dep_t, bool);
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false. */
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static ds_t
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recompute_todo_spec (rtx next, bool for_backtrack)
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recompute_todo_spec (rtx_insn *next, bool for_backtrack)
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{
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ds_t new_ds;
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sd_iterator_def sd_it;
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@ -1268,7 +1268,8 @@ recompute_todo_spec (rtx next, bool for_backtrack)
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else if (n_control == 1 && n_replace == 0 && n_spec == 0)
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{
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rtx pro, other, new_pat;
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rtx_insn *pro, *other;
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rtx new_pat;
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rtx cond = NULL_RTX;
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bool success;
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rtx_insn *prev = NULL;
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@ -1365,7 +1366,7 @@ static rtx_insn *nonscheduled_insns_begin;
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This is the number of cycles between instruction issue and
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instruction results. */
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int
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insn_cost (rtx insn)
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insn_cost (rtx_insn *insn)
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{
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int cost;
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@ -1509,7 +1510,7 @@ dep_cost (dep_t link)
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/* Use this sel-sched.c friendly function in reorder2 instead of increasing
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INSN_PRIORITY explicitly. */
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void
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increase_insn_priority (rtx insn, int amount)
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increase_insn_priority (rtx_insn *insn, int amount)
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{
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if (!sel_sched_p ())
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{
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@ -1687,7 +1688,7 @@ priority (rtx_insn *insn)
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in that class that die in INSN. */
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static void
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calculate_reg_deaths (rtx insn, int *death)
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calculate_reg_deaths (rtx_insn *insn, int *death)
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{
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int i;
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struct reg_use_data *use;
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@ -1702,7 +1703,7 @@ calculate_reg_deaths (rtx insn, int *death)
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/* Setup info about the current register pressure impact of scheduling
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INSN at the current scheduling point. */
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static void
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setup_insn_reg_pressure_info (rtx insn)
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setup_insn_reg_pressure_info (rtx_insn *insn)
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{
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int i, change, before, after, hard_regno;
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int excess_cost_change;
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@ -1876,7 +1877,7 @@ struct model_pressure_group {
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/* Index POINT gives the instruction at point POINT of the model schedule.
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This array doesn't change during main scheduling. */
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static vec<rtx> model_schedule;
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static vec<rtx_insn *> model_schedule;
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/* The list of instructions in the model worklist, sorted in order of
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decreasing priority. */
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@ -1927,7 +1928,7 @@ static unsigned int model_next_priority;
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doesn't belong to that schedule. */
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static int
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model_index (rtx insn)
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model_index (rtx_insn *insn)
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{
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if (INSN_MODEL_INDEX (insn) == 0)
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return model_num_insns;
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@ -2096,7 +2097,7 @@ model_update_pressure (struct model_pressure_group *group,
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/* INSN has just been scheduled. Update the model schedule accordingly. */
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static void
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model_recompute (rtx insn)
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model_recompute (rtx_insn *insn)
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{
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struct {
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int last_use;
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@ -2229,7 +2230,7 @@ model_recompute (rtx insn)
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/* After DEP, which was cancelled, has been resolved for insn NEXT,
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check whether the insn's pattern needs restoring. */
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static bool
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must_restore_pattern_p (rtx next, dep_t dep)
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must_restore_pattern_p (rtx_insn *next, dep_t dep)
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{
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if (QUEUE_INDEX (next) == QUEUE_SCHEDULED)
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return false;
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@ -2405,7 +2406,7 @@ model_excess_group_cost (struct model_pressure_group *group,
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if PRINT_P. */
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static int
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model_excess_cost (rtx insn, bool print_p)
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model_excess_cost (rtx_insn *insn, bool print_p)
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{
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int point, pci, cl, cost, this_cost, delta;
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struct reg_pressure_data *insn_reg_pressure;
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@ -2781,7 +2782,7 @@ queue_insn (rtx_insn *insn, int n_cycles, const char *reason)
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/* Remove INSN from queue. */
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static void
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queue_remove (rtx insn)
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queue_remove (rtx_insn *insn)
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{
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gcc_assert (QUEUE_INDEX (insn) >= 0);
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remove_free_INSN_LIST_elem (insn, &insn_queue[QUEUE_INDEX (insn)]);
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@ -2981,7 +2982,7 @@ ready_sort (struct ready_list *ready)
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provide a hook for the target to tweak itself. */
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HAIFA_INLINE static void
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adjust_priority (rtx prev)
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adjust_priority (rtx_insn *prev)
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{
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/* ??? There used to be code here to try and estimate how an insn
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affected register lifetimes, but it did it by looking at REG_DEAD
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@ -3027,7 +3028,7 @@ advance_one_cycle (void)
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/* Update register pressure after scheduling INSN. */
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static void
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update_register_pressure (rtx insn)
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update_register_pressure (rtx_insn *insn)
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{
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struct reg_use_data *use;
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struct reg_set_data *set;
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@ -3051,7 +3052,7 @@ setup_insn_max_reg_pressure (rtx after, bool update_p)
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{
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int i, p;
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bool eq_p;
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rtx insn;
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rtx_insn *insn;
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static int max_reg_pressure[N_REG_CLASSES];
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save_reg_pressure ();
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@ -3091,7 +3092,7 @@ setup_insn_max_reg_pressure (rtx after, bool update_p)
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also max register pressure for unscheduled insns of the current
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BB. */
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static void
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update_reg_and_insn_max_reg_pressure (rtx insn)
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update_reg_and_insn_max_reg_pressure (rtx_insn *insn)
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{
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int i;
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int before[N_REG_CLASSES];
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@ -3332,7 +3333,7 @@ model_promote_insn (struct model_insn_info *insn)
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/* Add INSN to the end of the model schedule. */
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static void
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model_add_to_schedule (rtx insn)
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model_add_to_schedule (rtx_insn *insn)
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{
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unsigned int point;
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@ -3692,7 +3693,7 @@ static void
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model_reset_queue_indices (void)
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{
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unsigned int i;
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rtx insn;
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rtx_insn *insn;
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FOR_EACH_VEC_ELT (model_schedule, i, insn)
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QUEUE_INDEX (insn) = MODEL_INSN_INFO (insn)->old_queue;
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@ -4279,13 +4280,13 @@ undo_replacements_for_backtrack (struct haifa_saved_data *save)
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static void
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unschedule_insns_until (rtx insn)
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{
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auto_vec<rtx> recompute_vec;
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auto_vec<rtx_insn *> recompute_vec;
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/* Make two passes over the insns to be unscheduled. First, we clear out
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dependencies and other trivial bookkeeping. */
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for (;;)
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{
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rtx last;
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rtx_insn *last;
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sd_iterator_def sd_it;
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dep_t dep;
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@ -4323,7 +4324,7 @@ unschedule_insns_until (rtx insn)
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up-to-date. */
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while (!recompute_vec.is_empty ())
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{
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rtx con;
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rtx_insn *con;
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con = recompute_vec.pop ();
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MUST_RECOMPUTE_SPEC_P (con) = 0;
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@ -4384,7 +4385,7 @@ restore_last_backtrack_point (struct sched_block_state *psched_block)
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|||
|
||||
for (link = insn_queue[q]; link; link = XEXP (link, 1))
|
||||
{
|
||||
rtx x = XEXP (link, 0);
|
||||
rtx_insn *x = as_a <rtx_insn *> (XEXP (link, 0));
|
||||
QUEUE_INDEX (x) = QUEUE_NOWHERE;
|
||||
INSN_TICK (x) = INVALID_TICK;
|
||||
}
|
||||
|
|
@ -4416,7 +4417,7 @@ restore_last_backtrack_point (struct sched_block_state *psched_block)
|
|||
|
||||
for (link = insn_queue[q]; link; link = XEXP (link, 1))
|
||||
{
|
||||
rtx x = XEXP (link, 0);
|
||||
rtx_insn *x = as_a <rtx_insn *> (XEXP (link, 0));
|
||||
QUEUE_INDEX (x) = i;
|
||||
TODO_SPEC (x) = recompute_todo_spec (x, true);
|
||||
INSN_TICK (x) = save->clock_var + i;
|
||||
|
|
@ -4625,7 +4626,7 @@ perform_replacements_new_cycle (void)
|
|||
reduced on recursive calls. Return true if we produced a good
|
||||
estimate, or false if we exceeded the budget. */
|
||||
static bool
|
||||
estimate_insn_tick (bitmap processed, rtx insn, int budget)
|
||||
estimate_insn_tick (bitmap processed, rtx_insn *insn, int budget)
|
||||
{
|
||||
sd_iterator_def sd_it;
|
||||
dep_t dep;
|
||||
|
|
@ -5709,7 +5710,7 @@ choose_ready (struct ready_list *ready, bool first_cycle_insn_p,
|
|||
block. TARGET_BB is the argument passed to schedule_block. */
|
||||
|
||||
static void
|
||||
commit_schedule (rtx_insn *prev_head, rtx tail, basic_block *target_bb)
|
||||
commit_schedule (rtx_insn *prev_head, rtx_insn *tail, basic_block *target_bb)
|
||||
{
|
||||
unsigned int i;
|
||||
rtx_insn *insn;
|
||||
|
|
@ -5726,7 +5727,7 @@ commit_schedule (rtx_insn *prev_head, rtx tail, basic_block *target_bb)
|
|||
|
||||
if (sched_verbose)
|
||||
{
|
||||
rtx x;
|
||||
rtx_insn *x;
|
||||
|
||||
x = next_real_insn (last_scheduled_insn);
|
||||
gcc_assert (x);
|
||||
|
|
@ -5885,11 +5886,11 @@ verify_shadows (void)
|
|||
{
|
||||
int t;
|
||||
struct delay_pair *pair = save->delay_pair;
|
||||
rtx i1 = pair->i1;
|
||||
rtx_insn *i1 = pair->i1;
|
||||
|
||||
for (; pair; pair = pair->next_same_i1)
|
||||
{
|
||||
rtx i2 = pair->i2;
|
||||
rtx_insn *i2 = pair->i2;
|
||||
|
||||
if (QUEUE_INDEX (i2) == QUEUE_SCHEDULED)
|
||||
continue;
|
||||
|
|
@ -5931,12 +5932,12 @@ verify_shadows (void)
|
|||
/* Print instructions together with useful scheduling information between
|
||||
HEAD and TAIL (inclusive). */
|
||||
static void
|
||||
dump_insn_stream (rtx head, rtx tail)
|
||||
dump_insn_stream (rtx_insn *head, rtx_insn *tail)
|
||||
{
|
||||
fprintf (sched_dump, ";;\t| insn | prio |\n");
|
||||
|
||||
rtx next_tail = NEXT_INSN (tail);
|
||||
for (rtx insn = head; insn != next_tail; insn = NEXT_INSN (insn))
|
||||
rtx_insn *next_tail = NEXT_INSN (tail);
|
||||
for (rtx_insn *insn = head; insn != next_tail; insn = NEXT_INSN (insn))
|
||||
{
|
||||
int priority = NOTE_P (insn) ? 0 : INSN_PRIORITY (insn);
|
||||
const char *pattern = (NOTE_P (insn)
|
||||
|
|
@ -6417,7 +6418,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
|
|||
if (!must_backtrack)
|
||||
for (i = 0; i < ready.n_ready; i++)
|
||||
{
|
||||
rtx insn = ready_element (&ready, i);
|
||||
rtx_insn *insn = ready_element (&ready, i);
|
||||
if (INSN_EXACT_TICK (insn) == clock_var)
|
||||
{
|
||||
must_backtrack = true;
|
||||
|
|
@ -6482,7 +6483,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
|
|||
restart_debug_insn_loop:
|
||||
for (i = ready.n_ready - 1; i >= 0; i--)
|
||||
{
|
||||
rtx x;
|
||||
rtx_insn *x;
|
||||
|
||||
x = ready_element (&ready, i);
|
||||
if (DEPS_LIST_FIRST (INSN_HARD_BACK_DEPS (x)) != NULL
|
||||
|
|
@ -6532,7 +6533,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
|
|||
/* We must maintain QUEUE_INDEX between blocks in region. */
|
||||
for (i = ready.n_ready - 1; i >= 0; i--)
|
||||
{
|
||||
rtx x;
|
||||
rtx_insn *x;
|
||||
|
||||
x = ready_element (&ready, i);
|
||||
QUEUE_INDEX (x) = QUEUE_NOWHERE;
|
||||
|
|
@ -6545,9 +6546,9 @@ schedule_block (basic_block *target_bb, state_t init_state)
|
|||
rtx link;
|
||||
for (link = insn_queue[i]; link; link = XEXP (link, 1))
|
||||
{
|
||||
rtx x;
|
||||
rtx_insn *x;
|
||||
|
||||
x = XEXP (link, 0);
|
||||
x = as_a <rtx_insn *> (XEXP (link, 0));
|
||||
QUEUE_INDEX (x) = QUEUE_NOWHERE;
|
||||
TODO_SPEC (x) = HARD_DEP;
|
||||
}
|
||||
|
|
@ -6946,7 +6947,7 @@ free_delay_pairs (void)
|
|||
INSN_TICKs of their dependents.
|
||||
HEAD and TAIL are the begin and the end of the current scheduled block. */
|
||||
static void
|
||||
fix_inter_tick (rtx head, rtx tail)
|
||||
fix_inter_tick (rtx_insn *head, rtx_insn *tail)
|
||||
{
|
||||
/* Set of instructions with corrected INSN_TICK. */
|
||||
bitmap_head processed;
|
||||
|
|
@ -7413,7 +7414,7 @@ begin_speculative_block (rtx_insn *insn)
|
|||
TODO_SPEC (insn) &= ~BEGIN_SPEC;
|
||||
}
|
||||
|
||||
static void haifa_init_insn (rtx);
|
||||
static void haifa_init_insn (rtx_insn *);
|
||||
|
||||
/* Generates recovery code for BE_IN speculative INSN. */
|
||||
static void
|
||||
|
|
@ -7899,7 +7900,7 @@ create_check_block_twin (rtx_insn *insn, bool mutate_p)
|
|||
/* In case of branchy check, fix CFG. */
|
||||
{
|
||||
basic_block first_bb, second_bb;
|
||||
rtx jump;
|
||||
rtx_insn *jump;
|
||||
|
||||
first_bb = BLOCK_FOR_INSN (check);
|
||||
second_bb = sched_split_block (first_bb, check);
|
||||
|
|
@ -8127,7 +8128,7 @@ fix_recovery_deps (basic_block rec)
|
|||
/* Change pattern of INSN to NEW_PAT. Invalidate cached haifa
|
||||
instruction data. */
|
||||
static bool
|
||||
haifa_change_pattern (rtx insn, rtx new_pat)
|
||||
haifa_change_pattern (rtx_insn *insn, rtx new_pat)
|
||||
{
|
||||
int t;
|
||||
|
||||
|
|
@ -8161,7 +8162,7 @@ sched_speculate_insn (rtx insn, ds_t request, rtx *new_pat)
|
|||
}
|
||||
|
||||
static int
|
||||
haifa_speculate_insn (rtx insn, ds_t request, rtx *new_pat)
|
||||
haifa_speculate_insn (rtx_insn *insn, ds_t request, rtx *new_pat)
|
||||
{
|
||||
gcc_assert (sched_deps_info->generate_spec_deps
|
||||
&& !IS_SPECULATION_CHECK_P (insn));
|
||||
|
|
@ -8177,7 +8178,7 @@ haifa_speculate_insn (rtx insn, ds_t request, rtx *new_pat)
|
|||
ends with TAIL, before scheduling it.
|
||||
I is zero, if scheduler is about to start with the fresh ebb. */
|
||||
static void
|
||||
dump_new_block_header (int i, basic_block bb, rtx head, rtx tail)
|
||||
dump_new_block_header (int i, basic_block bb, rtx_insn *head, rtx_insn *tail)
|
||||
{
|
||||
if (!i)
|
||||
fprintf (sched_dump,
|
||||
|
|
@ -8288,7 +8289,7 @@ restore_bb_notes (basic_block first)
|
|||
Fix CFG after both in- and inter-block movement of
|
||||
control_flow_insn_p JUMP. */
|
||||
static void
|
||||
fix_jump_move (rtx jump)
|
||||
fix_jump_move (rtx_insn *jump)
|
||||
{
|
||||
basic_block bb, jump_bb, jump_bb_next;
|
||||
|
||||
|
|
@ -8319,7 +8320,7 @@ fix_jump_move (rtx jump)
|
|||
|
||||
/* Fix CFG after interblock movement of control_flow_insn_p JUMP. */
|
||||
static void
|
||||
move_block_after_check (rtx jump)
|
||||
move_block_after_check (rtx_insn *jump)
|
||||
{
|
||||
basic_block bb, jump_bb, jump_bb_next;
|
||||
vec<edge, va_gc> *t;
|
||||
|
|
@ -8461,7 +8462,7 @@ sched_extend_luids (void)
|
|||
|
||||
/* Initialize LUID for INSN. */
|
||||
void
|
||||
sched_init_insn_luid (rtx insn)
|
||||
sched_init_insn_luid (rtx_insn *insn)
|
||||
{
|
||||
int i = INSN_P (insn) ? 1 : common_sched_info->luid_for_non_insn (insn);
|
||||
int luid;
|
||||
|
|
@ -8489,7 +8490,7 @@ sched_init_luids (bb_vec_t bbs)
|
|||
sched_extend_luids ();
|
||||
FOR_EACH_VEC_ELT (bbs, i, bb)
|
||||
{
|
||||
rtx insn;
|
||||
rtx_insn *insn;
|
||||
|
||||
FOR_BB_INSNS (bb, insn)
|
||||
sched_init_insn_luid (insn);
|
||||
|
|
@ -8506,7 +8507,7 @@ sched_finish_luids (void)
|
|||
|
||||
/* Return logical uid of INSN. Helpful while debugging. */
|
||||
int
|
||||
insn_luid (rtx insn)
|
||||
insn_luid (rtx_insn *insn)
|
||||
{
|
||||
return INSN_LUID (insn);
|
||||
}
|
||||
|
|
@ -8536,7 +8537,7 @@ extend_h_i_d (void)
|
|||
/* Initialize h_i_d entry of the INSN with default values.
|
||||
Values, that are not explicitly initialized here, hold zero. */
|
||||
static void
|
||||
init_h_i_d (rtx insn)
|
||||
init_h_i_d (rtx_insn *insn)
|
||||
{
|
||||
if (INSN_LUID (insn) > 0)
|
||||
{
|
||||
|
|
@ -8559,7 +8560,7 @@ haifa_init_h_i_d (bb_vec_t bbs)
|
|||
extend_h_i_d ();
|
||||
FOR_EACH_VEC_ELT (bbs, i, bb)
|
||||
{
|
||||
rtx insn;
|
||||
rtx_insn *insn;
|
||||
|
||||
FOR_BB_INSNS (bb, insn)
|
||||
init_h_i_d (insn);
|
||||
|
|
@ -8589,7 +8590,7 @@ haifa_finish_h_i_d (void)
|
|||
|
||||
/* Init data for the new insn INSN. */
|
||||
static void
|
||||
haifa_init_insn (rtx insn)
|
||||
haifa_init_insn (rtx_insn *insn)
|
||||
{
|
||||
gcc_assert (insn != NULL);
|
||||
|
||||
|
|
|
|||
|
|
@ -1524,8 +1524,8 @@ add_dependence (rtx_insn *con, rtx_insn *pro, enum reg_note dep_type)
|
|||
condition. */
|
||||
if (dep_type == REG_DEP_CONTROL)
|
||||
{
|
||||
rtx real_pro = pro;
|
||||
rtx other = real_insn_for_shadow (real_pro);
|
||||
rtx_insn *real_pro = pro;
|
||||
rtx_insn *other = real_insn_for_shadow (real_pro);
|
||||
rtx cond;
|
||||
|
||||
if (other != NULL_RTX)
|
||||
|
|
@ -1926,7 +1926,7 @@ ds_to_dt (ds_t ds)
|
|||
|
||||
/* Allocate and return reg_use_data structure for REGNO and INSN. */
|
||||
static struct reg_use_data *
|
||||
create_insn_reg_use (int regno, rtx insn)
|
||||
create_insn_reg_use (int regno, rtx_insn *insn)
|
||||
{
|
||||
struct reg_use_data *use;
|
||||
|
||||
|
|
@ -1953,7 +1953,7 @@ create_insn_reg_set (int regno, rtx insn)
|
|||
|
||||
/* Set up insn register uses for INSN and dependency context DEPS. */
|
||||
static void
|
||||
setup_insn_reg_uses (struct deps_desc *deps, rtx insn)
|
||||
setup_insn_reg_uses (struct deps_desc *deps, rtx_insn *insn)
|
||||
{
|
||||
unsigned i;
|
||||
reg_set_iterator rsi;
|
||||
|
|
@ -1980,7 +1980,7 @@ setup_insn_reg_uses (struct deps_desc *deps, rtx insn)
|
|||
/* Create the cycle list of uses. */
|
||||
for (list = reg_last->uses; list; list = XEXP (list, 1))
|
||||
{
|
||||
use2 = create_insn_reg_use (i, XEXP (list, 0));
|
||||
use2 = create_insn_reg_use (i, as_a <rtx_insn *> (XEXP (list, 0)));
|
||||
next = use->next_regno_use;
|
||||
use->next_regno_use = use2;
|
||||
use2->next_regno_use = next;
|
||||
|
|
|
|||
|
|
@ -62,7 +62,7 @@ static int rank (rtx_insn *, rtx_insn *);
|
|||
static int ebb_contributes_to_priority (rtx_insn *, rtx_insn *);
|
||||
static basic_block earliest_block_with_similiar_load (basic_block, rtx);
|
||||
static void add_deps_for_risky_insns (rtx_insn *, rtx_insn *);
|
||||
static void debug_ebb_dependencies (rtx, rtx);
|
||||
static void debug_ebb_dependencies (rtx_insn *, rtx_insn *);
|
||||
|
||||
static void ebb_add_remove_insn (rtx_insn *, int);
|
||||
static void ebb_add_block (basic_block, basic_block);
|
||||
|
|
@ -98,7 +98,7 @@ schedule_more_p (void)
|
|||
|
||||
/* Print dependency information about ebb between HEAD and TAIL. */
|
||||
static void
|
||||
debug_ebb_dependencies (rtx head, rtx tail)
|
||||
debug_ebb_dependencies (rtx_insn *head, rtx_insn *tail)
|
||||
{
|
||||
fprintf (sched_dump,
|
||||
";; --------------- forward dependences: ------------ \n");
|
||||
|
|
|
|||
|
|
@ -47,7 +47,7 @@ typedef vec<rtx_insn *> rtx_vec_t;
|
|||
extern void sched_init_bbs (void);
|
||||
|
||||
extern void sched_extend_luids (void);
|
||||
extern void sched_init_insn_luid (rtx);
|
||||
extern void sched_init_insn_luid (rtx_insn *);
|
||||
extern void sched_init_luids (bb_vec_t);
|
||||
extern void sched_finish_luids (void);
|
||||
|
||||
|
|
@ -774,7 +774,7 @@ struct reg_use_data
|
|||
/* Regno used in the insn. */
|
||||
int regno;
|
||||
/* Insn using the regno. */
|
||||
rtx insn;
|
||||
rtx_insn *insn;
|
||||
/* Cyclic list of elements with the same regno. */
|
||||
struct reg_use_data *next_regno_use;
|
||||
/* List of elements with the same insn. */
|
||||
|
|
@ -1344,7 +1344,7 @@ extern void get_ebb_head_tail (basic_block, basic_block,
|
|||
rtx_insn **, rtx_insn **);
|
||||
extern int no_real_insns_p (const_rtx, const_rtx);
|
||||
|
||||
extern int insn_cost (rtx);
|
||||
extern int insn_cost (rtx_insn *);
|
||||
extern int dep_cost_1 (dep_t, dw_t);
|
||||
extern int dep_cost (dep_t);
|
||||
extern int set_priorities (rtx_insn *, rtx_insn *);
|
||||
|
|
@ -1430,7 +1430,7 @@ extern bool sched_no_dce;
|
|||
|
||||
extern void set_modulo_params (int, int, int, int);
|
||||
extern void record_delay_slot_pair (rtx_insn *, rtx_insn *, int, int);
|
||||
extern rtx real_insn_for_shadow (rtx);
|
||||
extern rtx_insn *real_insn_for_shadow (rtx_insn *);
|
||||
extern void discard_delay_pairs_above (int);
|
||||
extern void free_delay_pairs (void);
|
||||
extern void add_delay_dependencies (rtx_insn *);
|
||||
|
|
@ -1446,9 +1446,9 @@ extern void extend_regions (void);
|
|||
extern void rgn_make_new_region_out_of_new_block (basic_block);
|
||||
|
||||
extern void compute_priorities (void);
|
||||
extern void increase_insn_priority (rtx, int);
|
||||
extern void increase_insn_priority (rtx_insn *, int);
|
||||
extern void debug_rgn_dependencies (int);
|
||||
extern void debug_dependencies (rtx, rtx);
|
||||
extern void debug_dependencies (rtx_insn *, rtx_insn *);
|
||||
extern void free_rgn_deps (void);
|
||||
extern int contributes_to_priority (rtx_insn *, rtx_insn *);
|
||||
extern void extend_rgns (int *, int *, sbitmap, int *);
|
||||
|
|
|
|||
|
|
@ -2806,10 +2806,10 @@ debug_rgn_dependencies (int from_bb)
|
|||
|
||||
/* Print dependencies information for instructions between HEAD and TAIL.
|
||||
??? This function would probably fit best in haifa-sched.c. */
|
||||
void debug_dependencies (rtx head, rtx tail)
|
||||
void debug_dependencies (rtx_insn *head, rtx_insn *tail)
|
||||
{
|
||||
rtx insn;
|
||||
rtx next_tail = NEXT_INSN (tail);
|
||||
rtx_insn *insn;
|
||||
rtx_insn *next_tail = NEXT_INSN (tail);
|
||||
|
||||
fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n",
|
||||
"insn", "code", "bb", "dep", "prio", "cost",
|
||||
|
|
|
|||
Loading…
Reference in New Issue