From f5bdba44f05bbdb1e50842f7012b7aee701a0b5b Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 25 Apr 2003 14:02:25 -0700 Subject: [PATCH] ia64.c (ia64_compute_frame_size): Allow inline asm to clobber ar.pfs and ar.unat. * config/ia64/ia64.c (ia64_compute_frame_size): Allow inline asm to clobber ar.pfs and ar.unat. (ia64_expand_prologue): Force alloc instruction if ar.pfs saved; fix test for spilling ar.pfs to the stack. From-SVN: r66074 --- gcc/ChangeLog | 9 ++++++++- gcc/config/ia64/ia64.c | 24 +++++++++++++++++++----- 2 files changed, 27 insertions(+), 6 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2c378a824be..db9496f0ade 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,11 @@ -2003-04-25 Richard Henderson +2003-04-25 Richard Henderson + + * config/ia64/ia64.c (ia64_compute_frame_size): Allow inline asm + to clobber ar.pfs and ar.unat. + (ia64_expand_prologue): Force alloc instruction if ar.pfs saved; + fix test for spilling ar.pfs to the stack. + +2003-04-25 Richard Henderson PR opt/10315 * config/rs6000/rs6000.c (rs6000_emit_move): Only elide proper diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index 7eb3d2aed1f..3fb27dd50d0 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -1878,6 +1878,17 @@ ia64_compute_frame_size (size) spill_size += 8; n_spilled += 1; } + + if (regs_ever_live[AR_PFS_REGNUM]) + { + SET_HARD_REG_BIT (mask, AR_PFS_REGNUM); + current_frame_info.reg_save_ar_pfs = find_gr_spill (1); + if (current_frame_info.reg_save_ar_pfs == 0) + { + extra_spill_size += 8; + n_spilled += 1; + } + } } /* Unwind descriptor hackery: things are most efficient if we allocate @@ -1916,8 +1927,10 @@ ia64_compute_frame_size (size) } /* If we're forced to use st8.spill, we're forced to save and restore - ar.unat as well. */ - if (spilled_gr_p || cfun->machine->n_varargs) + ar.unat as well. The check for existing liveness allows inline asm + to touch ar.unat. */ + if (spilled_gr_p || cfun->machine->n_varargs + || regs_ever_live[AR_UNAT_REGNUM]) { regs_ever_live[AR_UNAT_REGNUM] = 1; SET_HARD_REG_BIT (mask, AR_UNAT_REGNUM); @@ -2378,7 +2391,8 @@ ia64_expand_prologue () /* We don't need an alloc instruction if we've used no outputs or locals. */ if (current_frame_info.n_local_regs == 0 && current_frame_info.n_output_regs == 0 - && current_frame_info.n_input_regs <= current_function_args_info.int_regs) + && current_frame_info.n_input_regs <= current_function_args_info.int_regs + && !TEST_HARD_REG_BIT (current_frame_info.mask, AR_PFS_REGNUM)) { /* If there is no alloc, but there are input registers used, then we need a .regstk directive. */ @@ -2540,8 +2554,8 @@ ia64_expand_prologue () /* The alloc insn already copied ar.pfs into a general register. The only thing we have to do now is copy that register to a stack slot if we'd not allocated a local register for the job. */ - if (current_frame_info.reg_save_ar_pfs == 0 - && ! current_function_is_leaf) + if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_PFS_REGNUM) + && current_frame_info.reg_save_ar_pfs == 0) { reg = gen_rtx_REG (DImode, AR_PFS_REGNUM); do_spill (gen_movdi_x, ar_pfs_save_reg, cfa_off, reg);