re PR target/49313 (Inefficient libgcc implementations for avr)
PR target/49313 Undo r176835 from trunk 2011-07-27 Georg-Johann Lay From-SVN: r176865
This commit is contained in:
Georg-Johann Lay
Georg-Johann Lay
parent
c35c943f68
commit
f627fef27a
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@ -1,3 +1,9 @@
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2011-07-28 Georg-Johann Lay <avr@gjlay.de>
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PR target/49313
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Undo r176835 from trunk
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2011-07-27 Georg-Johann Lay
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2011-07-28 Georg-Johann Lay <avr@gjlay.de>
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PR target/49687
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@ -55,7 +55,6 @@
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UNSPEC_FMUL
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UNSPEC_FMULS
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UNSPEC_FMULSU
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UNSPEC_COPYSIGN
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])
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(define_c_enum "unspecv"
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@ -3942,275 +3941,6 @@
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[(set_attr "length" "9")
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(set_attr "cc" "clobber")])
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;; Parity
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(define_expand "parityhi2"
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[(set (reg:HI 24)
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(match_operand:HI 1 "register_operand" ""))
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(set (reg:HI 24)
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(parity:HI (reg:HI 24)))
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(set (match_operand:HI 0 "register_operand" "")
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(reg:HI 24))]
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""
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"")
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(define_expand "paritysi2"
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[(set (reg:SI 22)
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(match_operand:SI 1 "register_operand" ""))
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(set (reg:HI 24)
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(parity:HI (reg:SI 22)))
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(set (match_operand:SI 0 "register_operand" "")
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(zero_extend:SI (reg:HI 24)))]
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""
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"")
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(define_insn "*parityhi2.libgcc"
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[(set (reg:HI 24)
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(parity:HI (reg:HI 24)))]
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""
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"%~call __parityhi2"
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[(set_attr "type" "xcall")
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(set_attr "cc" "clobber")])
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(define_insn "*parityqihi2.libgcc"
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[(set (reg:HI 24)
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(parity:HI (reg:QI 24)))]
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""
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"%~call __parityqi2"
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[(set_attr "type" "xcall")
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(set_attr "cc" "clobber")])
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(define_insn "*paritysihi2.libgcc"
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[(set (reg:HI 24)
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(parity:HI (reg:SI 22)))]
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""
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"%~call __paritysi2"
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[(set_attr "type" "xcall")
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(set_attr "cc" "clobber")])
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;; Popcount
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(define_expand "popcounthi2"
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[(set (reg:HI 24)
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(match_operand:HI 1 "register_operand" ""))
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(set (reg:HI 24)
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(popcount:HI (reg:HI 24)))
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(set (match_operand:HI 0 "register_operand" "")
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(reg:HI 24))]
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""
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"")
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(define_expand "popcountsi2"
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[(set (reg:SI 22)
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(match_operand:SI 1 "register_operand" ""))
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(set (reg:HI 24)
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(popcount:HI (reg:SI 22)))
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(set (match_operand:SI 0 "register_operand" "")
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(zero_extend:SI (reg:HI 24)))]
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""
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"")
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(define_insn "*popcounthi2.libgcc"
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[(set (reg:HI 24)
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(popcount:HI (reg:HI 24)))]
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""
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"%~call __popcounthi2"
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[(set_attr "type" "xcall")
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(set_attr "cc" "clobber")])
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(define_insn "*popcountsi2.libgcc"
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[(set (reg:HI 24)
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(popcount:HI (reg:SI 22)))]
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""
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"%~call __popcountsi2"
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[(set_attr "type" "xcall")
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(set_attr "cc" "clobber")])
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(define_insn "*popcountqi2.libgcc"
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[(set (reg:QI 24)
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(popcount:QI (reg:QI 24)))]
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""
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"%~call __popcountqi2"
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[(set_attr "type" "xcall")
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(set_attr "cc" "clobber")])
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(define_insn_and_split "*popcountqihi2.libgcc"
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[(set (reg:HI 24)
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(popcount:HI (reg:QI 24)))]
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""
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"#"
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""
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[(set (reg:QI 24)
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(popcount:QI (reg:QI 24)))
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(set (reg:QI 25)
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(const_int 0))]
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"")
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;; Count Leading Zeros
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(define_expand "clzhi2"
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[(set (reg:HI 24)
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(match_operand:HI 1 "register_operand" ""))
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(parallel [(set (reg:HI 24)
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(clz:HI (reg:HI 24)))
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(clobber (reg:QI 26))])
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(set (match_operand:HI 0 "register_operand" "")
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(reg:HI 24))]
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""
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"")
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(define_expand "clzsi2"
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[(set (reg:SI 22)
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(match_operand:SI 1 "register_operand" ""))
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(parallel [(set (reg:HI 24)
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(clz:HI (reg:SI 22)))
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(clobber (reg:QI 26))])
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(set (match_operand:SI 0 "register_operand" "")
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(zero_extend:SI (reg:HI 24)))]
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""
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"")
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(define_insn "*clzhi2.libgcc"
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[(parallel [(set (reg:HI 24)
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(clz:HI (reg:HI 24)))
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(clobber (reg:QI 26))])]
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""
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"%~call __clzhi2"
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[(set_attr "type" "xcall")
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(set_attr "cc" "clobber")])
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(define_insn "*clzsihi2.libgcc"
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[(parallel [(set (reg:HI 24)
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(clz:HI (reg:SI 22)))
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(clobber (reg:QI 26))])]
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""
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"%~call __clzsi2"
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[(set_attr "type" "xcall")
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(set_attr "cc" "clobber")])
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;; Count Trailing Zeros
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(define_expand "ctzhi2"
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[(set (reg:HI 24)
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(match_operand:HI 1 "register_operand" ""))
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(parallel [(set (reg:HI 24)
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(ctz:HI (reg:HI 24)))
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(clobber (reg:QI 26))])
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(set (match_operand:HI 0 "register_operand" "")
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(reg:HI 24))]
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""
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"")
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(define_expand "ctzsi2"
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[(set (reg:SI 22)
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(match_operand:SI 1 "register_operand" ""))
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(parallel [(set (reg:HI 24)
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(ctz:HI (reg:SI 22)))
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(clobber (reg:QI 22))
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(clobber (reg:QI 26))])
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(set (match_operand:SI 0 "register_operand" "")
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(zero_extend:SI (reg:HI 24)))]
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""
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"")
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(define_insn "*ctzhi2.libgcc"
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[(set (reg:HI 24)
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(ctz:HI (reg:HI 24)))
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(clobber (reg:QI 26))]
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""
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"%~call __ctzhi2"
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[(set_attr "type" "xcall")
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(set_attr "cc" "clobber")])
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(define_insn "*ctzsihi2.libgcc"
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[(set (reg:HI 24)
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(ctz:HI (reg:SI 22)))
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(clobber (reg:QI 22))
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(clobber (reg:QI 26))]
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""
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"%~call __ctzsi2"
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[(set_attr "type" "xcall")
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(set_attr "cc" "clobber")])
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;; Find First Set
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(define_expand "ffshi2"
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[(set (reg:HI 24)
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(match_operand:HI 1 "register_operand" ""))
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(parallel [(set (reg:HI 24)
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(ffs:HI (reg:HI 24)))
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(clobber (reg:QI 26))])
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(set (match_operand:HI 0 "register_operand" "")
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(reg:HI 24))]
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""
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"")
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(define_expand "ffssi2"
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[(set (reg:SI 22)
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(match_operand:SI 1 "register_operand" ""))
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(parallel [(set (reg:HI 24)
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(ffs:HI (reg:SI 22)))
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(clobber (reg:QI 22))
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(clobber (reg:QI 26))])
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(set (match_operand:SI 0 "register_operand" "")
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(zero_extend:SI (reg:HI 24)))]
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""
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"")
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(define_insn "*ffshi2.libgcc"
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[(parallel [(set (reg:HI 24)
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(ffs:HI (reg:HI 24)))
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(clobber (reg:QI 26))])]
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""
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"%~call __ffshi2"
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[(set_attr "type" "xcall")
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(set_attr "cc" "clobber")])
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(define_insn "*ffssihi2.libgcc"
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[(parallel [(set (reg:HI 24)
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(ffs:HI (reg:SI 22)))
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(clobber (reg:QI 22))
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(clobber (reg:QI 26))])]
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""
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"%~call __ffssi2"
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[(set_attr "type" "xcall")
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(set_attr "cc" "clobber")])
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;; Copysign
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(define_insn "copysignsf3"
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[(set (match_operand:SF 0 "register_operand" "=r")
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(unspec:SF [(match_operand:SF 1 "register_operand" "0")
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(match_operand:SF 2 "register_operand" "r")]
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UNSPEC_COPYSIGN))]
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""
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"bst %D2,7\;bld %D0,7"
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[(set_attr "length" "2")
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(set_attr "cc" "none")])
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;; Swap Bytes (change byte-endianess)
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(define_expand "bswapsi2"
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[(set (reg:SI 22)
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(match_operand:SI 1 "register_operand" ""))
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(set (reg:SI 22)
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(bswap:SI (reg:SI 22)))
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(set (match_operand:SI 0 "register_operand" "")
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(reg:SI 22))]
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""
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"")
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(define_insn "*bswapsi2.libgcc"
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[(set (reg:SI 22)
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(bswap:SI (reg:SI 22)))]
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""
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"%~call __bswapsi2"
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[(set_attr "type" "xcall")
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(set_attr "cc" "clobber")])
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;; CPU instructions
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;; NOP taking 1 or 2 Ticks
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@ -1074,15 +1074,9 @@ ENDF __ffssi2
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;; clobbers: r26
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DEFUN __ffshi2
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clr r26
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#ifdef __AVR_HAVE_JMP_CALL__
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;; Some cores have problem skipping 2-word instruction
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tst r24
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breq 2f
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#else
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cpse r24, __zero_reg__
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#endif /* __AVR_HAVE_JMP_CALL__ */
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1: XJMP __loop_ffsqi2
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2: ldi r26, 8
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ldi r26, 8
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or r24, r25
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brne 1b
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ret
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@ -1112,12 +1106,12 @@ ENDF __loop_ffsqi2
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#if defined (L_ctzsi2)
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;; count trailing zeros
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;; r25:r24 = ctz32 (r25:r22)
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;; clobbers: r26, r22
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;; ctz(0) = 255
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;; Note that ctz(0) in undefined for GCC
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;; ctz(0) = 32
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DEFUN __ctzsi2
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XCALL __ffssi2
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dec r24
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sbrc r24, 7
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ldi r24, 32
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ret
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ENDF __ctzsi2
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#endif /* defined (L_ctzsi2) */
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@ -1125,12 +1119,12 @@ ENDF __ctzsi2
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#if defined (L_ctzhi2)
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;; count trailing zeros
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;; r25:r24 = ctz16 (r25:r24)
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;; clobbers: r26
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;; ctz(0) = 255
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;; Note that ctz(0) in undefined for GCC
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;; ctz(0) = 16
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DEFUN __ctzhi2
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XCALL __ffshi2
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dec r24
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sbrc r24, 7
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ldi r24, 16
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ret
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ENDF __ctzhi2
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#endif /* defined (L_ctzhi2) */
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@ -1264,50 +1258,47 @@ ENDF __parityqi2
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#if defined (L_popcounthi2)
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;; population count
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;; r25:r24 = popcount16 (r25:r24)
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;; clobbers: __tmp_reg__
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;; clobbers: r30, __tmp_reg__
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DEFUN __popcounthi2
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XCALL __popcountqi2
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push r24
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mov r30, r24
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mov r24, r25
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XCALL __popcountqi2
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add r24, r30
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clr r25
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;; FALLTHRU
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ENDF __popcounthi2
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DEFUN __popcounthi2_tail
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pop __tmp_reg__
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add r24, __tmp_reg__
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ret
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ENDF __popcounthi2_tail
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ENDF __popcounthi2
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#endif /* defined (L_popcounthi2) */
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#if defined (L_popcountsi2)
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;; population count
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;; r25:r24 = popcount32 (r25:r22)
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;; clobbers: __tmp_reg__
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;; clobbers: r26, r30, __tmp_reg__
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DEFUN __popcountsi2
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XCALL __popcounthi2
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push r24
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mov r26, r24
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mov_l r24, r22
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mov_h r25, r23
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XCALL __popcounthi2
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XJMP __popcounthi2_tail
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add r24, r26
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ret
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ENDF __popcountsi2
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#endif /* defined (L_popcountsi2) */
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#if defined (L_popcountdi2)
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;; population count
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;; r25:r24 = popcount64 (r25:r18)
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;; clobbers: r22, r23, __tmp_reg__
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;; clobbers: r22, r23, r26, r27, r30, __tmp_reg__
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DEFUN __popcountdi2
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XCALL __popcountsi2
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push r24
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mov r27, r24
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mov_l r22, r18
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mov_h r23, r19
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mov_l r24, r20
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mov_h r25, r21
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XCALL __popcountsi2
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XJMP __popcounthi2_tail
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add r24, r27
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ret
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ENDF __popcountdi2
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#endif /* defined (L_popcountdi2) */
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