aarch64.md (lrint<GPF:mode><GPI:mode>2): New.
2017-06-09 Tamar Christina <tamar.christina@arm.com> * config/aarch64/aarch64.md (lrint<GPF:mode><GPI:mode>2): New. gcc/testsuite/ 2017-06-09 Tamar Christina <tamar.christina@arm.com> * gcc.target/aarch64/lrint-matherr.h: New. * gcc.target/aarch64/inline-lrint_1.c: New. * gcc.target/aarch64/inline-lrint_2.c: New. * gcc.target/aarch64/no-inline-lrint_1.c: New. * gcc.target/aarch64/no-inline-lrint_2.c: New. From-SVN: r249064
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2866f21d19
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@ -3,6 +3,10 @@
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* tree-ssa-loop-im.c (execute_sm): Do not force multi-threaded
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model if the ref is always written to.
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2017-06-09 Tamar Christina <tamar.christina@arm.com>
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* config/aarch64/aarch64.md (lrint<GPF:mode><GPI:mode>2): New.
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2017-06-09 Tamar Christina <tamar.christina@arm.com>
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* config/arm/arm.c (arm_rtx_costs_internal): Make sdiv more expensive
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@ -4940,6 +4940,18 @@
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[(set_attr "type" "f_minmax<stype>")]
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)
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(define_expand "lrint<GPF:mode><GPI:mode>2"
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[(match_operand:GPI 0 "register_operand")
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(match_operand:GPF 1 "register_operand")]
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"TARGET_FLOAT"
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{
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rtx cvt = gen_reg_rtx (<GPF:MODE>mode);
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emit_insn (gen_rint<GPF:mode>2 (cvt, operands[1]));
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emit_insn (gen_lbtrunc<GPF:mode><GPI:mode>2 (operands[0], cvt));
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DONE;
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}
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)
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;; For copysign (x, y), we want to generate:
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;;
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;; LDR d2, #(1 << 63)
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@ -1,3 +1,11 @@
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2017-06-09 Tamar Christina <tamar.christina@arm.com>
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* gcc.target/aarch64/lrint-matherr.h: New.
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* gcc.target/aarch64/inline-lrint_1.c: New.
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* gcc.target/aarch64/inline-lrint_2.c: New.
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* gcc.target/aarch64/no-inline-lrint_1.c: New.
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* gcc.target/aarch64/no-inline-lrint_2.c: New.
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2017-06-09 Tamar Christina <tamar.christina@arm.com>
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* gcc.target/arm/sdiv_costs_1.c: New.
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20
gcc/testsuite/gcc.target/aarch64/inline-lrint_1.c
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gcc/testsuite/gcc.target/aarch64/inline-lrint_1.c
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/* { dg-do compile } */
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/* { dg-require-effective-target lp64 } */
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/* { dg-options "-O3 -fno-math-errno" } */
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#include "lrint-matherr.h"
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TEST (dld, double, long, )
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TEST (flf, float , long, )
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TEST (did, double, int, )
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TEST (fif, float , int, )
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TEST (dlld, double, long long, l)
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TEST (fllf, float , long long, l)
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/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
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/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
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/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, d\[0-9\]+" 3 } } */
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/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, s\[0-9\]+" 3 } } */
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/* { dg-final { scan-assembler-not "bl" } } */
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gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c
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gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c
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/* { dg-do compile } */
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/* { dg-require-effective-target ilp32 } */
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/* { dg-options "-O3 -fno-math-errno" } */
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#include "lrint-matherr.h"
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TEST (dld, double, long, )
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TEST (flf, float , long, )
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TEST (did, double, int, )
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TEST (fif, float , int, )
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TEST (dlld, double, long long, l)
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TEST (fllf, float , long long, l)
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/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
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/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
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/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, d\[0-9\]+" 1 } } */
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/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, s\[0-9\]+" 1 } } */
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/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, d\[0-9\]+" 2 } } */
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/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, s\[0-9\]+" 2 } } */
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/* { dg-final { scan-assembler-not "bl" } } */
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gcc/testsuite/gcc.target/aarch64/lrint-matherr.h
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5
gcc/testsuite/gcc.target/aarch64/lrint-matherr.h
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#define TEST(name, float_type, int_type, pref) void f_##name (float_type x) \
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{ \
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volatile float_type a = __builtin_rint (x); \
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volatile int_type b = __builtin_l##pref##rint (x); \
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}
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gcc/testsuite/gcc.target/aarch64/no-inline-lrint_1.c
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gcc/testsuite/gcc.target/aarch64/no-inline-lrint_1.c
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/* { dg-do compile } */
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/* { dg-require-effective-target lp64 } */
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/* { dg-options "-O3" } */
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#include "lrint-matherr.h"
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TEST (dld, double, long, )
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TEST (flf, float , long, )
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TEST (did, double, int, )
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TEST (fif, float , int, )
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TEST (dlld, double, long long, l)
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TEST (fllf, float , long long, l)
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/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
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/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
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/* { dg-final { scan-assembler-times "bl\tlrint" 4 } } */
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/* { dg-final { scan-assembler-times "bl\tllrint" 2 } } */
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/* { dg-final { scan-assembler-not "fcvtzs" } } */
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gcc/testsuite/gcc.target/aarch64/no-inline-lrint_2.c
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gcc/testsuite/gcc.target/aarch64/no-inline-lrint_2.c
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/* { dg-do compile } */
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/* { dg-require-effective-target ilp32 } */
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/* { dg-options "-O3" } */
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#include "lrint-matherr.h"
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TEST (dld, double, long, )
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TEST (flf, float , long, )
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TEST (did, double, int, )
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TEST (fif, float , int, )
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TEST (dlld, double, long long, l)
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TEST (fllf, float , long long, l)
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/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
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/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
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/* { dg-final { scan-assembler-times "bl\tlrint" 4 } } */
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/* { dg-final { scan-assembler-times "bl\tllrint" 2 } } */
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/* { dg-final { scan-assembler-not "fcvtzs" } } */
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