(enum processor_type): New enum.
(alpha_cpu, alpha_cpu_string): New declarations. (target_options): Add "cpu=". (RTX_COSTS): Adjust values for EV5. From-SVN: r12279
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@ -75,6 +75,15 @@ Boston, MA 02111-1307, USA. */
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/* Run-time compilation parameters selecting different hardware subsets. */
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/* Which processor to schedule for. The cpu attribute defines a list that
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mirrors this list, so changes to alpha.md must be made at the same time. */
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enum processor_type
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{PROCESSOR_EV4, /* 2106[46]{a,} */
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PROCESSOR_EV5}; /* 21164{a,} */
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extern enum processor_type alpha_cpu;
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enum alpha_trap_precision
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{
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ALPHA_TP_PROG, /* No precision (default). */
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@ -182,12 +191,14 @@ extern enum alpha_fp_trap_mode alpha_fptm;
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extern char *m88k_short_data;
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#define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
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extern char *alpha_cpu_string; /* For -mcpu=ev[4|5] */
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extern char *alpha_fprm_string; /* For -mfp-rounding-mode=[n|m|c|d] */
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extern char *alpha_fptm_string; /* For -mfp-trap-mode=[n|u|su|sui] */
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extern char *alpha_tp_string; /* For -mtrap-precision=[p|f|i] */
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#define TARGET_OPTIONS \
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{ \
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{"cpu=", &alpha_cpu_string}, \
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{"fp-rounding-mode=", &alpha_fprm_string}, \
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{"fp-trap-mode=", &alpha_fptm_string}, \
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{"trap-precision=", &alpha_tp_string}, \
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@ -1540,7 +1551,13 @@ extern void final_prescan_insn ();
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case CONST: \
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case SYMBOL_REF: \
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case LABEL_REF: \
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return COSTS_N_INSNS (3);
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switch (alpha_cpu) \
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{ \
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case PROCESSOR_EV4: \
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return COSTS_N_INSNS (3); \
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case PROCESSOR_EV5: \
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return COSTS_N_INSNS (2); \
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}
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/* Provide the costs of a rtl expression. This is in the body of a
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switch on CODE. */
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@ -1548,39 +1565,85 @@ extern void final_prescan_insn ();
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#define RTX_COSTS(X,CODE,OUTER_CODE) \
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case PLUS: case MINUS: \
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if (FLOAT_MODE_P (GET_MODE (X))) \
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return COSTS_N_INSNS (6); \
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switch (alpha_cpu) \
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{ \
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case PROCESSOR_EV4: \
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return COSTS_N_INSNS (6); \
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case PROCESSOR_EV5: \
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return COSTS_N_INSNS (4); \
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} \
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else if (GET_CODE (XEXP (X, 0)) == MULT \
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&& const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
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return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
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+ rtx_cost (XEXP (X, 1), OUTER_CODE)); \
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break; \
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case MULT: \
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if (FLOAT_MODE_P (GET_MODE (X))) \
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return COSTS_N_INSNS (6); \
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return COSTS_N_INSNS (23); \
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switch (alpha_cpu) \
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{ \
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case PROCESSOR_EV4: \
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if (FLOAT_MODE_P (GET_MODE (X))) \
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return COSTS_N_INSNS (6); \
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return COSTS_N_INSNS (23); \
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case PROCESSOR_EV5: \
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if (FLOAT_MODE_P (GET_MODE (X))) \
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return COSTS_N_INSNS (4); \
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else if (GET_MODE (X) == DImode) \
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return COSTS_N_INSNS (12); \
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else \
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return COSTS_N_INSNS (8); \
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} \
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case ASHIFT: \
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if (GET_CODE (XEXP (X, 1)) == CONST_INT \
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&& INTVAL (XEXP (X, 1)) <= 3) \
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break; \
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/* ... fall through ... */ \
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case ASHIFTRT: case LSHIFTRT: case IF_THEN_ELSE: \
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return COSTS_N_INSNS (2); \
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switch (alpha_cpu) \
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{ \
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case PROCESSOR_EV4: \
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return COSTS_N_INSNS (2); \
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case PROCESSOR_EV5: \
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return COSTS_N_INSNS (1); \
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} \
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case DIV: case UDIV: case MOD: case UMOD: \
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if (GET_MODE (X) == SFmode) \
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return COSTS_N_INSNS (34); \
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else if (GET_MODE (X) == DFmode) \
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return COSTS_N_INSNS (63); \
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else \
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return COSTS_N_INSNS (70); \
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switch (alpha_cpu) \
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{ \
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case PROCESSOR_EV4: \
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if (GET_MODE (X) == SFmode) \
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return COSTS_N_INSNS (34); \
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else if (GET_MODE (X) == DFmode) \
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return COSTS_N_INSNS (63); \
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else \
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return COSTS_N_INSNS (70); \
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case PROCESSOR_EV5: \
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if (GET_MODE (X) == SFmode) \
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return COSTS_N_INSNS (15); \
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else if (GET_MODE (X) == DFmode) \
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return COSTS_N_INSNS (22); \
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else \
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return COSTS_N_INSNS (70); /* EV5 ??? */ \
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} \
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case MEM: \
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return COSTS_N_INSNS (3); \
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switch (alpha_cpu) \
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{ \
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case PROCESSOR_EV4: \
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return COSTS_N_INSNS (3); \
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case PROCESSOR_EV5: \
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return COSTS_N_INSNS (2); \
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} \
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case NEG: case ABS: \
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if (! FLOAT_MODE_P (GET_MODE (X))) \
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break; \
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/* ... fall through ... */ \
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case FLOAT: case UNSIGNED_FLOAT: case FIX: case UNSIGNED_FIX: \
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case FLOAT_EXTEND: case FLOAT_TRUNCATE: \
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return COSTS_N_INSNS (6); \
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case NEG: case ABS: \
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if (FLOAT_MODE_P (GET_MODE (X))) \
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return COSTS_N_INSNS (6); \
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break;
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switch (alpha_cpu) \
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{ \
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case PROCESSOR_EV4: \
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return COSTS_N_INSNS (6); \
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case PROCESSOR_EV5: \
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return COSTS_N_INSNS (4); \
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}
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/* Control the assembler format that we output. */
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