i386.md (setcc + movzbl to xor + setcc peephole2): Also convert sequences with CC setting arithmetic instruction.
2012-03-12 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.md (setcc + movzbl to xor + setcc peephole2): Also convert sequences with CC setting arithmetic instruction. From-SVN: r185213
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@ -1,3 +1,8 @@
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2012-03-12 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (setcc + movzbl to xor + setcc peephole2):
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Also convert sequences with CC setting arithmetic instruction.
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2012-03-11 Sandra Loosemore <sandra@codesourcery.com>
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2012-03-11 Sandra Loosemore <sandra@codesourcery.com>
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* doc/invoke.texi (Option Summary): Move -no-integrated-cpp
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* doc/invoke.texi (Option Summary): Move -no-integrated-cpp
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@ -11170,6 +11170,27 @@
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ix86_expand_clear (operands[3]);
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ix86_expand_clear (operands[3]);
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})
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})
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(define_peephole2
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[(parallel [(set (reg FLAGS_REG) (match_operand 0 "" ""))
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(match_operand 4 "" "")])
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(set (match_operand:QI 1 "register_operand" "")
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(match_operator:QI 2 "ix86_comparison_operator"
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[(reg FLAGS_REG) (const_int 0)]))
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(set (match_operand 3 "q_regs_operand" "")
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(zero_extend (match_dup 1)))]
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"(peep2_reg_dead_p (3, operands[1])
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|| operands_match_p (operands[1], operands[3]))
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&& ! reg_overlap_mentioned_p (operands[3], operands[0])"
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[(parallel [(set (match_dup 5) (match_dup 0))
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(match_dup 4)])
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(set (strict_low_part (match_dup 6))
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(match_dup 2))]
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{
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operands[5] = gen_rtx_REG (GET_MODE (operands[0]), FLAGS_REG);
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operands[6] = gen_lowpart (QImode, operands[3]);
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ix86_expand_clear (operands[3]);
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})
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;; Similar, but match zero extend with andsi3.
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;; Similar, but match zero extend with andsi3.
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(define_peephole2
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(define_peephole2
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@ -11190,6 +11211,28 @@
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operands[5] = gen_lowpart (QImode, operands[3]);
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operands[5] = gen_lowpart (QImode, operands[3]);
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ix86_expand_clear (operands[3]);
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ix86_expand_clear (operands[3]);
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})
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})
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(define_peephole2
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[(parallel [(set (reg FLAGS_REG) (match_operand 0 "" ""))
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(match_operand 4 "" "")])
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(set (match_operand:QI 1 "register_operand" "")
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(match_operator:QI 2 "ix86_comparison_operator"
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[(reg FLAGS_REG) (const_int 0)]))
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(parallel [(set (match_operand 3 "q_regs_operand" "")
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(zero_extend (match_dup 1)))
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(clobber (reg:CC FLAGS_REG))])]
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"(peep2_reg_dead_p (3, operands[1])
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|| operands_match_p (operands[1], operands[3]))
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&& ! reg_overlap_mentioned_p (operands[3], operands[0])"
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[(parallel [(set (match_dup 5) (match_dup 0))
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(match_dup 4)])
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(set (strict_low_part (match_dup 6))
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(match_dup 2))]
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{
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operands[5] = gen_rtx_REG (GET_MODE (operands[0]), FLAGS_REG);
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operands[6] = gen_lowpart (QImode, operands[3]);
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ix86_expand_clear (operands[3]);
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})
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;; Call instructions.
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;; Call instructions.
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