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alpha.c (some_ni_operand): New.

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* alpha.c (some_ni_operand): New.
        * alpha-protos.h: Declare it.
        * alpha.h (PREDICATE_CODES): Update.
        * alpha.md (sXaddq reload insns): Use some_ni_operand
        for SET_DEST instead of some_operand.

From-SVN: r29959
This commit is contained in:
Richard Henderson 1999-10-13 21:20:55 -07:00 committed by Richard Henderson
parent 4dc320a596
commit f711a22be3
5 changed files with 30 additions and 4 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
Wed Oct 13 21:18:17 1999 Richard Henderson <rth@cygnus.com>
* alpha.c (some_ni_operand): New.
* alpha-protos.h: Declare it.
* alpha.h (PREDICATE_CODES): Update.
* alpha.md (sXaddq reload insns): Use some_ni_operand
for SET_DEST instead of some_operand.
Wed Oct 13 21:04:45 1999 Richard Henderson <rth@cygnus.com>
Jim Wilson <wilson@cygnus.com>

1
gcc/config/alpha/alpha-protos.h
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@ -50,6 +50,7 @@ extern int reg_or_fp0_operand PROTO ((rtx, enum machine_mode));
extern int hard_fp_register_operand PROTO ((rtx, enum machine_mode));
extern int reg_or_cint_operand PROTO ((rtx, enum machine_mode));
extern int some_operand PROTO ((rtx, enum machine_mode));
extern int some_ni_operand PROTO ((rtx, enum machine_mode));
extern int input_operand PROTO ((rtx, enum machine_mode));
extern int current_file_function_operand PROTO ((rtx, enum machine_mode));
extern int call_operand PROTO ((rtx, enum machine_mode));

16
gcc/config/alpha/alpha.c
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@ -585,6 +585,22 @@ some_operand (op, mode)
return 0;
}
/* Likewise, but don't accept constants. */
int
some_ni_operand (op, mode)
register rtx op;
enum machine_mode mode;
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return 0;
if (GET_CODE (op) == SUBREG)
op = SUBREG_REG (op);
return (GET_CODE (op) == REG || GET_CODE (op) == MEM);
}
/* Return 1 if OP is a valid operand for the source of a move insn. */
int

1
gcc/config/alpha/alpha.h
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@ -2330,6 +2330,7 @@ do { \
SYMBOL_REF, CONST, LABEL_REF}}, \
{"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
SYMBOL_REF, CONST, LABEL_REF}}, \
{"some_ni_operand", {SUBREG, REG, MEM}}, \
{"aligned_memory_operand", {MEM}}, \
{"unaligned_memory_operand", {MEM}}, \
{"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \

8
gcc/config/alpha/alpha.md
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@ -669,7 +669,7 @@
;; recognize them while reloading.
(define_insn ""
[(set (match_operand:DI 0 "some_operand" "=r,&r")
[(set (match_operand:DI 0 "some_ni_operand" "=r,&r")
(plus:DI (plus:DI (match_operand:DI 1 "some_operand" "%r,r")
(match_operand:DI 2 "some_operand" "%r,r"))
(match_operand:DI 3 "some_operand" "IOKL,r")))]
@ -687,7 +687,7 @@
"")
(define_insn ""
[(set (match_operand:SI 0 "some_operand" "=r,&r")
[(set (match_operand:SI 0 "some_ni_operand" "=r,&r")
(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "some_operand" "rJ,rJ")
(match_operand:SI 2 "const48_operand" "I,I"))
(match_operand:SI 3 "some_operand" "%r,r"))
@ -708,7 +708,7 @@
"")
(define_insn ""
[(set (match_operand:DI 0 "some_operand" "=r,&r")
[(set (match_operand:DI 0 "some_ni_operand" "=r,&r")
(sign_extend:DI
(plus:SI (plus:SI
(mult:SI (match_operand:SI 1 "some_operand" "rJ,rJ")
@ -733,7 +733,7 @@
"operands[5] = gen_lowpart (SImode, operands[0]);")
(define_insn ""
[(set (match_operand:DI 0 "some_operand" "=r,&r")
[(set (match_operand:DI 0 "some_ni_operand" "=r,&r")
(plus:DI (plus:DI (mult:DI (match_operand:DI 1 "some_operand" "rJ,rJ")
(match_operand:DI 2 "const48_operand" "I,I"))
(match_operand:DI 3 "some_operand" "%r,r"))