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[ARM] [Neon types 3/10] Update Current type attributes to new Neon Types. 

gcc/
	* config/arm/iterators.md (V_elem_ch): New.
	(q): Likewise.
	(VQH_type): Likewise.
	* config/arm/arm.md (is_neon_type): New.
	(conds): Use is_neon_type.
	(anddi3_insn): Update type attribute.
	(xordi3_insn): Likewise.
	(one_cmpldi2): Likewise.
	* gcc/config/arm/vfp.md (movhf_vfp_neon): Update type attribute.
	* gcc/config/arm/neon.md (neon_mov): Update type attributes for
	all patterns.

From-SVN: r203613
This commit is contained in:
James Greenhalgh 2013-10-15 15:28:04 +00:00 committed by James Greenhalgh
parent a9e66678ca
commit f7379e5eb9
5 changed files with 699 additions and 616 deletions
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244
gcc/ChangeLog
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@ -1,3 +1,247 @@
2013-10-15 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/iterators.md (V_elem_ch): New.
(q): Likewise.
(VQH_type): Likewise.
* config/arm/arm.md (is_neon_type): New.
(conds): Use is_neon_type.
(anddi3_insn): Update type attribute.
(xordi3_insn): Likewise.
(one_cmpldi2): Likewise.
* gcc/config/arm/vfp.md (movhf_vfp_neon): Update type attribute.
* gcc/config/arm/neon.md (neon_mov): Update type attribute.
(*movmisalign<mode>_neon_store): Likewise.
(*movmisalign<mode>_neon_load): Likewise.
(vec_set<mode>_internal): Likewise.
(vec_set<mode>_internal): Likewise.
(vec_setv2di_internal): Likewise.
(vec_extract<mode>): Likewise.
(vec_extract<mode>): Likewise.
(vec_extractv2di): Likewise.
(*add<mode>3_neon): Likewise.
(adddi3_neon): Likewise.
(*sub<mode>3_neon): Likewise.
(subdi3_neon): Likewise.
(fma<VCVTF:mode>4): Likewise.
(fma<VCVTF:mode>4_intrinsic): Likewise.
(*fmsub<VCVTF:mode>4): Likewise.
(fmsub<VCVTF:mode>4_intrinsic): Likewise.
(neon_vrint<NEON_VRINT:nvrint_variant><VCVTF:mode>): Likewise.
(ior<mode>3): Likewise.
(and<mode>3): Likewise.
(orn<mode>3_neon): Likewise.
(orndi3_neon): Likewise.
(bic<mode>3_neon): Likewise.
(bicdi3_neon): Likewise.
(xor<mode>3): Likewise.
(one_cmpl<mode>2): Likewise.
(abs<mode>2): Likewise.
(neg<mode>2): Likewise.
(negdi2_neon): Likewise.
(*umin<mode>3_neon): Likewise.
(*umax<mode>3_neon): Likewise.
(*smin<mode>3_neon): Likewise.
(*smax<mode>3_neon): Likewise.
(vashl<mode>3): Likewise.
(vashr<mode>3_imm): Likewise.
(vlshr<mode>3_imm): Likewise.
(ashl<mode>3_signed): Likewise.
(ashl<mode>3_unsigned): Likewise.
(neon_load_count): Likewise.
(ashldi3_neon_noclobber): Likewise.
(ashldi3_neon): Likewise.
(signed_shift_di3_neon): Likewise.
(unsigned_shift_di3_neon): Likewise.
(ashrdi3_neon_imm_noclobber): Likewise.
(lshrdi3_neon_imm_noclobber): Likewise.
(<shift>di3_neon): Likewise.
(widen_ssum<mode>3): Likewise.
(widen_usum<mode>3): Likewise.
(quad_halves_<code>v4si): Likewise.
(quad_halves_<code>v4sf): Likewise.
(quad_halves_<code>v8hi): Likewise.
(quad_halves_<code>v16qi): Likewise.
(reduc_splus_v2di): Likewise.
(neon_vpadd_internal<mode>): Likewise.
(neon_vpsmin<mode>): Likewise.
(neon_vpsmax<mode>): Likewise.
(neon_vpumin<mode>): Likewise.
(neon_vpumax<mode>): Likewise.
(*ss_add<mode>_neon): Likewise.
(*us_add<mode>_neon): Likewise.
(*ss_sub<mode>_neon): Likewise.
(*us_sub<mode>_neon): Likewise.
(neon_vadd<mode>_unspec): Likewise.
(neon_vaddl<mode>): Likewise.
(neon_vaddw<mode>): Likewise.
(neon_vhadd<mode>): Likewise.
(neon_vqadd<mode>): Likewise.
(neon_vaddhn<mode>): Likewise.
(neon_vmul<mode>): Likewise.
(neon_vfms<VCVTF:mode>): Likewise.
(neon_vmlal<mode>): Likewise.
(neon_vmls<mode>): Likewise.
(neon_vmlsl<mode>): Likewise.
(neon_vqdmulh<mode>): Likewise.
(neon_vqdmlal<mode>): Likewise.
(neon_vqdmlsl<mode>): Likewise.
(neon_vmull<mode>): Likewise.
(neon_vqdmull<mode>): Likewise.
(neon_vsub<mode>_unspec): Likewise.
(neon_vsubl<mode>): Likewise.
(neon_vsubw<mode>): Likewise.
(neon_vqsub<mode>): Likewise.
(neon_vhsub<mode>): Likewise.
(neon_vsubhn<mode>): Likewise.
(neon_vceq<mode>): Likewise.
(neon_vcge<mode>): Likewise.
(neon_vcgeu<mode>): Likewise.
(neon_vcgt<mode>): Likewise.
(neon_vcgtu<mode>): Likewise.
(neon_vcle<mode>): Likewise.
(neon_vclt<mode>): Likewise.
(neon_vcage<mode>): Likewise.
(neon_vcagt<mode>): Likewise.
(neon_vtst<mode>): Likewise.
(neon_vabd<mode>): Likewise.
(neon_vabdl<mode>): Likewise.
(neon_vaba<mode>): Likewise.
(neon_vabal<mode>): Likewise.
(neon_vmax<mode>): Likewise.
(neon_vmin<mode>): Likewise.
(neon_vpaddl<mode>): Likewise.
(neon_vpadal<mode>): Likewise.
(neon_vpmax<mode>): Likewise.
(neon_vpmin<mode>): Likewise.
(neon_vrecps<mode>): Likewise.
(neon_vrsqrts<mode>): Likewise.
(neon_vqabs<mode>): Likewise.
(neon_vqneg<mode>): Likewise.
(neon_vcls<mode>): Likewise.
(clz<mode>2): Likewise.
(popcount<mode>2): Likewise.
(neon_vrecpe<mode>): Likewise.
(neon_vrsqrte<mode>): Likewise.
(neon_vget_lane<mode>_sext_internal): Likewise.
(neon_vget_lane<mode>_zext_internal): Likewise.
(neon_vdup_n<mode>): Likewise.
(neon_vdup_n<mode>): Likewise.
(neon_vdup_nv2di): Likewise.
(neon_vdup_lane<mode>_interal): Likewise.
(*neon_vswp<mode>): Likewise.
(neon_vcombine<mode>): Likewise.
(float<mode><V_cvtto>2): Likewise.
(floatuns<mode><V_cvtto>2): Likewise.
(fix_trunc<mode><V_cvtto>2): Likewise.
(fixuns_trunc<mode><V_cvtto>2
(neon_vcvt<mode>): Likewise.
(neon_vcvt<mode>): Likewise.
(neon_vcvtv4sfv4hf): Likewise.
(neon_vcvtv4hfv4sf): Likewise.
(neon_vcvt_n<mode>): Likewise.
(neon_vcvt_n<mode>): Likewise.
(neon_vmovn<mode>): Likewise.
(neon_vqmovn<mode>): Likewise.
(neon_vqmovun<mode>): Likewise.
(neon_vmovl<mode>): Likewise.
(neon_vmul_lane<mode>): Likewise.
(neon_vmul_lane<mode>): Likewise.
(neon_vmull_lane<mode>): Likewise.
(neon_vqdmull_lane<mode>): Likewise.
(neon_vqdmulh_lane<mode>): Likewise.
(neon_vqdmulh_lane<mode>): Likewise.
(neon_vmla_lane<mode>): Likewise.
(neon_vmla_lane<mode>): Likewise.
(neon_vmlal_lane<mode>): Likewise.
(neon_vqdmlal_lane<mode>): Likewise.
(neon_vmls_lane<mode>): Likewise.
(neon_vmls_lane<mode>): Likewise.
(neon_vmlsl_lane<mode>): Likewise.
(neon_vqdmlsl_lane<mode>): Likewise.
(neon_vext<mode>): Likewise.
(neon_vrev64<mode>): Likewise.
(neon_vrev32<mode>): Likewise.
(neon_vrev16<mode>): Likewise.
(neon_vbsl<mode>_internal): Likewise.
(neon_vshl<mode>): Likewise.
(neon_vqshl<mode>): Likewise.
(neon_vshr_n<mode>): Likewise.
(neon_vshrn_n<mode>): Likewise.
(neon_vqshrn_n<mode>): Likewise.
(neon_vqshrun_n<mode>): Likewise.
(neon_vshl_n<mode>): Likewise.
(neon_vqshl_n<mode>): Likewise.
(neon_vqshlu_n<mode>): Likewise.
(neon_vshll_n<mode>): Likewise.
(neon_vsra_n<mode>): Likewise.
(neon_vsri_n<mode>): Likewise.
(neon_vsli_n<mode>): Likewise.
(neon_vtbl1v8qi): Likewise.
(neon_vtbl2v8qi): Likewise.
(neon_vtbl3v8qi): Likewise.
(neon_vtbl4v8qi): Likewise.
(neon_vtbl1v16qi): Likewise.
(neon_vtbl2v16qi): Likewise.
(neon_vcombinev16qi): Likewise.
(neon_vtbx1v8qi): Likewise.
(neon_vtbx2v8qi): Likewise.
(neon_vtbx3v8qi): Likewise.
(neon_vtbx4v8qi): Likewise.
(*neon_vtrn<mode>_insn): Likewise.
(*neon_vzip<mode>_insn): Likewise.
(*neon_vuzp<mode>_insn): Likewise.
(neon_vld1<mode>): Likewise.
(neon_vld1_lane<mode>): Likewise.
(neon_vld1_lane<mode>): Likewise.
(neon_vld1_dup<mode>): Likewise.
(neon_vld1_dup<mode>): Likewise.
(neon_vld1_dupv2di): Likewise.
(neon_vst1<mode>): Likewise.
(neon_vst1_lane<mode>): Likewise.
(neon_vst1_lane<mode>): Likewise.
(neon_vld2<mode>): Likewise.
(neon_vld2<mode>): Likewise.
(neon_vld2_lane<mode>): Likewise.
(neon_vld2_lane<mode>): Likewise.
(neon_vld2_dup<mode>): Likewise.
(neon_vst2<mode>): Likewise.
(neon_vst2<mode>): Likewise.
(neon_vst2_lane<mode>): Likewise.
(neon_vst2_lane<mode>): Likewise.
(neon_vld3<mode>): Likewise.
(neon_vld3qa<mode>): Likewise.
(neon_vld3qb<mode>): Likewise.
(neon_vld3_lane<mode>): Likewise.
(neon_vld3_lane<mode>): Likewise.
(neon_vld3_dup<mode>): Likewise.
(neon_vst3<mode>): Likewise.
(neon_vst3qa<mode>): Likewise.
(neon_vst3qb<mode>): Likewise.
(neon_vst3_lane<mode>): Likewise.
(neon_vst3_lane<mode>): Likewise.
(neon_vld4<mode>): Likewise.
(neon_vld4qa<mode>): Likewise.
(neon_vld4qb<mode>): Likewise.
(neon_vld4_lane<mode>): Likewise.
(neon_vld4_lane<mode>): Likewise.
(neon_vld4_dup<mode>): Likewise.
(neon_vst4<mode>): Likewise.
(neon_vst4qa<mode>): Likewise.
(neon_vst4qb<mode>): Likewise.
(neon_vst4_lane<mode>): Likewise.
(neon_vst4_lane<mode>): Likewise.
(neon_vec_unpack<US>_lo_<mode>): Likewise.
(neon_vec_unpack<US>_hi_<mode>): Likewise.
(neon_vec_<US>mult_lo_<mode>): Likewise.
(neon_vec_<US>mult_hi_<mode>): Likewise.
(neon_vec_<US>shiftl_<mode>): Likewise.
(neon_unpack<US>_<mode>): Likewise.
(neon_vec_<US>mult_<mode>): Likewise.
(vec_pack_trunc_<mode>): Likewise.
(neon_vec_pack_trunc_<mode>): Likewise.
(neon_vabd<mode>_2): Likewise.
(neon_vabd<mode>_3): Likewise.
2013-10-15 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64.md (movtf_aarch64): Update type attribute.

134
gcc/config/arm/arm.md
View File

@ -252,6 +252,103 @@
; initialized by arm_option_override()
(define_attr "ldsched" "no,yes" (const (symbol_ref "arm_ld_sched")))
; YES if the "type" attribute assigned to the insn denotes an
; Advanced SIMD instruction, NO otherwise.
(define_attr "is_neon_type" "yes,no"
(if_then_else (eq_attr "type"
"neon_add, neon_add_q, neon_add_widen, neon_add_long,\
neon_qadd, neon_qadd_q, neon_add_halve, neon_add_halve_q,\
neon_add_halve_narrow_q,\
neon_sub, neon_sub_q, neon_sub_widen, neon_sub_long, neon_qsub,\
neon_qsub_q, neon_sub_halve, neon_sub_halve_q,\
neon_sub_halve_narrow_q,\
neon_abs, neon_abs_q, neon_neg, neon_neg_q, neon_qneg,\
neon_qneg_q, neon_qabs, neon_qabs_q, neon_abd, neon_abd_q,\
neon_abd_long, neon_minmax, neon_minmax_q, neon_compare,\
neon_compare_q, neon_compare_zero, neon_compare_zero_q,\
neon_arith_acc, neon_arith_acc_q, neon_reduc_add,\
neon_reduc_add_q, neon_reduc_add_long, neon_reduc_add_acc,\
neon_reduc_add_acc_q, neon_reduc_minmax, neon_reduc_minmax_q,\
neon_logic, neon_logic_q, neon_tst, neon_tst_q,\
neon_shift_imm, neon_shift_imm_q, neon_shift_imm_narrow_q,\
neon_shift_imm_long, neon_shift_reg, neon_shift_reg_q,\
neon_shift_acc, neon_shift_acc_q, neon_sat_shift_imm,\
neon_sat_shift_imm_q, neon_sat_shift_imm_narrow_q,\
neon_sat_shift_reg, neon_sat_shift_reg_q,\
neon_ins, neon_ins_q, neon_move, neon_move_q, neon_move_narrow_q,\
neon_permute, neon_permute_q, neon_zip, neon_zip_q, neon_tbl1,\
neon_tbl1_q, neon_tbl2, neon_tbl2_q, neon_tbl3, neon_tbl3_q,\
neon_tbl4, neon_tbl4_q, neon_bsl, neon_bsl_q, neon_cls,\
neon_cls_q, neon_cnt, neon_cnt_q, neon_dup, neon_dup_q,\
neon_ext, neon_ext_q, neon_rbit, neon_rbit_q,\
neon_rev, neon_rev_q, neon_mul_b, neon_mul_b_q, neon_mul_h,\
neon_mul_h_q, neon_mul_s, neon_mul_s_q, neon_mul_b_long,\
neon_mul_h_long, neon_mul_s_long, neon_mul_h_scalar,\
neon_mul_h_scalar_q, neon_mul_s_scalar, neon_mul_s_scalar_q,\
neon_mul_h_scalar_long, neon_mul_s_scalar_long, neon_sat_mul_b,\
neon_sat_mul_b_q, neon_sat_mul_h, neon_sat_mul_h_q,\
neon_sat_mul_s, neon_sat_mul_s_q, neon_sat_mul_b_long,\
neon_sat_mul_h_long, neon_sat_mul_s_long, neon_sat_mul_h_scalar,\
neon_sat_mul_h_scalar_q, neon_sat_mul_s_scalar,\
neon_sat_mul_s_scalar_q, neon_sat_mul_h_scalar_long,\
neon_sat_mul_s_scalar_long, neon_mla_b, neon_mla_b_q, neon_mla_h,\
neon_mla_h_q, neon_mla_s, neon_mla_s_q, neon_mla_b_long,\
neon_mla_h_long, neon_mla_s_long, neon_mla_h_scalar,\
neon_mla_h_scalar_q, neon_mla_s_scalar, neon_mla_s_scalar_q,\
neon_mla_h_scalar_long, neon_mla_s_scalar_long,\
neon_sat_mla_b_long, neon_sat_mla_h_long,\
neon_sat_mla_s_long, neon_sat_mla_h_scalar_long,\
neon_sat_mla_s_scalar_long,\
neon_to_gp, neon_to_gp_q, neon_from_gp, neon_from_gp_q,\
neon_ldr, neon_load1_1reg, neon_load1_1reg_q, neon_load1_2reg,\
neon_load1_2reg_q, neon_load1_3reg, neon_load1_3reg_q,\
neon_load1_4reg, neon_load1_4reg_q, neon_load1_all_lanes,\
neon_load1_all_lanes_q, neon_load1_one_lane, neon_load1_one_lane_q,\
neon_load2_2reg, neon_load2_2reg_q, neon_load2_4reg,\
neon_load2_4reg_q, neon_load2_all_lanes, neon_load2_all_lanes_q,\
neon_load2_one_lane, neon_load2_one_lane_q,\
neon_load3_3reg, neon_load3_3reg_q, neon_load3_all_lanes,\
neon_load3_all_lanes_q, neon_load3_one_lane, neon_load3_one_lane_q,\
neon_load4_4reg, neon_load4_4reg_q, neon_load4_all_lanes,\
neon_load4_all_lanes_q, neon_load4_one_lane, neon_load4_one_lane_q,\
neon_str, neon_store1_1reg, neon_store1_1reg_q, neon_store1_2reg,\
neon_store1_2reg_q, neon_store1_3reg, neon_store1_3reg_q,\
neon_store1_4reg, neon_store1_4reg_q, neon_store1_one_lane,\
neon_store1_one_lane_q, neon_store2_2reg, neon_store2_2reg_q,\
neon_store2_4reg, neon_store2_4reg_q, neon_store2_one_lane,\
neon_store2_one_lane_q, neon_store3_3reg, neon_store3_3reg_q,\
neon_store3_one_lane, neon_store3_one_lane_q, neon_store4_4reg,\
neon_store4_4reg_q, neon_store4_one_lane, neon_store4_one_lane_q,\
neon_fp_abd_s, neon_fp_abd_s_q, neon_fp_abd_d, neon_fp_abd_d_q,\
neon_fp_addsub_s, neon_fp_addsub_s_q, neon_fp_addsub_d,\
neon_fp_addsub_d_q, neon_fp_compare_s, neon_fp_compare_s_q,\
neon_fp_compare_d, neon_fp_compare_d_q, neon_fp_minmax_s,\
neon_fp_minmax_s_q, neon_fp_minmax_d, neon_fp_minmax_d_q,\
neon_fp_reduc_add_s, neon_fp_reduc_add_s_q, neon_fp_reduc_add_d,\
neon_fp_reduc_add_d_q, neon_fp_reduc_minmax_s,
neon_fp_reduc_minmax_s_q, neon_fp_reduc_minmax_d,\
neon_fp_reduc_minmax_d_q,\
neon_fp_cvt_narrow_s_q, neon_fp_cvt_narrow_d_q,\
neon_fp_cvt_widen_h, neon_fp_cvt_widen_s, neon_fp_to_int_s,\
neon_fp_to_int_s_q, neon_int_to_fp_s, neon_int_to_fp_s_q,\
neon_fp_round_s, neon_fp_round_s_q, neon_fp_recpe_s,\
neon_fp_recpe_s_q,\
neon_fp_recpe_d, neon_fp_recpe_d_q, neon_fp_recps_s,\
neon_fp_recps_s_q, neon_fp_recps_d, neon_fp_recps_d_q,\
neon_fp_recpx_s, neon_fp_recpx_s_q, neon_fp_recpx_d,\
neon_fp_recpx_d_q, neon_fp_rsqrte_s, neon_fp_rsqrte_s_q,\
neon_fp_rsqrte_d, neon_fp_rsqrte_d_q, neon_fp_rsqrts_s,\
neon_fp_rsqrts_s_q, neon_fp_rsqrts_d, neon_fp_rsqrts_d_q,\
neon_fp_mul_s, neon_fp_mul_s_q, neon_fp_mul_s_scalar,\
neon_fp_mul_s_scalar_q, neon_fp_mul_d, neon_fp_mul_d_q,\
neon_fp_mul_d_scalar_q, neon_fp_mla_s, neon_fp_mla_s_q,\
neon_fp_mla_s_scalar, neon_fp_mla_s_scalar_q, neon_fp_mla_d,\
neon_fp_mla_d_q, neon_fp_mla_d_scalar_q, neon_fp_sqrt_s,\
neon_fp_sqrt_s_q, neon_fp_sqrt_d, neon_fp_sqrt_d_q,\
neon_fp_div_s, neon_fp_div_s_q, neon_fp_div_d, neon_fp_div_d_q")
(const_string "yes")
(const_string "no")))
; condition codes: this one is used by final_prescan_insn to speed up
; conditionalizing instructions. It saves having to scan the rtl to see if
; it uses or alters the condition codes.
@ -277,32 +374,7 @@
(ior (eq_attr "is_thumb1" "yes")
(eq_attr "type" "call"))
(const_string "clob")
(if_then_else (eq_attr "type"
"!neon_int_1, neon_int_2, neon_int_3, neon_int_4, neon_int_5,\
neon_vqneg_vqabs, neon_vmov, neon_vaba, neon_vsma, neon_vaba_qqq,\
neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
neon_mul_qqq_8_16_32_ddd_32,\
neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar,\
neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
neon_mla_qqq_8_16,\
neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long,\
neon_mla_qqq_32_qqd_32_scalar,\
neon_mul_ddd_16_scalar_32_16_long_scalar, neon_mul_qqd_32_scalar,\
neon_mla_ddd_16_scalar_qdd_32_16_long_scalar, neon_shift_1,\
neon_shift_2, neon_shift_3, neon_vshl_ddd,\
neon_vqshl_vrshl_vqrshl_qqq, neon_vsra_vrsra,\
neon_fp_vadd_ddd_vabs_dd, neon_fp_vadd_qqq_vabs_qq, neon_fp_vsum,\
neon_fp_vmul_ddd, neon_fp_vmul_qqd, neon_fp_vmla_ddd,\
neon_fp_vmla_qqq, neon_fp_vmla_ddd_scalar, neon_fp_vmla_qqq_scalar,\
neon_fp_vrecps_vrsqrts_ddd, neon_fp_vrecps_vrsqrts_qqq,\
neon_bp_simple, neon_bp_2cycle, neon_bp_3cycle, neon_ldr, neon_str,\
neon_vld1_1_2_regs, neon_vld1_3_4_regs,\
neon_vld2_2_regs_vld1_vld2_all_lanes, neon_vld2_4_regs,\
neon_vld3_vld4, neon_vst1_1_2_regs_vst2_2_regs, neon_vst1_3_4_regs,\
neon_vst2_4_regs_vst3_vst4, neon_vst3_vst4, neon_vld1_vld2_lane,\
neon_vld3_vld4_lane, neon_vst1_vst2_lane, neon_vst3_vst4_lane,\
neon_vld3_vld4_all_lanes, neon_mcr, neon_mcr_2_mcrr, neon_mrc,\
neon_mrrc, neon_ldm_2, neon_stm_2")
(if_then_else (eq_attr "is_neon_type" "no")
(const_string "nocond")
(const_string "unconditional"))))
@ -2162,7 +2234,8 @@
gen_highpart_mode (SImode, DImode, operands[2]));
}"
[(set_attr "type" "neon_int_1,neon_int_1,multiple,multiple,multiple,multiple,neon_int_1,neon_int_1")
[(set_attr "type" "neon_logic,neon_logic,multiple,multiple,\
multiple,multiple,neon_logic,neon_logic")
(set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,*,*,
avoid_neon_for_64bits,avoid_neon_for_64bits")
(set_attr "length" "*,*,8,8,8,8,*,*")
@ -3012,7 +3085,8 @@
gen_highpart_mode (SImode, DImode, operands[2]));
}"
[(set_attr "type" "neon_int_1,neon_int_1,multiple,multiple,multiple,multiple,neon_int_1,neon_int_1")
[(set_attr "type" "neon_logic,neon_logic,multiple,multiple,multiple,\
multiple,neon_logic,neon_logic")
(set_attr "length" "*,*,8,8,8,8,*,*")
(set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,*,*,avoid_neon_for_64bits,avoid_neon_for_64bits")]
)
@ -3194,7 +3268,7 @@
}"
[(set_attr "length" "*,8,8,8,8,*")
(set_attr "type" "neon_int_1,multiple,multiple,multiple,multiple,neon_int_1")
(set_attr "type" "neon_logic,multiple,multiple,multiple,multiple,neon_logic")
(set_attr "arch" "neon_for_64bits,*,*,*,*,avoid_neon_for_64bits")]
)
@ -4922,7 +4996,7 @@
}"
[(set_attr "length" "*,8,8,*")
(set_attr "predicable" "no,yes,yes,no")
(set_attr "type" "neon_int_1,multiple,multiple,neon_int_1")
(set_attr "type" "neon_move,multiple,multiple,neon_move")
(set_attr "arch" "neon_for_64bits,*,*,avoid_neon_for_64bits")]
)

18
gcc/config/arm/iterators.md
View File

@ -355,6 +355,12 @@
(DI "64") (V2DI "64")
(V2SF "32") (V4SF "32")])
(define_mode_attr V_elem_ch [(V8QI "b") (V16QI "b")
(V4HI "h") (V8HI "h")
(V2SI "s") (V4SI "s")
(DI "d") (V2DI "d")
(V2SF "s") (V4SF "s")])
;; Element sizes for duplicating ARM registers to all elements of a vector.
(define_mode_attr VD_dup [(V8QI "8") (V4HI "16") (V2SI "32") (V2SF "32")])
@ -452,6 +458,14 @@
(define_mode_attr vfp_type [(SF "s") (DF "d")])
(define_mode_attr vfp_double_cond [(SF "") (DF "&& TARGET_VFP_DOUBLE")])
;; Mode attribute used to build the "type" attribute.
(define_mode_attr q [(V8QI "") (V16QI "_q")
(V4HI "") (V8HI "_q")
(V2SI "") (V4SI "_q")
(V2SF "") (V4SF "_q")
(DI "") (V2DI "_q")
(DF "") (V2DF "_q")])
;;----------------------------------------------------------------------------
;; Code attributes
;;----------------------------------------------------------------------------
@ -460,6 +474,10 @@
(define_code_attr VQH_mnem [(plus "vadd") (smin "vmin") (smax "vmax")
(umin "vmin") (umax "vmax")])
;; Type attributes for vqh_ops and vqhs_ops iterators.
(define_code_attr VQH_type [(plus "add") (smin "minmax") (smax "minmax")
(umin "minmax") (umax "minmax")])
;; Signs of above, where relevant.
(define_code_attr VQH_sign [(plus "i") (smin "s") (smax "s") (umin "u")
(umax "u")])

917
gcc/config/arm/neon.md
View File

File diff suppressed because it is too large Load Diff

2
gcc/config/arm/vfp.md
View File

@ -260,7 +260,7 @@
}
"
[(set_attr "conds" "unconditional")
(set_attr "type" "neon_vld1_1_2_regs,neon_vst1_1_2_regs_vst2_2_regs,\
(set_attr "type" "neon_load1_1reg,neon_store1_1reg,\
load1,store1,fmov,mov_reg,f_mcr,f_mrc,multiple")
(set_attr "length" "4,4,4,4,4,4,4,4,8")]
)