re PR target/24861 (internal compiler error when building gcc with --with-cpu=ep9312 --with-fpu=maverick)
PR target/24861 * arm.md (split for movsf with immediate): Restrict split to insns that set a general register. From-SVN: r107104
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2005-11-16 Richard Earnshaw <richard.earnshaw@arm.com>
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PR target/24861
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* arm.md (split for movsf with immediate): Restrict split to insns
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that set a general register.
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2005-11-16 Daniel Jacobowitz <dan@codesourcery.com>
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* config/ia64/unwind-ia64.c (uw_advance_context): New. Call
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@ -5137,11 +5137,12 @@
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"
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)
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;; Transform a floating-point move of a constant into a core register into
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;; an SImode operation.
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(define_split
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[(set (match_operand:SF 0 "nonimmediate_operand" "")
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[(set (match_operand:SF 0 "arm_general_register_operand" "")
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(match_operand:SF 1 "immediate_operand" ""))]
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"TARGET_ARM
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&& !(TARGET_HARD_FLOAT && TARGET_FPA)
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&& reload_completed
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&& GET_CODE (operands[1]) == CONST_DOUBLE"
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[(set (match_dup 2) (match_dup 3))]
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