AVX512FP16: Add testcase for vaddph/vsubph/vmulph/vdivph.
gcc/testsuite/ChangeLog: * gcc.target/i386/avx512fp16-helper.h: New header file for FP16 runtime test. * gcc.target/i386/avx512fp16-vaddph-1a.c: New test. * gcc.target/i386/avx512fp16-vaddph-1b.c: Ditto. * gcc.target/i386/avx512fp16-vdivph-1a.c: Ditto. * gcc.target/i386/avx512fp16-vdivph-1b.c: Ditto. * gcc.target/i386/avx512fp16-vmulph-1a.c: Ditto. * gcc.target/i386/avx512fp16-vmulph-1b.c: Ditto. * gcc.target/i386/avx512fp16-vsubph-1a.c: Ditto. * gcc.target/i386/avx512fp16-vsubph-1b.c: Ditto. * gcc.target/i386/avx512fp16vl-vaddph-1a.c: Ditto. * gcc.target/i386/avx512fp16vl-vaddph-1b.c: Ditto. * gcc.target/i386/avx512fp16vl-vdivph-1a.c: Ditto. * gcc.target/i386/avx512fp16vl-vdivph-1b.c: Ditto. * gcc.target/i386/avx512fp16vl-vmulph-1a.c: Ditto. * gcc.target/i386/avx512fp16vl-vmulph-1b.c: Ditto. * gcc.target/i386/avx512fp16vl-vsubph-1a.c: Ditto. * gcc.target/i386/avx512fp16vl-vsubph-1b.c: Ditto.
This commit is contained in:
liuhongt
parent
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commit
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207
gcc/testsuite/gcc.target/i386/avx512fp16-helper.h
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207
gcc/testsuite/gcc.target/i386/avx512fp16-helper.h
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/* This file is used for emulation of avx512fp16 runtime tests. To
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verify the correctness of _Float16 type calculation, the idea is
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convert _Float16 to float and do emulation using float instructions.
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_Float16 type should not be emulate or check by itself. */
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#include "avx512f-helper.h"
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#ifndef AVX512FP16_HELPER_INCLUDED
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#define AVX512FP16_HELPER_INCLUDED
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#ifdef DEBUG
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#include <string.h>
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#endif
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#include <math.h>
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#include <limits.h>
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#include <float.h>
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/* Useful macros. */
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#define NOINLINE __attribute__((noinline,noclone))
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#define _ROUND_NINT (_MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC)
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#define AVX512F_MAX_ELEM 512 / 32
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/* Structure for _Float16 emulation */
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typedef union
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{
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__m512 zmm;
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__m512h zmmh;
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__m256 ymm[2];
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__m256h ymmh[2];
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__m256i ymmi[2];
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__m128h xmmh[4];
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unsigned short u16[32];
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unsigned int u32[16];
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float f32[16];
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_Float16 f16[32];
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} V512;
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/* Global variables. */
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V512 src1, src2, src3;
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int n_errs = 0;
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/* Helper function for packing/unpacking ph operands. */
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void NOINLINE
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unpack_ph_2twops(V512 src, V512 *op1, V512 *op2)
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{
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V512 v1;
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op1->zmm = _mm512_cvtph_ps(src.ymmi[0]);
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v1.ymm[0] = _mm512_extractf32x8_ps(src.zmm, 1);
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op2->zmm = _mm512_cvtph_ps(v1.ymmi[0]);
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}
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V512 NOINLINE
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pack_twops_2ph(V512 op1, V512 op2)
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{
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V512 v1, v2, v3;
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v1.ymmi[0] = _mm512_cvtps_ph(op1.zmm, _MM_FROUND_TO_NEAREST_INT);
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v2.ymmi[0] = _mm512_cvtps_ph(op2.zmm, _MM_FROUND_TO_NEAREST_INT);
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v3.zmm = _mm512_insertf32x8(v1.zmm, v2.ymm[0], 1);
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return v3;
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}
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/* Helper function used for result debugging */
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#ifdef DEBUG
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void NOINLINE
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display_ps(const void *p, const char *banner, int n_elems)
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{
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int i;
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V512 *v = (V512*)p;
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if (banner) {
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printf("%s", banner);
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}
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for (i = 15; i >= n_elems; i--) {
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printf(" --------");
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if (i == 8) {
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printf("\n");
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if (banner) {
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printf("%*s", (int)strlen(banner), "");
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}
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}
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}
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for (; i >= 0; i--) {
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printf(" %x", v->u32[i]);
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if (i == 8) {
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printf("\n");
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if (banner) {
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printf("%*s", (int)strlen(banner), "");
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}
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}
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}
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printf("\n");
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}
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#endif
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/* Functions/macros used for init/result checking.
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Only check components within AVX512F_LEN. */
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#define TO_STRING(x) #x
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#define STRINGIFY(x) TO_STRING(x)
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#define NAME_OF(NAME) STRINGIFY(INTRINSIC (NAME))
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#define CHECK_RESULT(res, exp, size, intrin) \
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check_results ((void*)res, (void*)exp, size,\
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NAME_OF(intrin))
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/* To evaluate whether result match _Float16 precision,
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only the last bit of real/emulate result could be
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different. */
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void NOINLINE
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check_results(void *got, void *exp, int n_elems, char *banner)
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{
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int i;
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V512 *v1 = (V512*)got;
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V512 *v2 = (V512*)exp;
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for (i = 0; i < n_elems; i++) {
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if (v1->u16[i] != v2->u16[i] &&
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((v1->u16[i] > (v2->u16[i] + 1)) ||
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(v1->u16[i] < (v2->u16[i] - 1)))) {
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#ifdef DEBUG
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printf("ERROR: %s failed at %d'th element: %x(%f) != %x(%f)\n",
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banner ? banner : "", i,
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v1->u16[i], *(float *)(&v1->u16[i]),
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v2->u16[i], *(float *)(&v2->u16[i]));
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display_ps(got, "got:", n_elems);
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display_ps(exp, "exp:", n_elems);
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#endif
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n_errs++;
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break;
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}
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}
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}
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/* Functions for src/dest initialization */
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void NOINLINE
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init_src()
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{
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V512 v1, v2, v3, v4;
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int i;
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for (i = 0; i < AVX512F_MAX_ELEM; i++) {
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v1.f32[i] = -i + 1;
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v2.f32[i] = i * 0.5f;
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v3.f32[i] = i * 2.5f;
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v4.f32[i] = i - 0.5f;
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src3.u32[i] = (i + 1) * 10;
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}
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src1 = pack_twops_2ph(v1, v2);
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src2 = pack_twops_2ph(v3, v4);
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}
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void NOINLINE
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init_dest(V512 * res, V512 * exp)
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{
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int i;
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V512 v1;
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for (i = 0; i < AVX512F_MAX_ELEM; i++) {
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v1.f32[i] = 12 + 0.5f * i;
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}
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*res = *exp = pack_twops_2ph(v1, v1);
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}
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#define EMULATE(NAME) EVAL(emulate_, NAME, AVX512F_LEN)
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#endif /* AVX512FP16_HELPER_INCLUDED */
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/* Macros for AVX512VL Testing. Include V512 component usage
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and mask type for emulation. */
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#if AVX512F_LEN == 256
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#undef HF
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#undef SF
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#undef NET_MASK
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#undef MASK_VALUE
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#undef ZMASK_VALUE
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#define NET_MASK 0xffff
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#define MASK_VALUE 0xcccc
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#define ZMASK_VALUE 0xfcc1
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#define HF(x) x.ymmh[0]
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#define SF(x) x.ymm[0]
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#elif AVX512F_LEN == 128
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#undef HF
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#undef SF
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#undef NET_MASK
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#undef MASK_VALUE
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#undef ZMASK_VALUE
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#define NET_MASK 0xff
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#define MASK_VALUE 0xcc
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#define ZMASK_VALUE 0xc1
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#define HF(x) x.xmmh[0]
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#define SF(x) x.xmm[0]
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#else
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#define NET_MASK 0xffffffff
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#define MASK_VALUE 0xcccccccc
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#define ZMASK_VALUE 0xfcc1fcc1
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#define HF(x) x.zmmh
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#define SF(x) x.zmm
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#endif
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26
gcc/testsuite/gcc.target/i386/avx512fp16-vaddph-1a.c
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gcc/testsuite/gcc.target/i386/avx512fp16-vaddph-1a.c
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/* { dg-do compile } */
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/* { dg-options "-mavx512fp16 -O2" } */
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/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
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/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
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/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
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/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
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/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
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/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
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#include <immintrin.h>
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volatile __m512h res, res1, res2;
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volatile __m512h x1, x2;
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volatile __mmask32 m32;
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void extern
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avx512f_test (void)
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{
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res = _mm512_add_ph (x1, x2);
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res1 = _mm512_mask_add_ph (res1, m32, x1, x2);
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res2 = _mm512_maskz_add_ph (m32, x1, x2);
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res = _mm512_add_round_ph (x1, x2, 8);
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res1 = _mm512_mask_add_round_ph (res1, m32, x1, x2, 8);
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res2 = _mm512_maskz_add_round_ph (m32, x1, x2, 11);
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}
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92
gcc/testsuite/gcc.target/i386/avx512fp16-vaddph-1b.c
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gcc/testsuite/gcc.target/i386/avx512fp16-vaddph-1b.c
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/* { dg-do run { target avx512fp16 } } */
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/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
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#define AVX512FP16
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#include "avx512fp16-helper.h"
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#define N_ELEMS (AVX512F_LEN / 16)
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void NOINLINE
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EMULATE(add_ph) (V512 * dest, V512 op1, V512 op2,
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__mmask32 k, int zero_mask)
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{
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V512 v1, v2, v3, v4, v5, v6, v7, v8;
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int i;
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__mmask16 m1, m2;
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m1 = k & 0xffff;
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m2 = (k >> 16) & 0xffff;
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unpack_ph_2twops(op1, &v1, &v2);
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unpack_ph_2twops(op2, &v3, &v4);
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unpack_ph_2twops(*dest, &v7, &v8);
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for (i = 0; i < 16; i++) {
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if (((1 << i) & m1) == 0) {
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if (zero_mask) {
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v5.f32[i] = 0;
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}
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else {
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v5.u32[i] = v7.u32[i];
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}
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}
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else {
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v5.f32[i] = v1.f32[i] + v3.f32[i];
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}
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if (((1 << i) & m2) == 0) {
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if (zero_mask) {
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v6.f32[i] = 0;
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}
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else {
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v6.u32[i] = v8.u32[i];
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}
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}
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else {
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v6.f32[i] = v2.f32[i] + v4.f32[i];
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}
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}
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*dest = pack_twops_2ph(v5, v6);
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}
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void
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TEST (void)
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{
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V512 res;
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V512 exp;
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init_src();
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EMULATE(add_ph) (&exp, src1, src2, NET_MASK, 0);
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HF(res) = INTRINSIC (_add_ph) (HF(src1), HF(src2));
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CHECK_RESULT (&res, &exp, N_ELEMS, _add_ph);
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init_dest(&res, &exp);
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EMULATE(add_ph) (&exp, src1, src2, MASK_VALUE, 0);
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HF(res) = INTRINSIC (_mask_add_ph) (HF(res), MASK_VALUE, HF(src1), HF(src2));
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CHECK_RESULT (&res, &exp, N_ELEMS, _mask_add_ph);
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EMULATE(add_ph) (&exp, src1, src2, ZMASK_VALUE, 1);
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HF(res) = INTRINSIC (_maskz_add_ph) (ZMASK_VALUE, HF(src1), HF(src2));
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CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_add_ph);
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#if AVX512F_LEN == 512
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EMULATE(add_ph) (&exp, src1, src2, NET_MASK, 0);
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HF(res) = INTRINSIC (_add_round_ph) (HF(src1), HF(src2), _ROUND_NINT);
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CHECK_RESULT (&res, &exp, N_ELEMS, _add_round_ph);
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init_dest(&res, &exp);
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EMULATE(add_ph) (&exp, src1, src2, MASK_VALUE, 0);
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HF(res) = INTRINSIC (_mask_add_round_ph) (HF(res), MASK_VALUE, HF(src1), HF(src2), _ROUND_NINT);
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CHECK_RESULT (&res, &exp, N_ELEMS, _mask_add_round_ph);
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EMULATE(add_ph) (&exp, src1, src2, ZMASK_VALUE, 1);
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HF(res) = INTRINSIC (_maskz_add_round_ph) (ZMASK_VALUE, HF(src1), HF(src2), _ROUND_NINT);
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CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_add_round_ph);
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#endif
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if (n_errs != 0) {
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abort ();
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}
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}
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26
gcc/testsuite/gcc.target/i386/avx512fp16-vdivph-1a.c
Normal file
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gcc/testsuite/gcc.target/i386/avx512fp16-vdivph-1a.c
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/* { dg-do compile } */
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/* { dg-options "-mavx512fp16 -O2" } */
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/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
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/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
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/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
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/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
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/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
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/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
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#include <immintrin.h>
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volatile __m512h res, res1, res2;
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volatile __m512h x1, x2;
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volatile __mmask32 m32;
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void extern
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avx512f_test (void)
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{
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res = _mm512_div_ph (x1, x2);
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res1 = _mm512_mask_div_ph (res1, m32, x1, x2);
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res2 = _mm512_maskz_div_ph (m32, x1, x2);
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res = _mm512_div_round_ph (x1, x2, 8);
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res1 = _mm512_mask_div_round_ph (res1, m32, x1, x2, 8);
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res2 = _mm512_maskz_div_round_ph (m32, x1, x2, 11);
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}
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||||
97
gcc/testsuite/gcc.target/i386/avx512fp16-vdivph-1b.c
Normal file
97
gcc/testsuite/gcc.target/i386/avx512fp16-vdivph-1b.c
Normal file
@ -0,0 +1,97 @@
|
||||
/* { dg-do run { target avx512fp16 } } */
|
||||
/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
|
||||
|
||||
|
||||
#define AVX512FP16
|
||||
#include "avx512fp16-helper.h"
|
||||
|
||||
#define N_ELEMS (AVX512F_LEN / 16)
|
||||
|
||||
void NOINLINE
|
||||
EMULATE(div_ph) (V512 * dest, V512 op1, V512 op2,
|
||||
__mmask32 k, int zero_mask)
|
||||
{
|
||||
V512 v1, v2, v3, v4, v5, v6, v7, v8;
|
||||
int i;
|
||||
__mmask16 m1, m2;
|
||||
|
||||
m1 = k & 0xffff;
|
||||
m2 = (k >> 16) & 0xffff;
|
||||
|
||||
unpack_ph_2twops(op1, &v1, &v2);
|
||||
unpack_ph_2twops(op2, &v3, &v4);
|
||||
unpack_ph_2twops(*dest, &v7, &v8);
|
||||
|
||||
for (i = 0; i < 16; i++) {
|
||||
if (((1 << i) & m1) == 0) {
|
||||
if (zero_mask) {
|
||||
v5.f32[i] = 0;
|
||||
}
|
||||
else {
|
||||
v5.u32[i] = v7.u32[i];
|
||||
}
|
||||
}
|
||||
else {
|
||||
v5.f32[i] = v1.f32[i] / v3.f32[i];
|
||||
}
|
||||
|
||||
if (((1 << i) & m2) == 0) {
|
||||
if (zero_mask) {
|
||||
v6.f32[i] = 0;
|
||||
}
|
||||
else {
|
||||
v6.u32[i] = v8.u32[i];
|
||||
}
|
||||
}
|
||||
else {
|
||||
v6.f32[i] = v2.f32[i] / v4.f32[i];
|
||||
}
|
||||
|
||||
}
|
||||
*dest = pack_twops_2ph(v5, v6);
|
||||
}
|
||||
|
||||
void
|
||||
TEST (void)
|
||||
{
|
||||
V512 res;
|
||||
V512 exp;
|
||||
|
||||
init_src();
|
||||
|
||||
EMULATE(div_ph) (&exp, src1, src2, NET_MASK, 0);
|
||||
HF(res) = INTRINSIC (_div_ph) (HF(src1), HF(src2));
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _div_ph);
|
||||
|
||||
init_dest(&res, &exp);
|
||||
EMULATE(div_ph) (&exp, src1, src2, MASK_VALUE, 0);
|
||||
HF(res) = INTRINSIC (_mask_div_ph) (HF(res), MASK_VALUE, HF(src1), HF(src2));
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _mask_div_ph);
|
||||
|
||||
EMULATE(div_ph) (&exp, src1, src2, ZMASK_VALUE, 1);
|
||||
HF(res) = INTRINSIC (_maskz_div_ph) (ZMASK_VALUE, HF(src1), HF(src2));
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_div_ph);
|
||||
|
||||
#if AVX512F_LEN == 512
|
||||
#if AVX512F_LEN == 512
|
||||
EMULATE(div_ph) (&exp, src1, src2, NET_MASK, 0);
|
||||
HF(res) = INTRINSIC (_div_round_ph) (HF(src1), HF(src2), _ROUND_NINT);
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _div_ph);
|
||||
|
||||
init_dest(&res, &exp);
|
||||
EMULATE(div_ph) (&exp, src1, src2, MASK_VALUE, 0);
|
||||
HF(res) = INTRINSIC (_mask_div_round_ph) (HF(res), MASK_VALUE, HF(src1), HF(src2), _ROUND_NINT);
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _mask_div_ph);
|
||||
|
||||
EMULATE(div_ph) (&exp, src1, src2, ZMASK_VALUE, 1);
|
||||
HF(res) = INTRINSIC (_maskz_div_round_ph) (ZMASK_VALUE, HF(src1), HF(src2), _ROUND_NINT);
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_div_ph);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
if (n_errs != 0) {
|
||||
abort ();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
26
gcc/testsuite/gcc.target/i386/avx512fp16-vmulph-1a.c
Normal file
26
gcc/testsuite/gcc.target/i386/avx512fp16-vmulph-1a.c
Normal file
@ -0,0 +1,26 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512fp16 -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
volatile __m512h res, res1, res2;
|
||||
volatile __m512h x1, x2;
|
||||
volatile __mmask32 m32;
|
||||
|
||||
void extern
|
||||
avx512f_test (void)
|
||||
{
|
||||
res = _mm512_mul_ph (x1, x2);
|
||||
res1 = _mm512_mask_mul_ph (res1, m32, x1, x2);
|
||||
res2 = _mm512_maskz_mul_ph (m32, x1, x2);
|
||||
|
||||
res = _mm512_mul_round_ph (x1, x2, 8);
|
||||
res1 = _mm512_mask_mul_round_ph (res1, m32, x1, x2, 8);
|
||||
res2 = _mm512_maskz_mul_round_ph (m32, x1, x2, 11);
|
||||
}
|
||||
92
gcc/testsuite/gcc.target/i386/avx512fp16-vmulph-1b.c
Normal file
92
gcc/testsuite/gcc.target/i386/avx512fp16-vmulph-1b.c
Normal file
@ -0,0 +1,92 @@
|
||||
/* { dg-do run { target avx512fp16 } } */
|
||||
/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
|
||||
|
||||
#define AVX512FP16
|
||||
#include "avx512fp16-helper.h"
|
||||
|
||||
#define N_ELEMS (AVX512F_LEN / 16)
|
||||
|
||||
void NOINLINE
|
||||
EMULATE(mul_ph) (V512 * dest, V512 op1, V512 op2,
|
||||
__mmask32 k, int zero_mask)
|
||||
{
|
||||
V512 v1, v2, v3, v4, v5, v6, v7, v8;
|
||||
int i;
|
||||
__mmask16 m1, m2;
|
||||
|
||||
m1 = k & 0xffff;
|
||||
m2 = (k >> 16) & 0xffff;
|
||||
|
||||
unpack_ph_2twops(op1, &v1, &v2);
|
||||
unpack_ph_2twops(op2, &v3, &v4);
|
||||
unpack_ph_2twops(*dest, &v7, &v8);
|
||||
|
||||
for (i = 0; i < 16; i++) {
|
||||
if (((1 << i) & m1) == 0) {
|
||||
if (zero_mask) {
|
||||
v5.f32[i] = 0;
|
||||
}
|
||||
else {
|
||||
v5.u32[i] = v7.u32[i];
|
||||
}
|
||||
}
|
||||
else {
|
||||
v5.f32[i] = v1.f32[i] * v3.f32[i];
|
||||
}
|
||||
|
||||
if (((1 << i) & m2) == 0) {
|
||||
if (zero_mask) {
|
||||
v6.f32[i] = 0;
|
||||
}
|
||||
else {
|
||||
v6.u32[i] = v8.u32[i];
|
||||
}
|
||||
}
|
||||
else {
|
||||
v6.f32[i] = v2.f32[i] * v4.f32[i];
|
||||
}
|
||||
|
||||
}
|
||||
*dest = pack_twops_2ph(v5, v6);
|
||||
}
|
||||
|
||||
void
|
||||
TEST (void)
|
||||
{
|
||||
V512 res;
|
||||
V512 exp;
|
||||
|
||||
init_src();
|
||||
|
||||
EMULATE(mul_ph) (&exp, src1, src2, NET_MASK, 0);
|
||||
HF(res) = INTRINSIC (_mul_ph) (HF(src1), HF(src2));
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _mul_ph);
|
||||
|
||||
init_dest(&res, &exp);
|
||||
EMULATE(mul_ph) (&exp, src1, src2, MASK_VALUE, 0);
|
||||
HF(res) = INTRINSIC (_mask_mul_ph) (HF(res), MASK_VALUE, HF(src1), HF(src2));
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _mask_mul_ph);
|
||||
|
||||
EMULATE(mul_ph) (&exp, src1, src2, ZMASK_VALUE, 1);
|
||||
HF(res) = INTRINSIC (_maskz_mul_ph) (ZMASK_VALUE, HF(src1), HF(src2));
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_mul_ph);
|
||||
|
||||
#if AVX512F_LEN == 512
|
||||
EMULATE(mul_ph) (&exp, src1, src2, NET_MASK, 0);
|
||||
HF(res) = INTRINSIC (_mul_round_ph) (HF(src1), HF(src2), _ROUND_NINT);
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _mul_ph);
|
||||
|
||||
init_dest(&res, &exp);
|
||||
EMULATE(mul_ph) (&exp, src1, src2, MASK_VALUE, 0);
|
||||
HF(res) = INTRINSIC (_mask_mul_round_ph) (HF(res), MASK_VALUE, HF(src1), HF(src2), _ROUND_NINT);
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _mask_mul_ph);
|
||||
|
||||
EMULATE(mul_ph) (&exp, src1, src2, ZMASK_VALUE, 1);
|
||||
HF(res) = INTRINSIC (_maskz_mul_round_ph) (ZMASK_VALUE, HF(src1), HF(src2), _ROUND_NINT);
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_mul_ph);
|
||||
#endif
|
||||
|
||||
if (n_errs != 0) {
|
||||
abort ();
|
||||
}
|
||||
}
|
||||
26
gcc/testsuite/gcc.target/i386/avx512fp16-vsubph-1a.c
Normal file
26
gcc/testsuite/gcc.target/i386/avx512fp16-vsubph-1a.c
Normal file
@ -0,0 +1,26 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512fp16 -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
volatile __m512h res, res1, res2;
|
||||
volatile __m512h x1, x2;
|
||||
volatile __mmask32 m32;
|
||||
|
||||
void extern
|
||||
avx512f_test (void)
|
||||
{
|
||||
res = _mm512_sub_ph (x1, x2);
|
||||
res1 = _mm512_mask_sub_ph (res1, m32, x1, x2);
|
||||
res2 = _mm512_maskz_sub_ph (m32, x1, x2);
|
||||
|
||||
res = _mm512_sub_round_ph (x1, x2, 8);
|
||||
res1 = _mm512_mask_sub_round_ph (res1, m32, x1, x2, 8);
|
||||
res2 = _mm512_maskz_sub_round_ph (m32, x1, x2, 11);
|
||||
}
|
||||
93
gcc/testsuite/gcc.target/i386/avx512fp16-vsubph-1b.c
Normal file
93
gcc/testsuite/gcc.target/i386/avx512fp16-vsubph-1b.c
Normal file
@ -0,0 +1,93 @@
|
||||
/* { dg-do run { target avx512fp16 } } */
|
||||
/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
|
||||
|
||||
#define AVX512FP16
|
||||
#include "avx512fp16-helper.h"
|
||||
|
||||
#define N_ELEMS (AVX512F_LEN / 16)
|
||||
|
||||
void NOINLINE
|
||||
EMULATE(sub_ph) (V512 * dest, V512 op1, V512 op2,
|
||||
__mmask32 k, int zero_mask)
|
||||
{
|
||||
V512 v1, v2, v3, v4, v5, v6, v7, v8;
|
||||
int i;
|
||||
__mmask16 m1, m2;
|
||||
|
||||
m1 = k & 0xffff;
|
||||
m2 = (k >> 16) & 0xffff;
|
||||
|
||||
unpack_ph_2twops(op1, &v1, &v2);
|
||||
unpack_ph_2twops(op2, &v3, &v4);
|
||||
unpack_ph_2twops(*dest, &v7, &v8);
|
||||
|
||||
for (i = 0; i < 16; i++) {
|
||||
if (((1 << i) & m1) == 0) {
|
||||
if (zero_mask) {
|
||||
v5.f32[i] = 0;
|
||||
}
|
||||
else {
|
||||
v5.u32[i] = v7.u32[i];
|
||||
}
|
||||
}
|
||||
else {
|
||||
v5.f32[i] = v1.f32[i] - v3.f32[i];
|
||||
}
|
||||
|
||||
if (((1 << i) & m2) == 0) {
|
||||
if (zero_mask) {
|
||||
v6.f32[i] = 0;
|
||||
}
|
||||
else {
|
||||
v6.u32[i] = v8.u32[i];
|
||||
}
|
||||
}
|
||||
else {
|
||||
v6.f32[i] = v2.f32[i] - v4.f32[i];
|
||||
}
|
||||
|
||||
}
|
||||
*dest = pack_twops_2ph(v5, v6);
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
TEST (void)
|
||||
{
|
||||
V512 res;
|
||||
V512 exp;
|
||||
|
||||
init_src();
|
||||
|
||||
EMULATE(sub_ph) (&exp, src1, src2, NET_MASK, 0);
|
||||
HF(res) = INTRINSIC (_sub_ph) (HF(src1), HF(src2));
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _sub_ph);
|
||||
|
||||
init_dest(&res, &exp);
|
||||
EMULATE(sub_ph) (&exp, src1, src2, MASK_VALUE, 0);
|
||||
HF(res) = INTRINSIC (_mask_sub_ph) (HF(res), MASK_VALUE, HF(src1), HF(src2));
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _mask_sub_ph);
|
||||
|
||||
EMULATE(sub_ph) (&exp, src1, src2, ZMASK_VALUE, 1);
|
||||
HF(res) = INTRINSIC (_maskz_sub_ph) (ZMASK_VALUE, HF(src1), HF(src2));
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_sub_ph);
|
||||
|
||||
#if AVX512F_LEN == 512
|
||||
EMULATE(sub_ph) (&exp, src1, src2, NET_MASK, 0);
|
||||
HF(res) = INTRINSIC (_sub_round_ph) (HF(src1), HF(src2), _ROUND_NINT);
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _sub_ph);
|
||||
|
||||
init_dest(&res, &exp);
|
||||
EMULATE(sub_ph) (&exp, src1, src2, MASK_VALUE, 0);
|
||||
HF(res) = INTRINSIC (_mask_sub_round_ph) (HF(res), MASK_VALUE, HF(src1), HF(src2), _ROUND_NINT);
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _mask_sub_ph);
|
||||
|
||||
EMULATE(sub_ph) (&exp, src1, src2, ZMASK_VALUE, 1);
|
||||
HF(res) = INTRINSIC (_maskz_sub_round_ph) (ZMASK_VALUE, HF(src1), HF(src2), _ROUND_NINT);
|
||||
CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_sub_ph);
|
||||
#endif
|
||||
|
||||
if (n_errs != 0) {
|
||||
abort ();
|
||||
}
|
||||
}
|
||||
29
gcc/testsuite/gcc.target/i386/avx512fp16vl-vaddph-1a.c
Normal file
29
gcc/testsuite/gcc.target/i386/avx512fp16vl-vaddph-1a.c
Normal file
@ -0,0 +1,29 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
volatile __m256h res1;
|
||||
volatile __m128h res2;
|
||||
volatile __m256h x1,x2;
|
||||
volatile __m128h x3, x4;
|
||||
volatile __mmask16 m16;
|
||||
volatile __mmask8 m8;
|
||||
|
||||
void extern
|
||||
avx512f_test (void)
|
||||
{
|
||||
res1 = _mm256_add_ph (x1, x2);
|
||||
res1 = _mm256_mask_add_ph (res1, m16, x1, x2);
|
||||
res1 = _mm256_maskz_add_ph (m16, x1, x2);
|
||||
|
||||
res2 = _mm_add_ph (x3, x4);
|
||||
res2 = _mm_mask_add_ph (res2, m8, x3, x4);
|
||||
res2 = _mm_maskz_add_ph (m8, x3, x4);
|
||||
}
|
||||
16
gcc/testsuite/gcc.target/i386/avx512fp16vl-vaddph-1b.c
Normal file
16
gcc/testsuite/gcc.target/i386/avx512fp16vl-vaddph-1b.c
Normal file
@ -0,0 +1,16 @@
|
||||
/* { dg-do run { target avx512fp16 } } */
|
||||
/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
|
||||
|
||||
#define DEBUG
|
||||
#define AVX512VL
|
||||
#define AVX512F_LEN 256
|
||||
#define AVX512F_LEN_HALF 128
|
||||
#include "avx512fp16-vaddph-1b.c"
|
||||
|
||||
#undef AVX512F_LEN
|
||||
#undef AVX512F_LEN_HALF
|
||||
|
||||
#define AVX512F_LEN 128
|
||||
#define AVX512F_LEN_HALF 128
|
||||
#include "avx512fp16-vaddph-1b.c"
|
||||
|
||||
29
gcc/testsuite/gcc.target/i386/avx512fp16vl-vdivph-1a.c
Normal file
29
gcc/testsuite/gcc.target/i386/avx512fp16vl-vdivph-1a.c
Normal file
@ -0,0 +1,29 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
volatile __m256h res1;
|
||||
volatile __m128h res2;
|
||||
volatile __m256h x1,x2;
|
||||
volatile __m128h x3, x4;
|
||||
volatile __mmask16 m16;
|
||||
volatile __mmask8 m8;
|
||||
|
||||
void extern
|
||||
avx512f_test (void)
|
||||
{
|
||||
res1 = _mm256_div_ph (x1, x2);
|
||||
res1 = _mm256_mask_div_ph (res1, m16, x1, x2);
|
||||
res1 = _mm256_maskz_div_ph (m16, x1, x2);
|
||||
|
||||
res2 = _mm_div_ph (x3, x4);
|
||||
res2 = _mm_mask_div_ph (res2, m8, x3, x4);
|
||||
res2 = _mm_maskz_div_ph (m8, x3, x4);
|
||||
}
|
||||
16
gcc/testsuite/gcc.target/i386/avx512fp16vl-vdivph-1b.c
Normal file
16
gcc/testsuite/gcc.target/i386/avx512fp16vl-vdivph-1b.c
Normal file
@ -0,0 +1,16 @@
|
||||
/* { dg-do run { target avx512fp16 } } */
|
||||
/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
|
||||
|
||||
#define DEBUG
|
||||
#define AVX512VL
|
||||
#define AVX512F_LEN 256
|
||||
#define AVX512F_LEN_HALF 128
|
||||
#include "avx512fp16-vdivph-1b.c"
|
||||
|
||||
#undef AVX512F_LEN
|
||||
#undef AVX512F_LEN_HALF
|
||||
|
||||
#define AVX512F_LEN 128
|
||||
#define AVX512F_LEN_HALF 128
|
||||
#include "avx512fp16-vdivph-1b.c"
|
||||
|
||||
29
gcc/testsuite/gcc.target/i386/avx512fp16vl-vmulph-1a.c
Normal file
29
gcc/testsuite/gcc.target/i386/avx512fp16vl-vmulph-1a.c
Normal file
@ -0,0 +1,29 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
volatile __m256h res1;
|
||||
volatile __m128h res2;
|
||||
volatile __m256h x1,x2;
|
||||
volatile __m128h x3, x4;
|
||||
volatile __mmask16 m16;
|
||||
volatile __mmask8 m8;
|
||||
|
||||
void extern
|
||||
avx512f_test (void)
|
||||
{
|
||||
res1 = _mm256_mul_ph (x1, x2);
|
||||
res1 = _mm256_mask_mul_ph (res1, m16, x1, x2);
|
||||
res1 = _mm256_maskz_mul_ph (m16, x1, x2);
|
||||
|
||||
res2 = _mm_mul_ph (x3, x4);
|
||||
res2 = _mm_mask_mul_ph (res2, m8, x3, x4);
|
||||
res2 = _mm_maskz_mul_ph (m8, x3, x4);
|
||||
}
|
||||
16
gcc/testsuite/gcc.target/i386/avx512fp16vl-vmulph-1b.c
Normal file
16
gcc/testsuite/gcc.target/i386/avx512fp16vl-vmulph-1b.c
Normal file
@ -0,0 +1,16 @@
|
||||
/* { dg-do run { target avx512fp16 } } */
|
||||
/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
|
||||
|
||||
#define DEBUG
|
||||
#define AVX512VL
|
||||
#define AVX512F_LEN 256
|
||||
#define AVX512F_LEN_HALF 128
|
||||
#include "avx512fp16-vmulph-1b.c"
|
||||
|
||||
#undef AVX512F_LEN
|
||||
#undef AVX512F_LEN_HALF
|
||||
|
||||
#define AVX512F_LEN 128
|
||||
#define AVX512F_LEN_HALF 128
|
||||
#include "avx512fp16-vmulph-1b.c"
|
||||
|
||||
29
gcc/testsuite/gcc.target/i386/avx512fp16vl-vsubph-1a.c
Normal file
29
gcc/testsuite/gcc.target/i386/avx512fp16vl-vsubph-1a.c
Normal file
@ -0,0 +1,29 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */
|
||||
/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
volatile __m256h res1;
|
||||
volatile __m128h res2;
|
||||
volatile __m256h x1,x2;
|
||||
volatile __m128h x3, x4;
|
||||
volatile __mmask16 m16;
|
||||
volatile __mmask8 m8;
|
||||
|
||||
void extern
|
||||
avx512f_test (void)
|
||||
{
|
||||
res1 = _mm256_sub_ph (x1, x2);
|
||||
res1 = _mm256_mask_sub_ph (res1, m16, x1, x2);
|
||||
res1 = _mm256_maskz_sub_ph (m16, x1, x2);
|
||||
|
||||
res2 = _mm_sub_ph (x3, x4);
|
||||
res2 = _mm_mask_sub_ph (res2, m8, x3, x4);
|
||||
res2 = _mm_maskz_sub_ph (m8, x3, x4);
|
||||
}
|
||||
16
gcc/testsuite/gcc.target/i386/avx512fp16vl-vsubph-1b.c
Normal file
16
gcc/testsuite/gcc.target/i386/avx512fp16vl-vsubph-1b.c
Normal file
@ -0,0 +1,16 @@
|
||||
/* { dg-do run { target avx512fp16 } } */
|
||||
/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
|
||||
|
||||
#define DEBUG
|
||||
#define AVX512VL
|
||||
#define AVX512F_LEN 256
|
||||
#define AVX512F_LEN_HALF 128
|
||||
#include "avx512fp16-vsubph-1b.c"
|
||||
|
||||
#undef AVX512F_LEN
|
||||
#undef AVX512F_LEN_HALF
|
||||
|
||||
#define AVX512F_LEN 128
|
||||
#define AVX512F_LEN_HALF 128
|
||||
#include "avx512fp16-vsubph-1b.c"
|
||||
|
||||
Loading…
Reference in New Issue
Block a user