arm.c (arm_compute_save_reg_mask): Do not save lr in case of tail call.

2015-01-14  Joey Ye  <joey.ye@arm.com>

        * config/arm/arm.c (arm_compute_save_reg_mask):
        Do not save lr in case of tail call.
        * config/arm/thumb2.md (*thumb2_pop_single): New pattern.

From-SVN: r219578
This commit is contained in:
Joey Ye 2015-01-14 08:17:15 +00:00
parent de1b5c17fd
commit f7d2b51386
3 changed files with 19 additions and 1 deletions

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@ -1,3 +1,9 @@
2015-01-14 Joey Ye <joey.ye@arm.com>
* config/arm/arm.c (arm_compute_save_reg_mask):
Do not save lr in case of tail call.
* config/arm/thumb2.md (*thumb2_pop_single): New pattern.
2015-01-13 Martin Uecker <uecker@eecs.berkeley.edu>
* tree-vrp.c (check_array_ref): Emit more warnings
@ -26,7 +32,7 @@
(gimple_init_edge_profiler): Likewise.
(gimple_gen_ic_func_profiler): Likewise.
2015-01-15 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
2015-01-13 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* ipa-inline.c (inline_small_functions): Swap the operands in
enum.

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@ -19191,6 +19191,7 @@ arm_compute_save_reg_mask (void)
|| (save_reg_mask
&& optimize_size
&& ARM_FUNC_TYPE (func_type) == ARM_FT_NORMAL
&& !crtl->tail_call_emit
&& !crtl->calls_eh_return))
save_reg_mask |= 1 << LR_REGNUM;

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@ -267,6 +267,17 @@
(set_attr "type" "multiple")]
)
;; Pop a single register as its size is preferred over a post-incremental load
(define_insn "*thumb2_pop_single"
[(set (match_operand:SI 0 "low_register_operand" "=r")
(mem:SI (post_inc:SI (reg:SI SP_REGNUM))))]
"TARGET_THUMB2 && (reload_in_progress || reload_completed)"
"pop\t{%0}"
[(set_attr "type" "load1")
(set_attr "length" "2")
(set_attr "predicable" "yes")]
)
;; We have two alternatives here for memory loads (and similarly for stores)
;; to reflect the fact that the permissible constant pool ranges differ
;; between ldr instructions taking low regs and ldr instructions taking high