From f8045c4158f628673fdb4b1b42cf210bd516b486 Mon Sep 17 00:00:00 2001 From: Bernd Schmidt Date: Fri, 27 Aug 2010 22:11:50 +0000 Subject: [PATCH] vfp.md (arm_movsi_vfp, [...]): Set attribute "insn". * config/arm/vfp.md (arm_movsi_vfp, thumb2_movsi_vfp, movsf_vfp, thumb2_movsf_vfp): Set attribute "insn". * config/arm/arm.md (arm_ashrdi3_1bit, arm_lshrdi3_1bit, not_shiftsi, not_shiftsi_compare0, not_shiftsi_compare0_scratch, arm_one_cmplsi2, thumb1_one_cmplsi2, notsi_compare0, notsi_compare0_scratch, arm_zero_extendsidi2, arm_extendsidi2, thumb1_movdi_insn, arm_movsi_insn, movhi_insn_arch4, movhi_bytes, arm_movqi_insn, thumb1_movqi_insn arm32_movhf, thumb1_movhf, arm_movsf_soft_insn, thumb1_movsf_insn, thumb_movdf_insn, mov_scc, mov_negscc, mov_notscc, movsicc_insn, movsfcc_soft_insn, and_scc, cond_move, if_move_not, if_not_move, if_shift_move, if_move_shift, if_shift_shift, if_not_arith, if_arith_not, cond_move_not): Likewise. From-SVN: r163601 --- gcc/ChangeLog | 13 +++++++++++ gcc/config/arm/arm.md | 54 +++++++++++++++++++++++++++++++++++-------- gcc/config/arm/vfp.md | 4 ++++ 3 files changed, 62 insertions(+), 9 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a83c84d95c8..07a97f52f9b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -6,6 +6,19 @@ only one element. (gen_regexp): Remove extra semicolon. + * config/arm/vfp.md (arm_movsi_vfp, thumb2_movsi_vfp, movsf_vfp, + thumb2_movsf_vfp): Set attribute "insn". + * config/arm/arm.md (arm_ashrdi3_1bit, arm_lshrdi3_1bit, not_shiftsi, + not_shiftsi_compare0, not_shiftsi_compare0_scratch, arm_one_cmplsi2, + thumb1_one_cmplsi2, notsi_compare0, notsi_compare0_scratch, + arm_zero_extendsidi2, arm_extendsidi2, thumb1_movdi_insn, + arm_movsi_insn, movhi_insn_arch4, movhi_bytes, arm_movqi_insn, + thumb1_movqi_insn arm32_movhf, thumb1_movhf, arm_movsf_soft_insn, + thumb1_movsf_insn, thumb_movdf_insn, mov_scc, mov_negscc, mov_notscc, + movsicc_insn, movsfcc_soft_insn, and_scc, cond_move, if_move_not, + if_not_move, if_shift_move, if_move_shift, if_shift_shift, + if_not_arith, if_arith_not, cond_move_not): Likewise. + 2010-08-23 Michael Meissner * config/rs6000/rs6000-protos.h (rs6000_address_for_fpconvert): diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 5a8d8ebbc18..9d7310bee9f 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3388,6 +3388,7 @@ "TARGET_32BIT" "movs\\t%R0, %R1, asr #1\;mov\\t%Q0, %Q1, rrx" [(set_attr "conds" "clob") + (set_attr "insn" "mov") (set_attr "length" "8")] ) @@ -3444,6 +3445,7 @@ "TARGET_32BIT" "movs\\t%R0, %R1, lsr #1\;mov\\t%Q0, %Q1, rrx" [(set_attr "conds" "clob") + (set_attr "insn" "mov") (set_attr "length" "8")] ) @@ -3570,6 +3572,7 @@ "mvn%?\\t%0, %1%S3" [(set_attr "predicable" "yes") (set_attr "shift" "1") + (set_attr "insn" "mvn") (set_attr "arch" "32,a") (set_attr "type" "alu_shift,alu_shift_reg")]) @@ -3586,6 +3589,7 @@ "mvn%.\\t%0, %1%S3" [(set_attr "conds" "set") (set_attr "shift" "1") + (set_attr "insn" "mvn") (set_attr "arch" "32,a") (set_attr "type" "alu_shift,alu_shift_reg")]) @@ -3601,6 +3605,7 @@ "mvn%.\\t%0, %1%S3" [(set_attr "conds" "set") (set_attr "shift" "1") + (set_attr "insn" "mvn") (set_attr "arch" "32,a") (set_attr "type" "alu_shift,alu_shift_reg")]) @@ -3860,7 +3865,8 @@ (not:SI (match_operand:SI 1 "s_register_operand" "r")))] "TARGET_32BIT" "mvn%?\\t%0, %1" - [(set_attr "predicable" "yes")] + [(set_attr "predicable" "yes") + (set_attr "insn" "mvn")] ) (define_insn "*thumb1_one_cmplsi2" @@ -3868,7 +3874,8 @@ (not:SI (match_operand:SI 1 "register_operand" "l")))] "TARGET_THUMB1" "mvn\\t%0, %1" - [(set_attr "length" "2")] + [(set_attr "length" "2") + (set_attr "insn" "mvn")] ) (define_insn "*notsi_compare0" @@ -3879,7 +3886,8 @@ (not:SI (match_dup 1)))] "TARGET_32BIT" "mvn%.\\t%0, %1" - [(set_attr "conds" "set")] + [(set_attr "conds" "set") + (set_attr "insn" "mvn")] ) (define_insn "*notsi_compare0_scratch" @@ -3889,7 +3897,8 @@ (clobber (match_scratch:SI 0 "=r"))] "TARGET_32BIT" "mvn%.\\t%0, %1" - [(set_attr "conds" "set")] + [(set_attr "conds" "set") + (set_attr "insn" "mvn")] ) ;; Fixed <--> Floating conversion insns @@ -4046,6 +4055,7 @@ return \"mov%?\\t%R0, #0\"; " [(set_attr "length" "8") + (set_attr "insn" "mov") (set_attr "predicable" "yes")] ) @@ -4089,6 +4099,7 @@ " [(set_attr "length" "8") (set_attr "shift" "1") + (set_attr "insn" "mov") (set_attr "predicable" "yes")] ) @@ -5013,6 +5024,7 @@ }" [(set_attr "length" "4,4,6,2,2,6,4,4") (set_attr "type" "*,*,*,load2,store2,load2,store2,*") + (set_attr "insn" "*,mov,*,*,*,*,*,mov") (set_attr "pool_range" "*,*,*,*,*,1020,*,*")] ) @@ -5135,6 +5147,7 @@ ldr%?\\t%0, %1 str%?\\t%1, %0" [(set_attr "type" "*,*,*,*,load1,store1") + (set_attr "insn" "mov,mov,mvn,mov,*,*") (set_attr "predicable" "yes") (set_attr "pool_range" "*,*,*,*,4096,*") (set_attr "neg_pool_range" "*,*,*,*,4084,*")] @@ -5790,6 +5803,7 @@ ldr%(h%)\\t%0, %1\\t%@ movhi" [(set_attr "type" "*,*,store1,load1") (set_attr "predicable" "yes") + (set_attr "insn" "mov,mvn,*,*") (set_attr "pool_range" "*,*,*,256") (set_attr "neg_pool_range" "*,*,*,244")] ) @@ -5801,7 +5815,8 @@ "@ mov%?\\t%0, %1\\t%@ movhi mvn%?\\t%0, #%B1\\t%@ movhi" - [(set_attr "predicable" "yes")] + [(set_attr "predicable" "yes") + (set_attr "insn" "mov,mvn")] ) (define_expand "thumb_movhi_clobber" @@ -5937,6 +5952,7 @@ ldr%(b%)\\t%0, %1 str%(b%)\\t%1, %0" [(set_attr "type" "*,*,load1,store1") + (set_attr "insn" "mov,mvn,*,*") (set_attr "predicable" "yes")] ) @@ -5955,6 +5971,7 @@ mov\\t%0, %1" [(set_attr "length" "2") (set_attr "type" "*,load1,store1,*,*,*") + (set_attr "insn" "*,*,*,mov,mov,mov") (set_attr "pool_range" "*,32,*,*,*,*") (set_attr "conds" "clob,nocond,nocond,nocond,nocond,clob")]) @@ -6020,9 +6037,9 @@ " [(set_attr "conds" "unconditional") (set_attr "type" "load1,store1,*,*") + (set_attr "insn" "*,*,mov,mov") (set_attr "length" "4,4,4,8") - (set_attr "predicable" "yes") - ] + (set_attr "predicable" "yes")] ) (define_insn "*thumb1_movhf" @@ -6056,6 +6073,7 @@ " [(set_attr "length" "2") (set_attr "type" "*,load1,store1,*,*") + (set_attr "insn" "mov,*,*,mov,mov") (set_attr "pool_range" "*,1020,*,*,*") (set_attr "conds" "clob,nocond,nocond,nocond,nocond")]) @@ -6110,6 +6128,7 @@ str%?\\t%1, %0\\t%@ float" [(set_attr "predicable" "yes") (set_attr "type" "*,load1,store1") + (set_attr "insn" "mov,*,*") (set_attr "pool_range" "*,4096,*") (set_attr "arm_neg_pool_range" "*,4084,*") (set_attr "thumb2_neg_pool_range" "*,0,*")] @@ -6133,6 +6152,7 @@ [(set_attr "length" "2") (set_attr "type" "*,load1,store1,load1,store1,*,*") (set_attr "pool_range" "*,*,*,1020,*,*,*") + (set_attr "insn" "*,*,*,*,*,mov,mov") (set_attr "conds" "clob,nocond,nocond,nocond,nocond,nocond,nocond")] ) @@ -6262,6 +6282,7 @@ " [(set_attr "length" "4,2,2,6,4,4") (set_attr "type" "*,load2,store2,load2,store2,*") + (set_attr "insn" "*,*,*,*,*,mov") (set_attr "pool_range" "*,*,*,1020,*,*")] ) @@ -7309,6 +7330,7 @@ "TARGET_ARM" "mov%D1\\t%0, #0\;mov%d1\\t%0, #1" [(set_attr "conds" "use") + (set_attr "insn" "mov") (set_attr "length" "8")] ) @@ -7319,6 +7341,7 @@ "TARGET_ARM" "mov%D1\\t%0, #0\;mvn%d1\\t%0, #0" [(set_attr "conds" "use") + (set_attr "insn" "mov") (set_attr "length" "8")] ) @@ -7329,6 +7352,7 @@ "TARGET_ARM" "mov%D1\\t%0, #0\;mvn%d1\\t%0, #1" [(set_attr "conds" "use") + (set_attr "insn" "mov") (set_attr "length" "8")] ) @@ -7692,7 +7716,8 @@ mvn%d3\\t%0, #%B1\;mov%D3\\t%0, %2 mvn%d3\\t%0, #%B1\;mvn%D3\\t%0, #%B2" [(set_attr "length" "4,4,4,4,8,8,8,8") - (set_attr "conds" "use")] + (set_attr "conds" "use") + (set_attr "insn" "mov,mvn,mov,mvn,mov,mov,mvn,mvn")] ) (define_insn "*movsfcc_soft_insn" @@ -7705,7 +7730,8 @@ "@ mov%D3\\t%0, %2 mov%d3\\t%0, %1" - [(set_attr "conds" "use")] + [(set_attr "conds" "use") + (set_attr "insn" "mov")] ) @@ -8607,6 +8633,7 @@ "TARGET_ARM" "mov%D1\\t%0, #0\;and%d1\\t%0, %2, #1" [(set_attr "conds" "use") + (set_attr "insn" "mov") (set_attr "length" "8")] ) @@ -8760,6 +8787,7 @@ return \"\"; " [(set_attr "conds" "use") + (set_attr "insn" "mov") (set_attr "length" "4,4,8")] ) @@ -9476,6 +9504,7 @@ mov%d4\\t%0, %1\;mvn%D4\\t%0, %2 mvn%d4\\t%0, #%B1\;mvn%D4\\t%0, %2" [(set_attr "conds" "use") + (set_attr "insn" "mvn") (set_attr "length" "4,8,8")] ) @@ -9508,6 +9537,7 @@ mov%D4\\t%0, %1\;mvn%d4\\t%0, %2 mvn%D4\\t%0, #%B1\;mvn%d4\\t%0, %2" [(set_attr "conds" "use") + (set_attr "insn" "mvn") (set_attr "length" "4,8,8")] ) @@ -9545,6 +9575,7 @@ [(set_attr "conds" "use") (set_attr "shift" "2") (set_attr "length" "4,8,8") + (set_attr "insn" "mov") (set (attr "type") (if_then_else (match_operand 3 "const_int_operand" "") (const_string "alu_shift") (const_string "alu_shift_reg")))] @@ -9584,6 +9615,7 @@ [(set_attr "conds" "use") (set_attr "shift" "2") (set_attr "length" "4,8,8") + (set_attr "insn" "mov") (set (attr "type") (if_then_else (match_operand 3 "const_int_operand" "") (const_string "alu_shift") (const_string "alu_shift_reg")))] @@ -9624,6 +9656,7 @@ [(set_attr "conds" "use") (set_attr "shift" "1") (set_attr "length" "8") + (set_attr "insn" "mov") (set (attr "type") (if_then_else (and (match_operand 2 "const_int_operand" "") (match_operand 4 "const_int_operand" "")) @@ -9660,6 +9693,7 @@ "TARGET_ARM" "mvn%d5\\t%0, %1\;%I6%D5\\t%0, %2, %3" [(set_attr "conds" "use") + (set_attr "insn" "mvn") (set_attr "length" "8")] ) @@ -9692,6 +9726,7 @@ "TARGET_ARM" "mvn%D5\\t%0, %1\;%I6%d5\\t%0, %2, %3" [(set_attr "conds" "use") + (set_attr "insn" "mvn") (set_attr "length" "8")] ) @@ -10138,6 +10173,7 @@ mvn%D4\\t%0, %2 mov%d4\\t%0, %1\;mvn%D4\\t%0, %2" [(set_attr "conds" "use") + (set_attr "insn" "mvn") (set_attr "length" "4,8")] ) diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md index 26fd11826df..986cfc42f94 100644 --- a/gcc/config/arm/vfp.md +++ b/gcc/config/arm/vfp.md @@ -82,6 +82,7 @@ " [(set_attr "predicable" "yes") (set_attr "type" "*,*,*,*,load1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores") + (set_attr "insn" "mov,mov,mvn,mov,*,*,*,*,*,*,*") (set_attr "pool_range" "*,*,*,*,4096,*,*,*,*,1020,*") (set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")] ) @@ -123,6 +124,7 @@ " [(set_attr "predicable" "yes") (set_attr "type" "*,*,*,*,load1,load1,store1,store1,r_2_f,f_2_r,fcpys,f_load,f_store") + (set_attr "insn" "mov,mov,mvn,mov,*,*,*,*,*,*,*,*,*") (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,*,1020,*") (set_attr "neg_pool_range" "*,*,*,*, 0, 0,*,*,*,*,*,1008,*")] ) @@ -352,6 +354,7 @@ [(set_attr "predicable" "yes") (set_attr "type" "r_2_f,f_2_r,fconsts,f_loads,f_stores,load1,store1,fcpys,*") + (set_attr "insn" "*,*,*,*,*,*,*,*,mov") (set_attr "pool_range" "*,*,*,1020,*,4096,*,*,*") (set_attr "neg_pool_range" "*,*,*,1008,*,4080,*,*,*")] ) @@ -388,6 +391,7 @@ [(set_attr "predicable" "yes") (set_attr "type" "r_2_f,f_2_r,fconsts,f_load,f_store,load1,store1,fcpys,*") + (set_attr "insn" "*,*,*,*,*,*,*,*,mov") (set_attr "pool_range" "*,*,*,1020,*,4092,*,*,*") (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")] )