mips.h (ISA_HAS_FP4): Correct formatting.
* config/mips/mips.h (ISA_HAS_FP4): Correct formatting. (ISA_HAS_FP_MADD4_MSUB4): Also enable for ISA_MIPS32R2. (ISA_HAS_NMADD4_NMSUB4): Remove the MODE argument; rewrite in terms of ISA_HAS_FP4, and also enable for ISA_MIPS32R2. (ISA_HAS_NMADD3_NMSUB3): Remove the MODE argument. * config/mips/mips.c (mips_rtx_costs) <PLUS>: Check for ISA_HAS_FP_MADD4_MSUB4 || ISA_HAS_FP_MADD3_MSUB3 rather than ISA_HAS_FP4. <MINUS, NEG>: Update according to changes to ISA_HAS_NMADD4_NMSUB4 and ISA_HAS_NMADD3_NMSUB3. * config/mips/mips.md (nmadd4<mode>, nmadd3<mode>): Likewise. (nmadd4<mode>_fastmath, nmadd3<mode>_fastmath): Likewise. (nmsub4<mode>, nmsub3<mode>): Likewise. (nmsub4<mode>_fastmath, nmsub3<mode>_fastmath): Likewise. From-SVN: r200993
This commit is contained in:
parent
d4ed27eb7f
commit
f900a98221
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@ -1,3 +1,20 @@
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2013-07-16 Maciej W. Rozycki <macro@codesourcery.com>
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* config/mips/mips.h (ISA_HAS_FP4): Correct formatting.
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(ISA_HAS_FP_MADD4_MSUB4): Also enable for ISA_MIPS32R2.
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(ISA_HAS_NMADD4_NMSUB4): Remove the MODE argument; rewrite in
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terms of ISA_HAS_FP4, and also enable for ISA_MIPS32R2.
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(ISA_HAS_NMADD3_NMSUB3): Remove the MODE argument.
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* config/mips/mips.c (mips_rtx_costs) <PLUS>: Check for
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ISA_HAS_FP_MADD4_MSUB4 || ISA_HAS_FP_MADD3_MSUB3 rather than
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ISA_HAS_FP4.
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<MINUS, NEG>: Update according to changes to ISA_HAS_NMADD4_NMSUB4
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and ISA_HAS_NMADD3_NMSUB3.
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* config/mips/mips.md (nmadd4<mode>, nmadd3<mode>): Likewise.
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(nmadd4<mode>_fastmath, nmadd3<mode>_fastmath): Likewise.
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(nmsub4<mode>, nmsub3<mode>): Likewise.
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(nmsub4<mode>_fastmath, nmsub3<mode>_fastmath): Likewise.
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2013-07-16 Maciej W. Rozycki <macro@codesourcery.com>
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* config/mips/mips.h (ISA_HAS_NMADD4_NMSUB4): Remove
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@ -3857,7 +3857,7 @@ mips_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
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case MINUS:
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if (float_mode_p
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&& (ISA_HAS_NMADD4_NMSUB4 (mode) || ISA_HAS_NMADD3_NMSUB3 (mode))
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&& (ISA_HAS_NMADD4_NMSUB4 || ISA_HAS_NMADD3_NMSUB3)
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&& TARGET_FUSED_MADD
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&& !HONOR_NANS (mode)
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&& !HONOR_SIGNED_ZEROS (mode))
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@ -3890,7 +3890,7 @@ mips_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
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{
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/* If this is part of a MADD or MSUB, treat the PLUS as
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being free. */
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if (ISA_HAS_FP4
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if ((ISA_HAS_FP_MADD4_MSUB4 || ISA_HAS_FP_MADD3_MSUB3)
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&& TARGET_FUSED_MADD
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&& GET_CODE (XEXP (x, 0)) == MULT)
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*total = 0;
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@ -3909,7 +3909,7 @@ mips_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
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case NEG:
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if (float_mode_p
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&& (ISA_HAS_NMADD4_NMSUB4 (mode) || ISA_HAS_NMADD3_NMSUB3 (mode))
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&& (ISA_HAS_NMADD4_NMSUB4 || ISA_HAS_NMADD3_NMSUB3)
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&& TARGET_FUSED_MADD
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&& !HONOR_NANS (mode)
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&& HONOR_SIGNED_ZEROS (mode))
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@ -873,7 +873,7 @@ struct mips_cpu_info {
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FP madd and msub instructions, and the FP recip and recip sqrt
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instructions. */
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#define ISA_HAS_FP4 ((ISA_MIPS4 \
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|| (ISA_MIPS32R2 && TARGET_FLOAT64) \
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|| (ISA_MIPS32R2 && TARGET_FLOAT64) \
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|| ISA_MIPS64 \
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|| ISA_MIPS64R2) \
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&& !TARGET_MIPS16)
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@ -895,24 +895,20 @@ struct mips_cpu_info {
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#define GENERATE_MADD_MSUB (TARGET_IMADD && !TARGET_MIPS16)
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/* ISA has floating-point madd and msub instructions 'd = a * b [+-] c'. */
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#define ISA_HAS_FP_MADD4_MSUB4 ISA_HAS_FP4
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#define ISA_HAS_FP_MADD4_MSUB4 (ISA_HAS_FP4 \
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|| (ISA_MIPS32R2 && !TARGET_MIPS16))
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/* ISA has floating-point madd and msub instructions 'c = a * b [+-] c'. */
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#define ISA_HAS_FP_MADD3_MSUB3 TARGET_LOONGSON_2EF
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/* ISA has floating-point nmadd and nmsub instructions
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'd = -((a * b) [+-] c)'. */
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#define ISA_HAS_NMADD4_NMSUB4(MODE) \
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((ISA_MIPS4 \
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|| (ISA_MIPS32R2 && (MODE) == V2SFmode) \
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|| ISA_MIPS64 \
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|| ISA_MIPS64R2) \
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&& !TARGET_MIPS16)
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#define ISA_HAS_NMADD4_NMSUB4 (ISA_HAS_FP4 \
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|| (ISA_MIPS32R2 && !TARGET_MIPS16))
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/* ISA has floating-point nmadd and nmsub instructions
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'c = -((a * b) [+-] c)'. */
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#define ISA_HAS_NMADD3_NMSUB3(MODE) \
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TARGET_LOONGSON_2EF
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#define ISA_HAS_NMADD3_NMSUB3 TARGET_LOONGSON_2EF
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/* ISA has count leading zeroes/ones instruction (not implemented). */
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#define ISA_HAS_CLZ_CLO ((ISA_MIPS32 \
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@ -2367,7 +2367,7 @@
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(mult:ANYF (match_operand:ANYF 1 "register_operand" "f")
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(match_operand:ANYF 2 "register_operand" "f"))
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(match_operand:ANYF 3 "register_operand" "f"))))]
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"ISA_HAS_NMADD4_NMSUB4 (<MODE>mode)
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"ISA_HAS_NMADD4_NMSUB4
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&& TARGET_FUSED_MADD
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&& HONOR_SIGNED_ZEROS (<MODE>mode)
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&& !HONOR_NANS (<MODE>mode)"
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@ -2382,7 +2382,7 @@
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(mult:ANYF (match_operand:ANYF 1 "register_operand" "f")
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(match_operand:ANYF 2 "register_operand" "f"))
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(match_operand:ANYF 3 "register_operand" "0"))))]
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"ISA_HAS_NMADD3_NMSUB3 (<MODE>mode)
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"ISA_HAS_NMADD3_NMSUB3
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&& TARGET_FUSED_MADD
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&& HONOR_SIGNED_ZEROS (<MODE>mode)
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&& !HONOR_NANS (<MODE>mode)"
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@ -2397,7 +2397,7 @@
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(mult:ANYF (neg:ANYF (match_operand:ANYF 1 "register_operand" "f"))
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(match_operand:ANYF 2 "register_operand" "f"))
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(match_operand:ANYF 3 "register_operand" "f")))]
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"ISA_HAS_NMADD4_NMSUB4 (<MODE>mode)
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"ISA_HAS_NMADD4_NMSUB4
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&& TARGET_FUSED_MADD
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&& !HONOR_SIGNED_ZEROS (<MODE>mode)
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&& !HONOR_NANS (<MODE>mode)"
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@ -2412,7 +2412,7 @@
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(mult:ANYF (neg:ANYF (match_operand:ANYF 1 "register_operand" "f"))
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(match_operand:ANYF 2 "register_operand" "f"))
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(match_operand:ANYF 3 "register_operand" "0")))]
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"ISA_HAS_NMADD3_NMSUB3 (<MODE>mode)
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"ISA_HAS_NMADD3_NMSUB3
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&& TARGET_FUSED_MADD
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&& !HONOR_SIGNED_ZEROS (<MODE>mode)
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&& !HONOR_NANS (<MODE>mode)"
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@ -2427,7 +2427,7 @@
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(mult:ANYF (match_operand:ANYF 2 "register_operand" "f")
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(match_operand:ANYF 3 "register_operand" "f"))
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(match_operand:ANYF 1 "register_operand" "f"))))]
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"ISA_HAS_NMADD4_NMSUB4 (<MODE>mode)
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"ISA_HAS_NMADD4_NMSUB4
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&& TARGET_FUSED_MADD
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&& HONOR_SIGNED_ZEROS (<MODE>mode)
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&& !HONOR_NANS (<MODE>mode)"
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(mult:ANYF (match_operand:ANYF 2 "register_operand" "f")
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(match_operand:ANYF 3 "register_operand" "f"))
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(match_operand:ANYF 1 "register_operand" "0"))))]
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"ISA_HAS_NMADD3_NMSUB3 (<MODE>mode)
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"ISA_HAS_NMADD3_NMSUB3
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&& TARGET_FUSED_MADD
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&& HONOR_SIGNED_ZEROS (<MODE>mode)
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&& !HONOR_NANS (<MODE>mode)"
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@ -2457,7 +2457,7 @@
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(match_operand:ANYF 1 "register_operand" "f")
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(mult:ANYF (match_operand:ANYF 2 "register_operand" "f")
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(match_operand:ANYF 3 "register_operand" "f"))))]
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"ISA_HAS_NMADD4_NMSUB4 (<MODE>mode)
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"ISA_HAS_NMADD4_NMSUB4
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&& TARGET_FUSED_MADD
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&& !HONOR_SIGNED_ZEROS (<MODE>mode)
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&& !HONOR_NANS (<MODE>mode)"
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@ -2472,7 +2472,7 @@
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(match_operand:ANYF 1 "register_operand" "f")
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(mult:ANYF (match_operand:ANYF 2 "register_operand" "f")
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(match_operand:ANYF 3 "register_operand" "0"))))]
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"ISA_HAS_NMADD3_NMSUB3 (<MODE>mode)
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"ISA_HAS_NMADD3_NMSUB3
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&& TARGET_FUSED_MADD
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&& !HONOR_SIGNED_ZEROS (<MODE>mode)
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&& !HONOR_NANS (<MODE>mode)"
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