RISC-V: Handle implied extension for -march parser.
- Implied rule are introduced into latest RISC-V ISA spec. - Only implemented D implied F-extension. Zicsr and Zifence are not implement yet, so the rule not included in this patch. - Pass preprocessed arch string to arch. - Verified with binutils 2.30 and 2.34. gcc/ChangeLog * common/config/riscv/riscv-common.c (riscv_implied_info_t): New. (riscv_implied_info): New. (riscv_subset_list): Add handle_implied_ext. (riscv_subset_list::to_string): New parameter version_p to control output format. (riscv_subset_list::handle_implied_ext): New. (riscv_subset_list::parse_std_ext): Call handle_implied_ext. (riscv_arch_str): New parameter version_p to control output format. (riscv_expand_arch): New. * config/riscv/riscv-protos.h (riscv_arch_str): New parameter, version_p. * config/riscv/riscv.h (riscv_expand_arch): New, (EXTRA_SPEC_FUNCTIONS): Define. (ASM_SPEC): Transform -march= via riscv_expand_arch. gcc/testsuite/ChangeLog * gcc.target/riscv/arch-6.c: New. * gcc.target/riscv/attribute-11.c: New. * gcc.target/riscv/attribute-12.c: New.
This commit is contained in:
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@ -1,3 +1,20 @@
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2020-05-19 Kito Cheng <kito.cheng@sifive.com>
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* common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
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(riscv_implied_info): New.
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(riscv_subset_list): Add handle_implied_ext.
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(riscv_subset_list::to_string): New parameter version_p to
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control output format.
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(riscv_subset_list::handle_implied_ext): New.
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(riscv_subset_list::parse_std_ext): Call handle_implied_ext.
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(riscv_arch_str): New parameter version_p to control output format.
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(riscv_expand_arch): New.
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* config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
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version_p.
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* config/riscv/riscv.h (riscv_expand_arch): New,
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(EXTRA_SPEC_FUNCTIONS): Define.
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(ASM_SPEC): Transform -march= via riscv_expand_arch.
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2020-05-19 Kito Cheng <kito.cheng@sifive.com>
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* riscv-common.c (parse_sv_or_non_std_ext): Rename to
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@ -44,6 +44,20 @@ struct riscv_subset_t
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struct riscv_subset_t *next;
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};
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/* Type for implied ISA info. */
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struct riscv_implied_info_t
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{
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const char *ext;
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const char *implied_ext;
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};
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/* Implied ISA info, must end with NULL sentinel. */
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riscv_implied_info_t riscv_implied_info[] =
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{
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{"d", "f"},
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{NULL, NULL}
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};
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/* Subset list. */
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class riscv_subset_list
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{
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@ -73,6 +87,8 @@ private:
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const char *parse_multiletter_ext (const char *, const char *,
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const char *);
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void handle_implied_ext (const char *, int, int);
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public:
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~riscv_subset_list ();
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@ -82,7 +98,7 @@ public:
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int major_version = RISCV_DONT_CARE_VERSION,
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int minor_version = RISCV_DONT_CARE_VERSION) const;
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std::string to_string () const;
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std::string to_string (bool) const;
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unsigned xlen() const {return m_xlen;};
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@ -140,10 +156,11 @@ riscv_subset_list::add (const char *subset, int major_version,
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m_tail = s;
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}
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/* Convert subset info to string with explicit version info. */
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/* Convert subset info to string with explicit version info,
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VERSION_P to determine append version info or not. */
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std::string
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riscv_subset_list::to_string () const
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riscv_subset_list::to_string (bool version_p) const
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{
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std::ostringstream oss;
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oss << "rv" << m_xlen;
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@ -153,14 +170,20 @@ riscv_subset_list::to_string () const
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while (subset != NULL)
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{
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if (!first)
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/* For !version_p, we only separate extension with underline for
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multi-letter extension. */
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if (!first &&
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(version_p || subset->name.length() > 1))
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oss << '_';
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first = false;
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oss << subset->name
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<< subset->major_version
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<< 'p'
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<< subset->minor_version;
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oss << subset->name;
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if (version_p)
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oss << subset->major_version
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<< 'p'
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<< subset->minor_version;
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subset = subset->next;
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}
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@ -394,11 +417,38 @@ riscv_subset_list::parse_std_ext (const char *p)
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subset[0] = std_ext;
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handle_implied_ext (subset, major_version, minor_version);
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add (subset, major_version, minor_version);
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}
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return p;
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}
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/* Check any implied extensions for EXT with version
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MAJOR_VERSION.MINOR_VERSION. */
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void
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riscv_subset_list::handle_implied_ext (const char *ext,
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int major_version,
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int minor_version)
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{
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riscv_implied_info_t *implied_info;
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for (implied_info = &riscv_implied_info[0];
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implied_info->ext;
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++implied_info)
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{
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if (strcmp (ext, implied_info->ext) != 0)
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continue;
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/* Skip if implied extension already present. */
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if (lookup (implied_info->implied_ext))
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continue;
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/* TODO: Implied extension might use different version. */
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add (implied_info->implied_ext, major_version, minor_version);
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}
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}
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/* Parsing function for multi-letter extensions.
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Return Value:
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@ -530,10 +580,10 @@ fail:
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/* Return the current arch string. */
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std::string
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riscv_arch_str ()
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riscv_arch_str (bool version_p)
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{
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gcc_assert (current_subset_list);
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return current_subset_list->to_string ();
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return current_subset_list->to_string (version_p);
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}
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/* Parse a RISC-V ISA string into an option mask. Must clear or set all arch
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@ -600,6 +650,21 @@ riscv_handle_option (struct gcc_options *opts,
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}
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}
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/* Expand arch string with implied extensions. */
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const char *
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riscv_expand_arch (int argc ATTRIBUTE_UNUSED,
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const char **argv)
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{
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static char *_arch_buf;
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gcc_assert (argc == 1);
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int flags;
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location_t loc = UNKNOWN_LOCATION;
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riscv_parse_arch_string (argv[0], &flags, loc);
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_arch_buf = xstrdup (riscv_arch_str (false).c_str ());
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return _arch_buf;
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}
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/* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */
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static const struct default_options riscv_option_optimization_table[] =
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{
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@ -87,7 +87,7 @@ extern tree riscv_builtin_decl (unsigned int, bool);
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extern void riscv_init_builtins (void);
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/* Routines implemented in riscv-common.c. */
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extern std::string riscv_arch_str ();
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extern std::string riscv_arch_str (bool version_p = true);
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extern bool riscv_hard_regno_rename_ok (unsigned, unsigned);
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@ -40,6 +40,11 @@ along with GCC; see the file COPYING3. If not see
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#define RISCV_TUNE_STRING_DEFAULT "rocket"
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#endif
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extern const char *riscv_expand_arch (int argc, const char **argv);
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# define EXTRA_SPEC_FUNCTIONS \
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{ "riscv_expand_arch", riscv_expand_arch },
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/* Support for a compile-time default CPU, et cetera. The rules are:
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--with-arch is ignored if -march is specified.
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--with-abi is ignored if -mabi is specified.
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@ -59,7 +64,7 @@ along with GCC; see the file COPYING3. If not see
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#define ASM_SPEC "\
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%(subtarget_asm_debugging_spec) \
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%{" FPIE_OR_FPIC_SPEC ":-fpic} \
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%{march=*} \
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%{march=*:-march=%:riscv_expand_arch(%*)} \
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%{mabi=*} \
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%(subtarget_asm_spec)"
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@ -1,3 +1,9 @@
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2020-05-19 Kito Cheng <kito.cheng@sifive.com>
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* gcc.target/riscv/arch-6.c: New.
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* gcc.target/riscv/attribute-11.c: New.
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* gcc.target/riscv/attribute-12.c: New.
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2020-05-19 Kito Cheng <kito.cheng@sifive.com>
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* gcc.target/riscv/arch-3.c: Adjust option.
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@ -0,0 +1,5 @@
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/* { dg-do compile } */
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/* { dg-options "-O -march=rv32id -mabi=ilp32" } */
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int foo()
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{
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}
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@ -0,0 +1,6 @@
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/* { dg-do compile } */
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/* { dg-options "-O -mriscv-attribute -march=rv32id -mabi=ilp32" } */
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int foo()
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{
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}
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/* { dg-final { scan-assembler ".attribute arch, \"rv32i2p0_f2p0_d2p0\"" } } */
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@ -0,0 +1,6 @@
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/* { dg-do compile } */
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/* { dg-options "-O -mriscv-attribute -march=rv32ifd -mabi=ilp32" } */
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int foo()
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{
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}
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/* { dg-final { scan-assembler ".attribute arch, \"rv32i2p0_f2p0_d2p0\"" } } */
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