h8300.c: Fix formatting.
* config/h8300/h8300.c: Fix formatting. * config/h8300/h8300.h: Likewise. From-SVN: r49822
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@ -1,3 +1,8 @@
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2002-02-17 Kazu Hirata <kazu@hxi.com>
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* config/h8300/h8300.c: Fix formatting.
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* config/h8300/h8300.h: Likewise.
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2002-02-17 Philipp Thomas <pthomas@suse.de>
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* doc/tm.texi: Explain why empty strings should not be
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@ -2411,25 +2411,25 @@ get_shift_alg (shift_type, shift_mode, count, info)
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}
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}
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else if (TARGET_H8300 && 24 <= count && count <= 28)
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{
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info->remainder = count - 24;
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{
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info->remainder = count - 24;
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switch (shift_type)
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{
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case SHIFT_ASHIFT:
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info->special = "mov.b\t%w0,%z0\n\tsub.b\t%y0,%y0\n\tsub.w\t%f0,%f0";
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info->shift1 = "shll.b\t%z0";
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switch (shift_type)
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{
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case SHIFT_ASHIFT:
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info->special = "mov.b\t%w0,%z0\n\tsub.b\t%y0,%y0\n\tsub.w\t%f0,%f0";
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info->shift1 = "shll.b\t%z0";
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goto end;
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case SHIFT_LSHIFTRT:
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info->special = "mov.b\t%z0,%w0\n\tsub.b\t%x0,%x0\n\tsub.w\t%e0,%e0";
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info->shift1 = "shlr.b\t%w0";
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goto end;
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case SHIFT_ASHIFTRT:
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info->special = "mov.b\t%z0,%w0\n\tbld\t#7,%w0\n\tsubx\t%x0,%x0\n\tsubx\t%x0,%x0\n\tsubx\t%x0,%x0";
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info->shift1 = "shar.b\t%w0";
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goto end;
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case SHIFT_LSHIFTRT:
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info->special = "mov.b\t%z0,%w0\n\tsub.b\t%x0,%x0\n\tsub.w\t%e0,%e0";
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info->shift1 = "shlr.b\t%w0";
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goto end;
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case SHIFT_ASHIFTRT:
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info->special = "mov.b\t%z0,%w0\n\tbld\t#7,%w0\n\tsubx\t%x0,%x0\n\tsubx\t%x0,%x0\n\tsubx\t%x0,%x0";
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info->shift1 = "shar.b\t%w0";
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goto end;
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}
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}
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}
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}
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else if ((TARGET_H8300H && count == 24)
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|| (TARGET_H8300S && 24 <= count && count <= 25))
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{
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@ -121,7 +121,7 @@ extern int target_flags;
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{"int32", 8, N_("Make integers 32 bits wide")}, \
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{"addresses", 64, NULL}, \
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{"quickcall", 128, \
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N_("Use registers for argument passing")}, \
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N_("Use registers for argument passing")}, \
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{"no-quickcall", -128, \
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N_("Do not use registers for argument passing")}, \
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{"slowbyte", 256, \
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@ -217,15 +217,15 @@ extern int target_flags;
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See also the macro `Pmode' defined below. */
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#define POINTER_SIZE (TARGET_H8300H || TARGET_H8300S ? 32 : 16)
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#define SHORT_TYPE_SIZE 16
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#define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16)
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#define LONG_TYPE_SIZE 32
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#define SHORT_TYPE_SIZE 16
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#define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16)
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#define LONG_TYPE_SIZE 32
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#define LONG_LONG_TYPE_SIZE 32
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#define FLOAT_TYPE_SIZE 32
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#define DOUBLE_TYPE_SIZE 32
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#define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
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#define FLOAT_TYPE_SIZE 32
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#define DOUBLE_TYPE_SIZE 32
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#define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
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#define MAX_FIXED_MODE_SIZE 32
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#define MAX_FIXED_MODE_SIZE 32
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/* Allocation boundary (in *bits*) for storing arguments in argument list. */
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#define PARM_BOUNDARY (TARGET_H8300H || TARGET_H8300S ? 32 : 16)
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@ -405,11 +405,11 @@ enum reg_class {
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This is an initializer for a vector of HARD_REG_SET
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of length N_REG_CLASSES. */
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#define REG_CLASS_CONTENTS \
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#define REG_CLASS_CONTENTS \
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{ {0}, /* No regs */ \
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{0x6ff}, /* GENERAL_REGS */ \
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{0x100}, /* MAC_REGS */ \
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{0x7ff}, /* ALL_REGS */ \
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{0x6ff}, /* GENERAL_REGS */ \
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{0x100}, /* MAC_REGS */ \
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{0x7ff}, /* ALL_REGS */ \
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}
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/* The same information, inverted:
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@ -904,9 +904,9 @@ struct cum_arg
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|| (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
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&& REG_OK_FOR_BASE_P (SUBREG_REG (X))))
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#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
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#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
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if (RTX_OK_FOR_BASE_P (X)) goto ADDR; \
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if (CONSTANT_ADDRESS_P (X)) goto ADDR; \
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if (CONSTANT_ADDRESS_P (X)) goto ADDR; \
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if (GET_CODE (X) == PLUS \
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&& CONSTANT_ADDRESS_P (XEXP (X, 1)) \
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&& RTX_OK_FOR_BASE_P (XEXP (X, 0))) goto ADDR;
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