Check SMALL_REGISTER_CLASSES at runtime

From-SVN: r13302
This commit is contained in:
Ian Lance Taylor 1996-12-13 01:00:49 +00:00
parent 6b9300aa70
commit f95182a4a9
9 changed files with 102 additions and 66 deletions

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@ -271,10 +271,11 @@ prepare_call_address (funexp, fndecl, call_fusage, reg_parm_seen)
#ifdef SMALL_REGISTER_CLASSES
/* If we are using registers for parameters, force the
function address into a register now. */
reg_parm_seen ? force_not_mem (memory_address (FUNCTION_MODE, funexp))
:
(SMALL_REGISTER_CLASSES && reg_parm_seen)
? force_not_mem (memory_address (FUNCTION_MODE, funexp))
:
#endif
memory_address (FUNCTION_MODE, funexp);
memory_address (FUNCTION_MODE, funexp);
else
{
#ifndef NO_FUNCTION_CSE
@ -1657,7 +1658,8 @@ expand_call (exp, target, ignore)
&& args[i].mode != BLKmode
&& rtx_cost (args[i].value, SET) > 2
#ifdef SMALL_REGISTER_CLASSES
&& (reg_parm_seen || preserve_subexpressions_p ())
&& ((SMALL_REGISTER_CLASSES && reg_parm_seen)
|| preserve_subexpressions_p ())
#else
&& preserve_subexpressions_p ()
#endif

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@ -967,9 +967,10 @@ can_combine_p (insn, i3, pred, succ, pdest, psrc)
|| (REGNO (src) < FIRST_PSEUDO_REGISTER
&& (! HARD_REGNO_MODE_OK (REGNO (src), GET_MODE (src))
#ifdef SMALL_REGISTER_CLASSES
|| (! all_adjacent && ! REG_USERVAR_P (src))
|| (FUNCTION_VALUE_REGNO_P (REGNO (src))
&& ! REG_USERVAR_P (src))
|| (SMALL_REGISTER_CLASSES
&& ((! all_adjacent && ! REG_USERVAR_P (src))
|| (FUNCTION_VALUE_REGNO_P (REGNO (src))
&& ! REG_USERVAR_P (src))))
#endif
))))
return 0;
@ -1152,7 +1153,8 @@ combinable_i3pat (i3, loc, i2dest, i1dest, i1_not_in_src, pi3dest_killed)
&& (! HARD_REGNO_MODE_OK (REGNO (inner_dest),
GET_MODE (inner_dest))
#ifdef SMALL_REGISTER_CLASSES
|| (GET_CODE (src) != CALL && ! REG_USERVAR_P (inner_dest)
|| (SMALL_REGISTER_CLASSES
&& GET_CODE (src) != CALL && ! REG_USERVAR_P (inner_dest)
&& FUNCTION_VALUE_REGNO_P (REGNO (inner_dest)))
#endif
))
@ -1296,7 +1298,8 @@ try_combine (i3, i2, i1)
&& GET_CODE (SET_SRC (PATTERN (i3))) == REG
&& REGNO (SET_SRC (PATTERN (i3))) >= FIRST_PSEUDO_REGISTER
#ifdef SMALL_REGISTER_CLASSES
&& (GET_CODE (SET_DEST (PATTERN (i3))) != REG
&& (! SMALL_REGISTER_CLASSES
|| GET_CODE (SET_DEST (PATTERN (i3))) != REG
|| REGNO (SET_DEST (PATTERN (i3))) >= FIRST_PSEUDO_REGISTER
|| REG_USERVAR_P (SET_DEST (PATTERN (i3))))
#endif

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@ -1891,7 +1891,8 @@ canon_hash (x, mode)
if (regno < FIRST_PSEUDO_REGISTER
&& (global_regs[regno]
#ifdef SMALL_REGISTER_CLASSES
|| (! fixed_regs[regno]
|| (SMALL_REGISTER_CLASSES
&& ! fixed_regs[regno]
&& regno != FRAME_POINTER_REGNUM
&& regno != HARD_FRAME_POINTER_REGNUM
&& regno != ARG_POINTER_REGNUM

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@ -1578,27 +1578,30 @@ fixup_var_refs_insns (var, promoted_mode, unsignedp, insn, toplevel)
of the CALL_INSN and see if the next insn uses both that
and VAR. */
if (call_dest != 0 && GET_CODE (insn) == INSN
&& reg_mentioned_p (var, PATTERN (insn))
&& reg_mentioned_p (call_dest, PATTERN (insn)))
if (SMALL_REGISTER_CLASSES)
{
rtx temp = gen_reg_rtx (GET_MODE (call_dest));
if (call_dest != 0 && GET_CODE (insn) == INSN
&& reg_mentioned_p (var, PATTERN (insn))
&& reg_mentioned_p (call_dest, PATTERN (insn)))
{
rtx temp = gen_reg_rtx (GET_MODE (call_dest));
emit_insn_before (gen_move_insn (temp, call_dest), insn);
emit_insn_before (gen_move_insn (temp, call_dest), insn);
PATTERN (insn) = replace_rtx (PATTERN (insn),
call_dest, temp);
}
PATTERN (insn) = replace_rtx (PATTERN (insn),
call_dest, temp);
}
if (GET_CODE (insn) == CALL_INSN
&& GET_CODE (PATTERN (insn)) == SET)
call_dest = SET_DEST (PATTERN (insn));
else if (GET_CODE (insn) == CALL_INSN
&& GET_CODE (PATTERN (insn)) == PARALLEL
&& GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET)
call_dest = SET_DEST (XVECEXP (PATTERN (insn), 0, 0));
else
call_dest = 0;
if (GET_CODE (insn) == CALL_INSN
&& GET_CODE (PATTERN (insn)) == SET)
call_dest = SET_DEST (PATTERN (insn));
else if (GET_CODE (insn) == CALL_INSN
&& GET_CODE (PATTERN (insn)) == PARALLEL
&& GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET)
call_dest = SET_DEST (XVECEXP (PATTERN (insn), 0, 0));
else
call_dest = 0;
}
#endif
/* See if we have to do anything to INSN now that VAR is in
@ -5163,7 +5166,8 @@ expand_function_start (subr, parms_have_cleanups)
#ifdef SMALL_REGISTER_CLASSES
/* Delay copying static chain if it is not a register to avoid
conflicts with regs used for parameters. */
if (GET_CODE (static_chain_incoming_rtx) == REG)
if (! SMALL_REGISTER_CLASSES
|| GET_CODE (static_chain_incoming_rtx) == REG)
#endif
emit_move_insn (last_ptr, static_chain_incoming_rtx);
}
@ -5277,7 +5281,7 @@ expand_function_start (subr, parms_have_cleanups)
/* Copy the static chain now if it wasn't a register. The delay is to
avoid conflicts with the parameter passing registers. */
if (current_function_needs_context)
if (SMALL_REGISTER_CLASSES && current_function_needs_context)
if (GET_CODE (static_chain_incoming_rtx) != REG)
emit_move_insn (last_ptr, static_chain_incoming_rtx);
#endif
@ -5319,7 +5323,8 @@ expand_function_start (subr, parms_have_cleanups)
/* If the static chain originally came in a register, put it back
there, then move it out in the next insn. The reason for
this peculiar code is to satisfy function integration. */
if (GET_CODE (static_chain_incoming_rtx) == REG)
if (SMALL_REGISTER_CLASSES
&& GET_CODE (static_chain_incoming_rtx) == REG)
emit_move_insn (static_chain_incoming_rtx, last_ptr);
#endif

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@ -761,7 +761,8 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan)
&& (temp4 = single_set (temp3)) != 0
&& GET_CODE (temp1 = SET_DEST (temp4)) == REG
#ifdef SMALL_REGISTER_CLASSES
&& REGNO (temp1) >= FIRST_PSEUDO_REGISTER
&& (! SMALL_REGISTER_CLASSES
|| REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
#endif
&& (temp2 = next_active_insn (insn)) != 0
&& GET_CODE (temp2) == INSN
@ -898,7 +899,8 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan)
&& (temp4 = single_set (temp2)) != 0
&& GET_CODE (temp1 = SET_DEST (temp4)) == REG
#ifdef SMALL_REGISTER_CLASSES
&& REGNO (temp1) >= FIRST_PSEUDO_REGISTER
&& (! SMALL_REGISTER_CLASSES
|| REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
#endif
&& (temp3 = prev_active_insn (insn)) != 0
@ -987,7 +989,8 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan)
&& (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
&& GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
#ifdef SMALL_REGISTER_CLASSES
&& REGNO (temp2) >= FIRST_PSEUDO_REGISTER
&& (! SMALL_REGISTER_CLASSES
|| REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
#endif
&& GET_CODE (SET_SRC (temp1)) != REG
&& GET_CODE (SET_SRC (temp1)) != SUBREG
@ -1029,7 +1032,8 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan)
&& (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
&& GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
#ifdef SMALL_REGISTER_CLASSES
&& REGNO (temp2) >= FIRST_PSEUDO_REGISTER
&& (! SMALL_REGISTER_CLASSES
|| REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
#endif
&& ! side_effects_p (SET_SRC (temp1))
&& ! may_trap_p (SET_SRC (temp1))
@ -1090,7 +1094,8 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan)
&& (temp2 = SET_DEST (temp4), GET_CODE (temp2) == REG)
&& GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
#ifdef SMALL_REGISTER_CLASSES
&& REGNO (temp2) >= FIRST_PSEUDO_REGISTER
&& (! SMALL_REGISTER_CLASSES
|| REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
#endif
&& rtx_equal_p (SET_DEST (temp4), temp2)
&& ! side_effects_p (SET_SRC (temp4))
@ -1143,7 +1148,8 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan)
&& GET_CODE (PATTERN (temp)) == SET
&& GET_CODE (temp1 = SET_DEST (PATTERN (temp))) == REG
#ifdef SMALL_REGISTER_CLASSES
&& REGNO (temp1) >= FIRST_PSEUDO_REGISTER
&& (! SMALL_REGISTER_CLASSES
|| REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
#endif
&& (GET_CODE (temp2 = SET_SRC (PATTERN (temp))) == REG
|| GET_CODE (temp2) == SUBREG

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@ -715,7 +715,9 @@ optimize_reg_copy_1 (insn, dest, src)
if (sregno == dregno
#ifdef SMALL_REGISTER_CLASSES
/* We don't want to mess with hard regs if register classes are small. */
|| sregno < FIRST_PSEUDO_REGISTER || dregno < FIRST_PSEUDO_REGISTER
|| (SMALL_REGISTER_CLASSES
&& (sregno < FIRST_PSEUDO_REGISTER
|| dregno < FIRST_PSEUDO_REGISTER))
#endif
/* We don't see all updates to SP if they are in an auto-inc memory
reference, so we must disallow this optimization on them. */

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@ -742,7 +742,8 @@ scan_loop (loop_start, end, nregs)
&& ! side_effects_p (SET_SRC (set))
&& ! find_reg_note (p, REG_RETVAL, NULL_RTX)
#ifdef SMALL_REGISTER_CLASSES
&& ! (GET_CODE (SET_SRC (set)) == REG
&& ! (SMALL_REGISTER_CLASSES
&& GET_CODE (SET_SRC (set)) == REG
&& REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)
#endif
/* This test is not redundant; SET_SRC (set) might be
@ -4257,9 +4258,13 @@ valid_initial_value_p (x, insn, call_seen, loop_start)
/* Don't use call-clobbered registers across a call which clobbers it. On
some machines, don't use any hard registers at all. */
if (REGNO (x) < FIRST_PSEUDO_REGISTER
#ifndef SMALL_REGISTER_CLASSES
&& call_used_regs[REGNO (x)] && call_seen
&& (
#ifdef SMALL_REGISTER_CLASSES
SMALL_REGISTER_CLASSES
#else
0
#endif
|| (call_used_regs[REGNO (x)] && call_seen))
)
return 0;

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@ -477,7 +477,7 @@ push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
== CODE_FOR_nothing)))
&& (reg_class_size[(int) t_class] == 1
#ifdef SMALL_REGISTER_CLASSES
|| 1
|| SMALL_REGISTER_CLASSES
#endif
)
&& MERGABLE_RELOADS (secondary_type,
@ -538,7 +538,7 @@ push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
|| (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
&& (reg_class_size[(int) class] == 1
#ifdef SMALL_REGISTER_CLASSES
|| 1
|| SMALL_REGISTER_CLASSES
#endif
)
&& MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
@ -1157,7 +1157,7 @@ push_reload (in, out, inloc, outloc, class,
&& (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
&& (reg_class_size[(int) class] == 1
#ifdef SMALL_REGISTER_CLASSES
|| 1
|| SMALL_REGISTER_CLASSES
#endif
)
&& MERGABLE_RELOADS (type, reload_when_needed[i],
@ -1193,7 +1193,7 @@ push_reload (in, out, inloc, outloc, class,
&& MATCHES (XEXP (in, 0), reload_in[i])))
&& (reg_class_size[(int) class] == 1
#ifdef SMALL_REGISTER_CLASSES
|| 1
|| SMALL_REGISTER_CLASSES
#endif
)
&& MERGABLE_RELOADS (type, reload_when_needed[i],
@ -1534,14 +1534,17 @@ combine_reloads ()
|| rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
#endif
&& (
#ifdef SMALL_REGISTER_CLASSES
&& reload_reg_class[i] == reload_reg_class[output_reload]
SMALL_REGISTER_CLASSES
#else
&& (reg_class_subset_p (reload_reg_class[i],
reload_reg_class[output_reload])
|| reg_class_subset_p (reload_reg_class[output_reload],
reload_reg_class[i]))
0
#endif
? reload_reg_class[i] == reload_reg_class[output_reload]
: (reg_class_subset_p (reload_reg_class[i],
reload_reg_class[output_reload])
|| reg_class_subset_p (reload_reg_class[output_reload],
reload_reg_class[i])))
&& (MATCHES (reload_in[i], reload_out[output_reload])
/* Args reversed because the first arg seems to be
the one that we imagine being modified
@ -1559,7 +1562,7 @@ combine_reloads ()
reload_out[output_reload]))))
&& (reg_class_size[(int) reload_reg_class[i]]
#ifdef SMALL_REGISTER_CLASSES
|| 1
|| SMALL_REGISTER_CLASSES
#endif
)
/* We will allow making things slightly worse by combining an

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@ -544,7 +544,8 @@ reload (first, global, dumpfile)
bzero (cannot_omit_stores, max_regno);
#ifdef SMALL_REGISTER_CLASSES
CLEAR_HARD_REG_SET (forbidden_regs);
if (SMALL_REGISTER_CLASSES)
CLEAR_HARD_REG_SET (forbidden_regs);
#endif
/* Look for REG_EQUIV notes; record what each pseudo is equivalent to.
@ -722,9 +723,10 @@ reload (first, global, dumpfile)
rtl as a spill register. But on some, we have to. Those will have
taken care to keep the life of hard regs as short as possible. */
#ifndef SMALL_REGISTER_CLASSES
COPY_HARD_REG_SET (forbidden_regs, bad_spill_regs);
#ifdef SMALL_REGISTER_CLASSES
if (! SMALL_REGISTER_CLASSES)
#endif
COPY_HARD_REG_SET (forbidden_regs, bad_spill_regs);
/* Spill any hard regs that we know we can't eliminate. */
for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
@ -986,7 +988,7 @@ reload (first, global, dumpfile)
#ifdef SMALL_REGISTER_CLASSES
/* Set avoid_return_reg if this is an insn
that might use the value of a function call. */
if (GET_CODE (insn) == CALL_INSN)
if (SMALL_REGISTER_CLASSES && GET_CODE (insn) == CALL_INSN)
{
if (GET_CODE (PATTERN (insn)) == SET)
after_call = SET_DEST (PATTERN (insn));
@ -996,7 +998,8 @@ reload (first, global, dumpfile)
else
after_call = 0;
}
else if (after_call != 0
else if (SMALL_REGISTER_CLASSES
&& after_call != 0
&& !(GET_CODE (PATTERN (insn)) == SET
&& SET_DEST (PATTERN (insn)) == stack_pointer_rtx))
{
@ -1344,7 +1347,7 @@ reload (first, global, dumpfile)
This makes sure we have a register available that does
not overlap the return value. */
if (avoid_return_reg)
if (SMALL_REGISTER_CLASSES && avoid_return_reg)
{
int regno = REGNO (avoid_return_reg);
int nregs
@ -1702,7 +1705,7 @@ reload (first, global, dumpfile)
/* We can't complete a group, so start one. */
#ifdef SMALL_REGISTER_CLASSES
/* Look for a pair neither of which is explicitly used. */
if (i == FIRST_PSEUDO_REGISTER)
if (SMALL_REGISTER_CLASSES && i == FIRST_PSEUDO_REGISTER)
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
int k;
@ -3584,7 +3587,9 @@ scan_paradoxical_subregs (x)
{
case REG:
#ifdef SMALL_REGISTER_CLASSES
if (REGNO (x) < FIRST_PSEUDO_REGISTER && REG_USERVAR_P (x))
if (SMALL_REGISTER_CLASSES
&& REGNO (x) < FIRST_PSEUDO_REGISTER
&& REG_USERVAR_P (x))
SET_HARD_REG_BIT (forbidden_regs, REGNO (x));
#endif
return;
@ -3698,14 +3703,15 @@ order_regs_for_reload (global)
else if (regs_explicitly_used[i])
{
hard_reg_n_uses[i].uses += large + 1;
#ifndef SMALL_REGISTER_CLASSES
/* ??? We are doing this here because of the potential that
bad code may be generated if a register explicitly used in
an insn was used as a spill register for that insn. But
not using these are spill registers may lose on some machine.
We'll have to see how this works out. */
SET_HARD_REG_BIT (bad_spill_regs, i);
#ifdef SMALL_REGISTER_CLASSES
if (! SMALL_REGISTER_CLASSES)
#endif
SET_HARD_REG_BIT (bad_spill_regs, i);
}
}
hard_reg_n_uses[HARD_FRAME_POINTER_REGNUM].uses += 2 * large + 2;
@ -3859,7 +3865,7 @@ reload_as_needed (first, live_known)
#ifdef SMALL_REGISTER_CLASSES
/* Set avoid_return_reg if this is an insn
that might use the value of a function call. */
if (GET_CODE (insn) == CALL_INSN)
if (SMALL_REGISTER_CLASSES && GET_CODE (insn) == CALL_INSN)
{
if (GET_CODE (PATTERN (insn)) == SET)
after_call = SET_DEST (PATTERN (insn));
@ -3869,7 +3875,8 @@ reload_as_needed (first, live_known)
else
after_call = 0;
}
else if (after_call != 0
else if (SMALL_REGISTER_CLASSES
&& after_call != 0
&& !(GET_CODE (PATTERN (insn)) == SET
&& SET_DEST (PATTERN (insn)) == stack_pointer_rtx))
{
@ -3947,7 +3954,8 @@ reload_as_needed (first, live_known)
/* Merge any reloads that we didn't combine for fear of
increasing the number of spill registers needed but now
discover can be safely merged. */
merge_assigned_reloads (insn);
if (SMALL_REGISTER_CLASSES)
merge_assigned_reloads (insn);
#endif
/* Generate the insns to reload operands into or out of
@ -4991,7 +4999,7 @@ choose_reload_regs (insn, avoid_return_reg)
#ifdef SMALL_REGISTER_CLASSES
/* Don't bother with avoiding the return reg
if we have no mandatory reload that could use it. */
if (avoid_return_reg)
if (SMALL_REGISTER_CLASSES && avoid_return_reg)
{
int do_avoid = 0;
int regno = REGNO (avoid_return_reg);
@ -5024,7 +5032,8 @@ choose_reload_regs (insn, avoid_return_reg)
{
int tem = 0;
#ifdef SMALL_REGISTER_CLASSES
int tem = (avoid_return_reg != 0);
if (SMALL_REGISTER_CLASSES)
tem = (avoid_return_reg != 0);
#endif
for (j = 0; j < n_reloads; j++)
if (! reload_optional[j]
@ -5041,7 +5050,7 @@ choose_reload_regs (insn, avoid_return_reg)
#ifdef SMALL_REGISTER_CLASSES
/* Don't use the subroutine call return reg for a reload
if we are supposed to avoid it. */
if (avoid_return_reg)
if (SMALL_REGISTER_CLASSES && avoid_return_reg)
{
int regno = REGNO (avoid_return_reg);
int nregs