Patch for RTL expand bug affecting aarch64 vector code.
gcc/ PR middle-end/79794 * expmed.c (extract_bit_field_1): Add alt_rtl argument. Before maybe_expand_insn call, set ops[0].target. If still set after call, set alt_rtl. Add extra arg to recursive calls. (extract_bit_field): Add alt_rtl argument. Pass to extract_bit_field. * expmed.h (extract_bit_field): Fix prototype. * expr.c (emit_group_load_1, copy_blkmode_from_reg) (copy_blkmode_to_reg, read_complex_part, store_field): Pass extra NULL to extract_bit_field_calls. (expand_expr_real_1): Pass alt_rtl to expand_expr_real instead of 0. Pass alt_rtl to extract_bit_field calls. * calls.c (store_unaligned_arguments_into_psuedos) load_register_parameters): Pass extra NULL to extract_bit_field calls. * optabs.c (maybe_legitimize_operand): Clear op->target when call gen_reg_rtx. * optabs.h (struct expand_operand): Add target bitfield. From-SVN: r248004
This commit is contained in:
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7f390a7b6c
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f96bf49a02
@ -1,3 +1,23 @@
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2017-05-12 Jim Wilson <jim.wilson@linaro.org>
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PR middle-end/79794
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* expmed.c (extract_bit_field_1): Add alt_rtl argument. Before
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maybe_expand_insn call, set ops[0].target. If still set after call,
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set alt_rtl. Add extra arg to recursive calls.
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(extract_bit_field): Add alt_rtl argument. Pass to
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extract_bit_field.
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* expmed.h (extract_bit_field): Fix prototype.
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* expr.c (emit_group_load_1, copy_blkmode_from_reg)
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(copy_blkmode_to_reg, read_complex_part, store_field): Pass extra NULL
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to extract_bit_field_calls.
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(expand_expr_real_1): Pass alt_rtl to expand_expr_real instead of 0.
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Pass alt_rtl to extract_bit_field calls.
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* calls.c (store_unaligned_arguments_into_psuedos)
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load_register_parameters): Pass extra NULL to extract_bit_field calls.
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* optabs.c (maybe_legitimize_operand): Clear op->target when call
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gen_reg_rtx.
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* optabs.h (struct expand_operand): Add target bitfield.
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2017-05-12 Uros Bizjak <ubizjak@gmail.com>
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* compare-elim.c (try_eliminate_compare): Canonicalize
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@ -1164,7 +1164,7 @@ store_unaligned_arguments_into_pseudos (struct arg_data *args, int num_actuals)
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args[i].aligned_regs[j] = reg;
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word = extract_bit_field (word, bitsize, 0, 1, NULL_RTX,
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word_mode, word_mode, false);
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word_mode, word_mode, false, NULL);
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/* There is no need to restrict this code to loading items
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in TYPE_ALIGN sized hunks. The bitfield instructions can
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@ -2557,7 +2557,8 @@ load_register_parameters (struct arg_data *args, int num_actuals,
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unsigned int bitoff = (nregs - 1) * BITS_PER_WORD;
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unsigned int bitsize = size * BITS_PER_UNIT - bitoff;
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rtx x = extract_bit_field (mem, bitsize, bitoff, 1, dest,
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word_mode, word_mode, false);
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word_mode, word_mode, false,
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NULL);
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if (BYTES_BIG_ENDIAN)
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x = expand_shift (LSHIFT_EXPR, word_mode, x,
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BITS_PER_WORD - bitsize, dest, 1);
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14
gcc/expmed.c
14
gcc/expmed.c
@ -1534,7 +1534,7 @@ static rtx
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extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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unsigned HOST_WIDE_INT bitnum, int unsignedp, rtx target,
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machine_mode mode, machine_mode tmode,
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bool reverse, bool fallback_p)
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bool reverse, bool fallback_p, rtx *alt_rtl)
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{
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rtx op0 = str_rtx;
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machine_mode int_mode;
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@ -1610,10 +1610,13 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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unsigned HOST_WIDE_INT pos = bitnum / GET_MODE_BITSIZE (innermode);
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create_output_operand (&ops[0], target, innermode);
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ops[0].target = 1;
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create_input_operand (&ops[1], op0, outermode);
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create_integer_operand (&ops[2], pos);
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if (maybe_expand_insn (icode, 3, ops))
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{
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if (alt_rtl && ops[0].target)
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*alt_rtl = target;
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target = ops[0].value;
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if (GET_MODE (target) != mode)
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return gen_lowpart (tmode, target);
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@ -1735,7 +1738,7 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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= extract_bit_field_1 (op0, MIN (BITS_PER_WORD,
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bitsize - i * BITS_PER_WORD),
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bitnum + bit_offset, 1, target_part,
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mode, word_mode, reverse, fallback_p);
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mode, word_mode, reverse, fallback_p, NULL);
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gcc_assert (target_part);
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if (!result_part)
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@ -1838,7 +1841,7 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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xop0 = copy_to_reg (xop0);
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rtx result = extract_bit_field_1 (xop0, bitsize, bitpos,
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unsignedp, target,
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mode, tmode, reverse, false);
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mode, tmode, reverse, false, NULL);
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if (result)
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return result;
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delete_insns_since (last);
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@ -1894,7 +1897,8 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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rtx
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extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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unsigned HOST_WIDE_INT bitnum, int unsignedp, rtx target,
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machine_mode mode, machine_mode tmode, bool reverse)
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machine_mode mode, machine_mode tmode, bool reverse,
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rtx *alt_rtl)
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{
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machine_mode mode1;
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@ -1929,7 +1933,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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}
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return extract_bit_field_1 (str_rtx, bitsize, bitnum, unsignedp,
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target, mode, tmode, reverse, true);
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target, mode, tmode, reverse, true, alt_rtl);
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}
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/* Use shifts and boolean operations to extract a field of BITSIZE bits
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@ -725,7 +725,7 @@ extern void store_bit_field (rtx, unsigned HOST_WIDE_INT,
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machine_mode, rtx, bool);
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extern rtx extract_bit_field (rtx, unsigned HOST_WIDE_INT,
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unsigned HOST_WIDE_INT, int, rtx,
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machine_mode, machine_mode, bool);
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machine_mode, machine_mode, bool, rtx *);
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extern rtx extract_low_bits (machine_mode, machine_mode, rtx);
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extern rtx expand_mult (machine_mode, rtx, rtx, rtx, int);
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extern rtx expand_mult_highpart_adjust (machine_mode, rtx, rtx, rtx, rtx, int);
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25
gcc/expr.c
25
gcc/expr.c
@ -2192,7 +2192,8 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
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&& (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode)))
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tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
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subpos * BITS_PER_UNIT,
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1, NULL_RTX, mode, mode, false);
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1, NULL_RTX, mode, mode, false,
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NULL);
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}
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else
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{
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@ -2202,7 +2203,8 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
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mem = assign_stack_temp (GET_MODE (src), slen);
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emit_move_insn (mem, src);
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tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
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0, 1, NULL_RTX, mode, mode, false);
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0, 1, NULL_RTX, mode, mode, false,
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NULL);
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}
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}
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/* FIXME: A SIMD parallel will eventually lead to a subreg of a
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@ -2245,7 +2247,7 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
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else
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tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
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bytepos * BITS_PER_UNIT, 1, NULL_RTX,
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mode, mode, false);
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mode, mode, false, NULL);
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if (shift)
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tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
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@ -2697,7 +2699,7 @@ copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
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extract_bit_field (src, bitsize,
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xbitpos % BITS_PER_WORD, 1,
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NULL_RTX, copy_mode, copy_mode,
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false),
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false, NULL),
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false);
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}
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}
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@ -2776,7 +2778,7 @@ copy_blkmode_to_reg (machine_mode mode, tree src)
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extract_bit_field (src_word, bitsize,
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bitpos % BITS_PER_WORD, 1,
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NULL_RTX, word_mode, word_mode,
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false),
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false, NULL),
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false);
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}
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@ -3225,7 +3227,7 @@ read_complex_part (rtx cplx, bool imag_p)
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}
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return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
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true, NULL_RTX, imode, imode, false);
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true, NULL_RTX, imode, imode, false, NULL);
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}
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/* A subroutine of emit_move_insn_1. Yet another lowpart generator.
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@ -6911,7 +6913,7 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
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{
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machine_mode temp_mode = smallest_mode_for_size (bitsize, MODE_INT);
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temp = extract_bit_field (temp, bitsize, 0, 1, NULL_RTX, temp_mode,
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temp_mode, false);
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temp_mode, false, NULL);
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}
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/* Store the value in the bitfield. */
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@ -9780,7 +9782,8 @@ expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
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case GIMPLE_SINGLE_RHS:
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{
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r = expand_expr_real (gimple_assign_rhs1 (g), target,
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tmode, modifier, NULL, inner_reference_p);
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tmode, modifier, alt_rtl,
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inner_reference_p);
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break;
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}
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default:
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@ -10210,7 +10213,7 @@ expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
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0, TYPE_UNSIGNED (TREE_TYPE (exp)),
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(modifier == EXPAND_STACK_PARM
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? NULL_RTX : target),
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mode, mode, false);
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mode, mode, false, alt_rtl);
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}
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if (reverse
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&& modifier != EXPAND_MEMORY
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@ -10707,7 +10710,7 @@ expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
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op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
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(modifier == EXPAND_STACK_PARM
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? NULL_RTX : target),
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ext_mode, ext_mode, reversep);
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ext_mode, ext_mode, reversep, alt_rtl);
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/* If the result has a record type and the mode of OP0 is an
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integral mode then, if BITSIZE is narrower than this mode
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@ -10928,7 +10931,7 @@ expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
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else if (reduce_bit_field)
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return extract_bit_field (op0, TYPE_PRECISION (type), 0,
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TYPE_UNSIGNED (type), NULL_RTX,
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mode, mode, false);
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mode, mode, false, NULL);
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/* As a last resort, spill op0 to memory, and reload it in a
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different mode. */
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else if (!MEM_P (op0))
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return true;
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op->value = gen_reg_rtx (mode);
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op->target = 0;
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break;
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case EXPAND_INPUT:
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@ -48,8 +48,11 @@ struct expand_operand {
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rather than signed. Only meaningful for certain types. */
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unsigned int unsigned_p : 1;
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/* Is the target operand. */
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unsigned int target : 1;
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/* Unused; available for future use. */
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unsigned int unused : 7;
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unsigned int unused : 6;
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/* The mode passed to the convert_*_operand function. It has a
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type-dependent meaning. */
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