diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 45ee4062ad6..dcca8b978cb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -37,6 +37,13 @@ Wed Sep 22 06:25:15 1999 Jim Kingdon Wed Sep 22 06:06:57 1999 Jeffrey A Law (law@cygnus.com) + * pa.c (hppa_legitimize_address): Handle full offsets for PA2.0 + FP loads and stores. + (following_call): Always return zero for the PA8000. + * pa.h (GO_IF_LEGITIMATE_ADDRESS): Handle full offsets for PA2.0 + FP loads and stores. + (LEGITIMIZE_RELOAD_ADDRESS): Similarly. + * pa.h (BRANCH_COST): Define. * pa.md (return, return_internal): Use bve for PA2.0. diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index 5287d455cdf..04fe6d4d387 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -791,7 +791,10 @@ hppa_legitimize_address (x, oldx, mode) rtx int_part, ptr_reg; int newoffset; int offset = INTVAL (XEXP (x, 1)); - int mask = GET_MODE_CLASS (mode) == MODE_FLOAT ? 0x1f : 0x3fff; + int mask; + + mask = (GET_MODE_CLASS (mode) == MODE_FLOAT + ? (TARGET_PA_20 ? 0x3fff : 0x1f) : 0x3fff); /* Choose which way to round the offset. Round up if we are >= halfway to the next boundary. */ @@ -5939,6 +5942,11 @@ int following_call (insn) rtx insn; { + /* We do not parallel movb,addb or place jumps into call delay slots when + optimizing for the PA8000. */ + if (pa_cpu != PROCESSOR_8000) + return 0; + /* Find the previous real insn, skipping NOTEs. */ insn = PREV_INSN (insn); while (insn && GET_CODE (insn) == NOTE) diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index 938b0853758..fbb920b367a 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -1339,8 +1339,13 @@ extern struct rtx_def *hppa_va_arg(); : ((C) == 'T' ? \ (GET_CODE (OP) == MEM \ /* Using DFmode forces only short displacements \ - to be recognized as valid in reg+d addresses. */\ - && memory_address_p (DFmode, XEXP (OP, 0)) \ + to be recognized as valid in reg+d addresses. \ + However, this is not necessary for PA2.0 since\ + it has long FP loads/stores. */ \ + && memory_address_p ((TARGET_PA_20 \ + ? GET_MODE (OP) \ + : DFmode), \ + XEXP (OP, 0)) \ && !(GET_CODE (XEXP (OP, 0)) == PLUS \ && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\ || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))) @@ -1437,6 +1442,11 @@ extern struct rtx_def *hppa_va_arg(); if (GET_CODE (index) == CONST_INT \ && ((INT_14_BITS (index) \ && (TARGET_SOFT_FLOAT \ + || (TARGET_PA_20 \ + && ((MODE == SFmode \ + && (INTVAL (index) % 4) == 0)\ + || (MODE == DFmode \ + && (INTVAL (index) % 8) == 0)))\ || ((MODE) != SFmode && (MODE) != DFmode))) \ || INT_5_BITS (index))) \ goto ADDR; \ @@ -1504,7 +1514,9 @@ extern struct rtx_def *hppa_va_arg(); do { \ int offset, newoffset, mask; \ rtx new, temp = NULL_RTX; \ - mask = GET_MODE_CLASS (MODE) == MODE_FLOAT ? 0x1f : 0x3fff; \ + \ + mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \ + ? (TARGET_PA_20 ? 0x3fff : 0x1f) : 0x3fff); \ \ if (optimize \ && GET_CODE (AD) == PLUS) \