arm.md (tlobits_cbranch): New pattern.
* arm.md (tlobits_cbranch): New pattern. * arm.h (arm_select_cc_mode): For thumb, only return CC_Nmode if testing a single bit. From-SVN: r110803
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2006-02-09 Richard Earnshaw <richard.earnshaw@arm.com>
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* arm.md (tlobits_cbranch): New pattern.
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* arm.h (arm_select_cc_mode): For thumb, only return CC_Nmode if
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testing a single bit.
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2006-02-09 Andrew Pinski <pinskia@physics.uc.edu>
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PR tree-opt/26179
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@ -6748,7 +6748,8 @@ arm_select_cc_mode (enum rtx_code op, rtx x, rtx y)
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if (TARGET_THUMB
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&& GET_MODE (x) == SImode
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&& (op == EQ || op == NE)
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&& (GET_CODE (x) == ZERO_EXTRACT))
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&& GET_CODE (x) == ZERO_EXTRACT
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&& XEXP (x, 1) == const1_rtx)
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return CC_Nmode;
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/* An operation that sets the condition codes as a side-effect, the
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@ -6028,6 +6028,50 @@
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(const_int 8))))]
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)
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(define_insn "*tlobits_cbranch"
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[(set (pc)
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(if_then_else
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(match_operator 0 "equality_operator"
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[(zero_extract:SI (match_operand:SI 1 "s_register_operand" "l")
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(match_operand:SI 2 "const_int_operand" "i")
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(const_int 0))
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(const_int 0)])
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(label_ref (match_operand 3 "" ""))
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(pc)))
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(clobber (match_scratch:SI 4 "=l"))]
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"TARGET_THUMB"
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"*
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{
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rtx op[3];
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op[0] = operands[4];
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op[1] = operands[1];
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op[2] = GEN_INT (32 - INTVAL (operands[2]));
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output_asm_insn (\"lsl\\t%0, %1, %2\", op);
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switch (get_attr_length (insn))
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{
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case 4: return \"b%d0\\t%l3\";
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case 6: return \"b%D0\\t.LCB%=\;b\\t%l3\\t%@long jump\\n.LCB%=:\";
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default: return \"b%D0\\t.LCB%=\;bl\\t%l3\\t%@far jump\\n.LCB%=:\";
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}
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}"
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[(set (attr "far_jump")
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(if_then_else
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(eq_attr "length" "8")
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(const_string "yes")
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(const_string "no")))
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(set (attr "length")
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(if_then_else
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(and (ge (minus (match_dup 3) (pc)) (const_int -250))
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(le (minus (match_dup 3) (pc)) (const_int 256)))
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(const_int 4)
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(if_then_else
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(and (ge (minus (match_dup 3) (pc)) (const_int -2040))
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(le (minus (match_dup 3) (pc)) (const_int 2048)))
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(const_int 6)
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(const_int 8))))]
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)
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(define_insn "*tstsi3_cbranch"
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[(set (pc)
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(if_then_else
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