002-01-07 Aldy Hernandez <aldyh@redhat.com>
* config/rs6000/rs6000.c (bdesc_2arg): Add altivec predicates. (altivec_init_builtins): New node v4si_ftype_v16qi_v16qi. * config/rs6000/rs6000.h (rs6000_builtins): Add enums for altivec predicates. * config/rs6000/rs6000.md: Add altivec predicate patterns. From-SVN: r48622
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@ -1,3 +1,13 @@
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002-01-07 Aldy Hernandez <aldyh@redhat.com>
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* config/rs6000/rs6000.c (bdesc_2arg): Add altivec predicates.
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(altivec_init_builtins): New node v4si_ftype_v16qi_v16qi.
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* config/rs6000/rs6000.h (rs6000_builtins): Add enums for altivec
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predicates.
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* config/rs6000/rs6000.md: Add altivec predicate patterns.
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2002-01-07 John David Anglin <dave@hiauly1.hia.nrc.ca>
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* pa.c (FUNC_BEGIN_PROLOG_LABEL, current_function_number): Define.
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@ -3357,6 +3357,19 @@ static const struct builtin_description bdesc_2arg[] =
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{ MASK_ALTIVEC, CODE_FOR_altivec_vsum2sws, "__builtin_altivec_vsum2sws", ALTIVEC_BUILTIN_VSUM2SWS },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vsumsws, "__builtin_altivec_vsumsws", ALTIVEC_BUILTIN_VSUMSWS },
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{ MASK_ALTIVEC, CODE_FOR_xorv4si3, "__builtin_altivec_vxor", ALTIVEC_BUILTIN_VXOR },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vcmpbfp_p, "__builtin_altivec_vcmpbfp_p", ALTIVEC_BUILTIN_VCMPBFP_P },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vcmpeqfp_p, "__builtin_altivec_vcmpeqfp_p", ALTIVEC_BUILTIN_VCMPEQFP_P },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vcmpequb_p, "__builtin_altivec_vcmpequb_p", ALTIVEC_BUILTIN_VCMPEQUB_P },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vcmpequh_p, "__builtin_altivec_vcmpequh_p", ALTIVEC_BUILTIN_VCMPEQUH_P },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vcmpequw_p, "__builtin_altivec_vcmpequw_p", ALTIVEC_BUILTIN_VCMPEQUW_P },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vcmpgefp_p, "__builtin_altivec_vcmpgefp_p", ALTIVEC_BUILTIN_VCMPGEFP_P },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vcmpgtfp_p, "__builtin_altivec_vcmpgtfp_p", ALTIVEC_BUILTIN_VCMPGTFP_P },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vcmpgtsb_p, "__builtin_altivec_vcmpgtsb_p", ALTIVEC_BUILTIN_VCMPGTSB_P },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vcmpgtsh_p, "__builtin_altivec_vcmpgtsh_p", ALTIVEC_BUILTIN_VCMPGTSH_P },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vcmpgtsw_p, "__builtin_altivec_vcmpgtsw_p", ALTIVEC_BUILTIN_VCMPGTSW_P },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vcmpgtub_p, "__builtin_altivec_vcmpgtub_p", ALTIVEC_BUILTIN_VCMPGTUB_P },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vcmpgtuh_p, "__builtin_altivec_vcmpgtuh_p", ALTIVEC_BUILTIN_VCMPGTUH_P },
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{ MASK_ALTIVEC, CODE_FOR_altivec_vcmpgtuw_p, "__builtin_altivec_vcmpgtuw_p", ALTIVEC_BUILTIN_VCMPGTUW_P },
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};
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/* Simple unary operations: VECb = foo (unsigned literal) or VECb =
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@ -3998,6 +4011,12 @@ altivec_init_builtins (void)
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tree_cons (NULL_TREE, V4SI_type_node,
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endlink)));
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tree v4si_ftype_v16qi_v16qi
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= build_function_type (V4SI_type_node,
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tree_cons (NULL_TREE, V16QI_type_node,
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tree_cons (NULL_TREE, V16QI_type_node,
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endlink)));
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tree v4si_ftype_v8hi_v4si
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= build_function_type (V4SI_type_node,
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tree_cons (NULL_TREE, V8HI_type_node,
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@ -4196,6 +4215,10 @@ altivec_init_builtins (void)
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else if (mode0 == V4SImode && mode1 == V16QImode && mode2 == V4SImode)
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type = v4si_ftype_v16qi_v4si;
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/* vint, vchar, vchar. */
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else if (mode0 == V4SImode && mode1 == V16QImode && mode2 == V16QImode)
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type = v4si_ftype_v16qi_v16qi;
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/* vint, vshort, vint. */
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else if (mode0 == V4SImode && mode1 == V8HImode && mode2 == V4SImode)
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type = v4si_ftype_v8hi_v4si;
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@ -2960,5 +2960,18 @@ enum rs6000_builtins
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ALTIVEC_BUILTIN_VUPKHSH,
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ALTIVEC_BUILTIN_VUPKLSB,
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ALTIVEC_BUILTIN_VUPKLPX,
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ALTIVEC_BUILTIN_VUPKLSH
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ALTIVEC_BUILTIN_VUPKLSH,
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ALTIVEC_BUILTIN_VCMPBFP_P,
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ALTIVEC_BUILTIN_VCMPEQFP_P,
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ALTIVEC_BUILTIN_VCMPEQUB_P,
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ALTIVEC_BUILTIN_VCMPEQUH_P,
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ALTIVEC_BUILTIN_VCMPEQUW_P,
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ALTIVEC_BUILTIN_VCMPGEFP_P,
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ALTIVEC_BUILTIN_VCMPGTFP_P,
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ALTIVEC_BUILTIN_VCMPGTSB_P,
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ALTIVEC_BUILTIN_VCMPGTSH_P,
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ALTIVEC_BUILTIN_VCMPGTSW_P,
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ALTIVEC_BUILTIN_VCMPGTUB_P,
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ALTIVEC_BUILTIN_VCMPGTUH_P,
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ALTIVEC_BUILTIN_VCMPGTUW_P
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};
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@ -15272,3 +15272,109 @@
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"TARGET_ALTIVEC"
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"vupklsh %0, %1"
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[(set_attr "type" "vecperm")])
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;; AltiVec predicates.
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(define_insn "altivec_vcmpequb_p"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V16QI 1 "register_operand" "v")
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(match_operand:V16QI 2 "register_operand" "v")] 173))]
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"TARGET_ALTIVEC"
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"vcmpequb. %0,%1,%2"
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[(set_attr "type" "veccmp")])
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(define_insn "altivec_vcmpequh_p"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")
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(match_operand:V8HI 2 "register_operand" "v")] 174))]
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"TARGET_ALTIVEC"
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"vcmpequh. %0,%1,%2"
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[(set_attr "type" "veccmp")])
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(define_insn "altivec_vcmpequw_p"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")
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(match_operand:V4SI 2 "register_operand" "v")] 175))]
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"TARGET_ALTIVEC"
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"vcmpequw. %0,%1,%2"
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[(set_attr "type" "veccmp")])
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(define_insn "altivec_vcmpeqfp_p"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V4SF 1 "register_operand" "v")
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(match_operand:V4SF 2 "register_operand" "v")] 176))]
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"TARGET_ALTIVEC"
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"vcmpeqfp. %0,%1,%2"
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[(set_attr "type" "veccmp")])
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(define_insn "altivec_vcmpgtub_p"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V16QI 1 "register_operand" "v")
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(match_operand:V16QI 2 "register_operand" "v")] 177))]
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"TARGET_ALTIVEC"
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"vcmpgtub. %0,%1,%2"
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[(set_attr "type" "veccmp")])
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(define_insn "altivec_vcmpgtsb_p"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V16QI 1 "register_operand" "v")
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(match_operand:V16QI 2 "register_operand" "v")] 178))]
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"TARGET_ALTIVEC"
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"vcmpgtsb. %0,%1,%2"
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[(set_attr "type" "veccmp")])
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(define_insn "altivec_vcmpgtuw_p"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")
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(match_operand:V4SI 2 "register_operand" "v")] 179))]
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"TARGET_ALTIVEC"
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"vcmpgtuw. %0,%1,%2"
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[(set_attr "type" "veccmp")])
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(define_insn "altivec_vcmpgtsw_p"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")
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(match_operand:V4SI 2 "register_operand" "v")] 180))]
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"TARGET_ALTIVEC"
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"vcmpgtsw. %0,%1,%2"
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[(set_attr "type" "veccmp")])
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(define_insn "altivec_vcmpgefp_p"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V4SF 1 "register_operand" "v")
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(match_operand:V4SF 2 "register_operand" "v")] 181))]
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"TARGET_ALTIVEC"
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"vcmpgefp. %0,%1,%2"
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[(set_attr "type" "veccmp")])
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(define_insn "altivec_vcmpgtfp_p"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V4SF 1 "register_operand" "v")
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(match_operand:V4SF 2 "register_operand" "v")] 182))]
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"TARGET_ALTIVEC"
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"vcmpgtfp. %0,%1,%2"
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[(set_attr "type" "veccmp")])
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(define_insn "altivec_vcmpbfp_p"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V4SF 1 "register_operand" "v")
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(match_operand:V4SF 2 "register_operand" "v")] 183))]
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"TARGET_ALTIVEC"
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"vcmpbfp. %0,%1,%2"
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[(set_attr "type" "veccmp")])
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(define_insn "altivec_vcmpgtuh_p"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")
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(match_operand:V8HI 2 "register_operand" "v")] 184))]
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"TARGET_ALTIVEC"
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"vcmpgtuh. %0,%1,%2"
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[(set_attr "type" "veccmp")])
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(define_insn "altivec_vcmpgtsh_p"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")
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(match_operand:V8HI 2 "register_operand" "v")] 185))]
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"TARGET_ALTIVEC"
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"vcmpgtsh. %0,%1,%2"
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[(set_attr "type" "veccmp")])
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