bfin-protos.h (WA_RETS, [...]): New macros.
* config/bfin/bfin-protos.h (WA_RETS, ENABLE_WA_RETS): New macros. * config/bfin/bfin.c (bfin_cpus): Add WA_RETS everywhere. (cputype_selected): New static variable. (bfin_handle_option): Set it if -mcpu is used. (override_option): Select default set of workarounds if no cpu type selected on the command line. (workaround_rts_anomaly): Only run if ENABLE_WA_RETS. From-SVN: r131752
This commit is contained in:
parent
24030e4c48
commit
fa8d4a0f09
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@ -1,4 +1,12 @@
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2008-01-22 Bernd Schmidt <bernd.schmidt@analog.com>
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2008-01-23 Bernd Schmidt <bernd.schmidt@analog.com>
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* config/bfin/bfin-protos.h (WA_RETS, ENABLE_WA_RETS): New macros.
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* config/bfin/bfin.c (bfin_cpus): Add WA_RETS everywhere.
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(cputype_selected): New static variable.
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(bfin_handle_option): Set it if -mcpu is used.
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(override_option): Select default set of workarounds if no cpu type
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selected on the command line.
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(workaround_rts_anomaly): Only run if ENABLE_WA_RETS.
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From Michael Frysinger <michael.frysinger@analog.com>
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From Michael Frysinger <michael.frysinger@analog.com>
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* config/bfin/bfin-protos.h (enum bfin_cpu_type): Add
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* config/bfin/bfin-protos.h (enum bfin_cpu_type): Add
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@ -65,6 +65,11 @@ extern unsigned int bfin_workarounds;
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#define ENABLE_WA_SPECULATIVE_SYNCS \
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#define ENABLE_WA_SPECULATIVE_SYNCS \
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(bfin_workarounds & WA_SPECULATIVE_SYNCS)
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(bfin_workarounds & WA_SPECULATIVE_SYNCS)
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/* For the anomaly 05-00-0371 */
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#define WA_RETS 0x00000004
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#define ENABLE_WA_RETS \
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(bfin_workarounds & WA_RETS)
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#define Mmode enum machine_mode
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#define Mmode enum machine_mode
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@ -103,6 +103,8 @@ int bfin_si_revision;
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/* The workarounds enabled */
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/* The workarounds enabled */
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unsigned int bfin_workarounds = 0;
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unsigned int bfin_workarounds = 0;
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static bool cputype_selected = false;
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struct bfin_cpu
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struct bfin_cpu
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{
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{
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const char *name;
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const char *name;
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@ -114,97 +116,97 @@ struct bfin_cpu
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struct bfin_cpu bfin_cpus[] =
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struct bfin_cpu bfin_cpus[] =
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{
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{
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{"bf522", BFIN_CPU_BF522, 0x0000,
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{"bf522", BFIN_CPU_BF522, 0x0000,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf523", BFIN_CPU_BF523, 0x0000,
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{"bf523", BFIN_CPU_BF523, 0x0000,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf524", BFIN_CPU_BF524, 0x0000,
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{"bf524", BFIN_CPU_BF524, 0x0000,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf525", BFIN_CPU_BF525, 0x0000,
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{"bf525", BFIN_CPU_BF525, 0x0000,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf526", BFIN_CPU_BF526, 0x0000,
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{"bf526", BFIN_CPU_BF526, 0x0000,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf527", BFIN_CPU_BF527, 0x0000,
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{"bf527", BFIN_CPU_BF527, 0x0000,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf531", BFIN_CPU_BF531, 0x0005,
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{"bf531", BFIN_CPU_BF531, 0x0005,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf531", BFIN_CPU_BF531, 0x0004,
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{"bf531", BFIN_CPU_BF531, 0x0004,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{"bf531", BFIN_CPU_BF531, 0x0003,
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{"bf531", BFIN_CPU_BF531, 0x0003,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{"bf532", BFIN_CPU_BF532, 0x0005,
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{"bf532", BFIN_CPU_BF532, 0x0005,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf532", BFIN_CPU_BF532, 0x0004,
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{"bf532", BFIN_CPU_BF532, 0x0004,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{"bf532", BFIN_CPU_BF532, 0x0003,
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{"bf532", BFIN_CPU_BF532, 0x0003,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{"bf533", BFIN_CPU_BF533, 0x0005,
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{"bf533", BFIN_CPU_BF533, 0x0005,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf533", BFIN_CPU_BF533, 0x0004,
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{"bf533", BFIN_CPU_BF533, 0x0004,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{"bf533", BFIN_CPU_BF533, 0x0003,
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{"bf533", BFIN_CPU_BF533, 0x0003,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{"bf534", BFIN_CPU_BF534, 0x0003,
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{"bf534", BFIN_CPU_BF534, 0x0003,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf534", BFIN_CPU_BF534, 0x0002,
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{"bf534", BFIN_CPU_BF534, 0x0002,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{"bf534", BFIN_CPU_BF534, 0x0001,
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{"bf534", BFIN_CPU_BF534, 0x0001,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{"bf536", BFIN_CPU_BF536, 0x0003,
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{"bf536", BFIN_CPU_BF536, 0x0003,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf536", BFIN_CPU_BF536, 0x0002,
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{"bf536", BFIN_CPU_BF536, 0x0002,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{"bf536", BFIN_CPU_BF536, 0x0001,
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{"bf536", BFIN_CPU_BF536, 0x0001,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{"bf537", BFIN_CPU_BF537, 0x0003,
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{"bf537", BFIN_CPU_BF537, 0x0003,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf537", BFIN_CPU_BF537, 0x0002,
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{"bf537", BFIN_CPU_BF537, 0x0002,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{"bf537", BFIN_CPU_BF537, 0x0001,
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{"bf537", BFIN_CPU_BF537, 0x0001,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{"bf538", BFIN_CPU_BF538, 0x0004,
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{"bf538", BFIN_CPU_BF538, 0x0004,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf538", BFIN_CPU_BF538, 0x0003,
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{"bf538", BFIN_CPU_BF538, 0x0003,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf539", BFIN_CPU_BF539, 0x0004,
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{"bf539", BFIN_CPU_BF539, 0x0004,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf539", BFIN_CPU_BF539, 0x0003,
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{"bf539", BFIN_CPU_BF539, 0x0003,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf539", BFIN_CPU_BF539, 0x0002,
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{"bf539", BFIN_CPU_BF539, 0x0002,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf542", BFIN_CPU_BF542, 0x0000,
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{"bf542", BFIN_CPU_BF542, 0x0000,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf544", BFIN_CPU_BF544, 0x0000,
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{"bf544", BFIN_CPU_BF544, 0x0000,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf547", BFIN_CPU_BF547, 0x0000,
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{"bf547", BFIN_CPU_BF547, 0x0000,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf548", BFIN_CPU_BF548, 0x0000,
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{"bf548", BFIN_CPU_BF548, 0x0000,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf549", BFIN_CPU_BF549, 0x0000,
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{"bf549", BFIN_CPU_BF549, 0x0000,
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WA_SPECULATIVE_LOADS},
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WA_SPECULATIVE_LOADS | WA_RETS},
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{"bf561", BFIN_CPU_BF561, 0x0005, 0},
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{"bf561", BFIN_CPU_BF561, 0x0005, WA_RETS},
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{"bf561", BFIN_CPU_BF561, 0x0003,
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{"bf561", BFIN_CPU_BF561, 0x0003,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{"bf561", BFIN_CPU_BF561, 0x0002,
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{"bf561", BFIN_CPU_BF561, 0x0002,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS},
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{NULL, 0, 0, 0}
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{NULL, 0, 0, 0}
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};
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};
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@ -2375,6 +2377,8 @@ bfin_handle_option (size_t code, const char *arg, int value)
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q = arg + strlen (p);
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q = arg + strlen (p);
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cputype_selected = true;
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if (*q == '\0')
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if (*q == '\0')
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{
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{
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bfin_si_revision = bfin_cpus[i].si_revision;
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bfin_si_revision = bfin_cpus[i].si_revision;
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@ -2455,6 +2459,9 @@ override_options (void)
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else if (bfin_specld_anomaly == 0)
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else if (bfin_specld_anomaly == 0)
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bfin_workarounds &= ~WA_SPECULATIVE_LOADS;
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bfin_workarounds &= ~WA_SPECULATIVE_LOADS;
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if (!cputype_selected)
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bfin_workarounds |= WA_RETS;
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if (TARGET_OMIT_LEAF_FRAME_POINTER)
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if (TARGET_OMIT_LEAF_FRAME_POINTER)
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flag_omit_frame_pointer = 1;
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flag_omit_frame_pointer = 1;
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@ -4779,6 +4786,9 @@ bfin_reorg (void)
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if (! ENABLE_WA_SPECULATIVE_SYNCS)
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if (! ENABLE_WA_SPECULATIVE_SYNCS)
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return;
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return;
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if (! ENABLE_WA_RETS)
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return;
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for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
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for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
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{
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{
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if (JUMP_P (insn)
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if (JUMP_P (insn)
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