arm.c (arm_evpc_neon_vrev): Adjust off by one error.
2012-05-30 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> * config/arm/arm.c (arm_evpc_neon_vrev): Adjust off by one error. 2012-05-30 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> * gcc.target/arm/neon-vrev.c: New. From-SVN: r187999
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2012-05-30 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
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* config/arm/arm.c (arm_evpc_neon_vrev): Adjust off by one error.
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2012-05-29 Jack Howarth <howarth@bromo.med.uc.edu>
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PR debug/53453
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@ -25637,10 +25637,18 @@ arm_evpc_neon_vrev (struct expand_vec_perm_d *d)
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return false;
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}
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for (i = 0; i < nelt; i += diff)
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for (i = 0; i < nelt ; i += diff + 1)
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for (j = 0; j <= diff; j += 1)
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if (d->perm[i + j] != i + diff - j)
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return false;
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{
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/* This is guaranteed to be true as the value of diff
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is 7, 3, 1 and we should have enough elements in the
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queue to generate this. Getting a vector mask with a
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value of diff other than these values implies that
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something is wrong by the time we get here. */
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gcc_assert (i + j < nelt);
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if (d->perm[i + j] != i + diff - j)
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return false;
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}
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/* Success! */
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if (d->testing_p)
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@ -1,3 +1,7 @@
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2012-05-30 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
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* gcc.target/arm/neon-vrev.c: New.
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2012-05-29 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/51340
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@ -0,0 +1,105 @@
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/* { dg-do compile } */
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/* { dg-require-effective-target arm_neon_ok } */
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/* { dg-options "-O2" } */
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/* { dg-add-options arm_neon } */
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#include <arm_neon.h>
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uint16x4_t
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tst_vrev642_u16 (uint16x4_t __a)
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{
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uint16x4_t __rv;
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uint16x4_t __mask1 = { 3, 2, 1, 0};
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return __builtin_shuffle ( __a, __mask1) ;
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}
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uint16x8_t
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tst_vrev64q2_u16 (uint16x8_t __a)
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{
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uint16x8_t __rv;
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uint16x8_t __mask1 = {3, 2, 1, 0, 7, 6, 5, 4 };
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return __builtin_shuffle ( __a, __mask1) ;
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}
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uint8x8_t
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tst_vrev642_u8 (uint8x8_t __a)
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{
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uint8x8_t __rv;
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uint8x8_t __mask1 = { 7, 6, 5, 4, 3, 2, 1, 0};
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return __builtin_shuffle ( __a, __mask1) ;
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}
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uint8x16_t
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tst_vrev64q2_u8 (uint8x16_t __a)
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{
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uint8x16_t __rv;
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uint8x16_t __mask1 = {7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8};
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return __builtin_shuffle ( __a, __mask1) ;
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}
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uint32x2_t
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tst_vrev642_u32 (uint32x2_t __a)
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{
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uint32x2_t __rv;
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uint32x2_t __mask1 = {1, 0};
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return __builtin_shuffle ( __a, __mask1) ;
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}
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uint32x4_t
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tst_vrev64q2_u32 (uint32x4_t __a)
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{
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uint32x4_t __rv;
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uint32x4_t __mask1 = {1, 0, 3, 2};
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return __builtin_shuffle ( __a, __mask1) ;
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}
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uint16x4_t
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tst_vrev322_u16 (uint16x4_t __a)
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{
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uint16x4_t __mask1 = { 1, 0, 3, 2 };
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return __builtin_shuffle (__a, __mask1);
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}
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uint16x8_t
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tst_vrev32q2_u16 (uint16x8_t __a)
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{
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uint16x8_t __mask1 = { 1, 0, 3, 2, 5, 4, 7, 6 };
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return __builtin_shuffle (__a, __mask1);
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}
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uint8x8_t
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tst_vrev322_u8 (uint8x8_t __a)
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{
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uint8x8_t __mask1 = { 3, 2, 1, 0, 7, 6, 5, 4};
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return __builtin_shuffle (__a, __mask1);
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}
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uint8x16_t
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tst_vrev32q2_u8 (uint8x16_t __a)
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{
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uint8x16_t __mask1 = { 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12};
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return __builtin_shuffle (__a, __mask1);
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}
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uint8x8_t
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tst_vrev162_u8 (uint8x8_t __a)
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{
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uint8x8_t __mask = { 1, 0, 3, 2, 5, 4, 7, 6};
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return __builtin_shuffle (__a, __mask);
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}
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uint8x16_t
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tst_vrev16q2_u8 (uint8x16_t __a)
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{
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uint8x16_t __mask = { 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14};
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return __builtin_shuffle (__a, __mask);
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}
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/* { dg-final {scan-assembler-times "vrev32\.16\\t" 2} } */
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/* { dg-final {scan-assembler-times "vrev32\.8\\t" 2} } */
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/* { dg-final {scan-assembler-times "vrev16\.8\\t" 2} } */
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/* { dg-final {scan-assembler-times "vrev64\.8\\t" 2} } */
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/* { dg-final {scan-assembler-times "vrev64\.32\\t" 2} } */
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/* { dg-final {scan-assembler-times "vrev64\.16\\t" 2} } */
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