From fae778eb67bb0f679f8dd35b8d1dd27ab453b1ef Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Thu, 3 Jul 2003 16:25:52 +0000 Subject: [PATCH] 2064.md: Fix comment typos. * config/s390/2064.md: Fix comment typos. * config/s390/2084.md: Likewise. * config/s390/s390.c: Likewise. * config/s390/s390.md: Likewise. * config/sh/sh.c: Likewise. * config/sh/sh.h: Likewise. * config/sh/sh.md: Likewise. * config/sparc/sparc.c: Likewise. * config/sparc/sparc.h: Likewise. * config/sparc/sparc.md: Likewise. * config/stormy16/stormy16.c: Likewise. * config/stormy16/stormy16.h: Likewise. * config/stormy16/stormy-abi: Fix a typo. From-SVN: r68887 --- gcc/ChangeLog | 16 ++++++++++++++++ gcc/config/s390/2064.md | 4 ++-- gcc/config/s390/2084.md | 4 ++-- gcc/config/s390/s390.c | 4 ++-- gcc/config/s390/s390.md | 4 ++-- gcc/config/sh/sh.c | 4 ++-- gcc/config/sh/sh.h | 4 ++-- gcc/config/sh/sh.md | 4 ++-- gcc/config/sparc/sparc.c | 8 ++++---- gcc/config/sparc/sparc.h | 6 +++--- gcc/config/sparc/sparc.md | 4 ++-- gcc/config/stormy16/stormy-abi | 2 +- gcc/config/stormy16/stormy16.c | 2 +- gcc/config/stormy16/stormy16.h | 2 +- 14 files changed, 42 insertions(+), 26 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b80c6b60217..277cf33493f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,19 @@ +2003-07-03 Kazu Hirata + + * config/s390/2064.md: Fix comment typos. + * config/s390/2084.md: Likewise. + * config/s390/s390.c: Likewise. + * config/s390/s390.md: Likewise. + * config/sh/sh.c: Likewise. + * config/sh/sh.h: Likewise. + * config/sh/sh.md: Likewise. + * config/sparc/sparc.c: Likewise. + * config/sparc/sparc.h: Likewise. + * config/sparc/sparc.md: Likewise. + * config/stormy16/stormy16.c: Likewise. + * config/stormy16/stormy16.h: Likewise. + * config/stormy16/stormy-abi: Fix a typo. + 2003-07-03 Kelley Cook * Makefile.in (ifcvt.o): Depend on OPTABS_H. diff --git a/gcc/config/s390/2064.md b/gcc/config/s390/2064.md index c348bc50549..dc83cb6de6f 100644 --- a/gcc/config/s390/2064.md +++ b/gcc/config/s390/2064.md @@ -98,11 +98,11 @@ ;; ;; s390_agen_dep_p returns 1, if a register is set in the -;; first insn and used in the dependend insn to form a address. +;; first insn and used in the dependent insn to form a address. ;; ;; -;; If a intruction uses a register to address memory, it needs +;; If an instruction uses a register to address memory, it needs ;; to be set 5 cycles in advance. ;; diff --git a/gcc/config/s390/2084.md b/gcc/config/s390/2084.md index e8d7761688b..f14bd21bc94 100644 --- a/gcc/config/s390/2084.md +++ b/gcc/config/s390/2084.md @@ -209,11 +209,11 @@ ;; ;; s390_agen_dep_p returns 1, if a register is set in the -;; first insn and used in the dependend insn to form a address. +;; first insn and used in the dependent insn to form a address. ;; ;; -;; If a intruction uses a register to address memory, it needs +;; If an instruction uses a register to address memory, it needs ;; to be set 5 cycles in advance. ;; diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index f748374d511..4e771be867d 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -896,7 +896,7 @@ s390_split_ok_p (dst, src, mode, first_subword) if (FP_REG_P (src) || FP_REG_P (dst)) return false; - /* We don't need to split if operands are directly accessable. */ + /* We don't need to split if operands are directly accessible. */ if (s_operand (src, mode) || s_operand (dst, mode)) return false; @@ -5645,7 +5645,7 @@ s390_emit_prologue () insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx)); } - /* Substract frame size from stack pointer. */ + /* Subtract frame size from stack pointer. */ if (DISP_IN_RANGE (INTVAL (frame_off))) { diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index c24dab11c0a..bd7b832039b 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -3002,9 +3002,9 @@ ;; -;; ARITHMETRIC OPERATIONS +;; ARITHMETIC OPERATIONS ;; -; arithmetric operations set the ConditionCode, +; arithmetic operations set the ConditionCode, ; because of unpredictable Bits in Register for Halfword and Byte ; the ConditionCode can be set wrong in operations for Halfword and Byte diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index 05c6c0ac889..e1c81c9c178 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -379,7 +379,7 @@ print_operand_address (stream, x) ',' print LOCAL_LABEL_PREFIX '@' print trap, rte or rts depending upon pragma interruptness '#' output a nop if there is nothing to put in the delay slot - ''' print likelyhood suffix (/u for unlikely). + ''' print likelihood suffix (/u for unlikely). 'O' print a constant without the # 'R' print the LSW of a dp value - changes if in little endian 'S' print the MSW of a dp value - changes if in little endian @@ -3557,7 +3557,7 @@ gen_far_branch (bp) jump = emit_jump_insn_after (gen_return (), insn); /* Emit a barrier so that reorg knows that any following instructions are not reachable via a fall-through path. - But don't do this when not optimizing, since we wouldn't supress the + But don't do this when not optimizing, since we wouldn't suppress the alignment for the barrier then, and could end up with out-of-range pc-relative loads. */ if (optimize) diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index ee49f6b9a79..9ab647aff5d 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -634,7 +634,7 @@ do { \ /* get_mode_alignment assumes complex values are always held in multiple registers, but that is not the case on the SH; CQImode and CHImode are held in a single integer register. SH5 also holds CSImode and SCmode - values in integer regsters. This is relevant for argument passing on + values in integer registers. This is relevant for argument passing on SHcompact as we use a stack temp in order to pass CSImode by reference. */ #define LOCAL_ALIGNMENT(TYPE, ALIGN) \ ((GET_MODE_CLASS (TYPE_MODE (TYPE)) == MODE_COMPLEX_INT \ @@ -1359,7 +1359,7 @@ extern enum reg_class reg_class_from_letter[]; unused CONST_INT constraint letters: LO unused EXTRA_CONSTRAINT letters: D T U Y */ -#if 1 /* check that the transistion went well. */ +#if 1 /* check that the transition went well. */ #define CONSTRAINT_LEN(C,STR) \ (((C) == 'L' || (C) == 'O' || (C) == 'D' || (C) == 'T' || (C) == 'U' \ || (C) == 'Y' \ diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 1d72db6cb89..2af568b772c 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -3002,8 +3002,8 @@ operands[1] = XEXP (operands[1], 0); }") -;; ??? when a truncated input to a zero_extrend is reloaded, reload will -;; reload the entrire truncate expression. +;; ??? when a truncated input to a zero_extend is reloaded, reload will +;; reload the entire truncate expression. (define_insn_and_split "*loaddi_trunc" [(set (match_operand 0 "int_gpr_dest" "=r") (truncate (match_operand:DI 1 "memory_operand" "m")))] diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 148bcee53f4..08b0236cd66 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -1368,7 +1368,7 @@ input_operand (op, mode) /* We know it can't be done in one insn when we get here, - the movsi expander guarentees this. */ + the movsi expander guarantees this. */ void sparc_emit_set_const32 (op0, op1) rtx op0; @@ -4552,7 +4552,7 @@ static rtx function_arg_record_value PARAMS ((tree, enum machine_mode, int, int, int)); /* A subroutine of function_arg_record_value. Traverse the structure - recusively and determine how many registers will be required. */ + recursively and determine how many registers will be required. */ static void function_arg_record_value_1 (type, startbitpos, parms) @@ -4959,7 +4959,7 @@ function_arg (cum, mode, type, named, incoming_p) This is due to locate_and_pad_parm being called in expand_call whenever reg_parm_stack_space > 0, which - while benefical to our example here, would seem to be + while beneficial to our example here, would seem to be in error from what had been intended. Ho hum... -- r~ */ #endif return reg; @@ -6131,7 +6131,7 @@ sparc_splitdi_legitimate (reg, mem) } /* Return 1 if x and y are some kind of REG and they refer to - different hard registers. This test is guarenteed to be + different hard registers. This test is guaranteed to be run after reload. */ int diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 872f224c8c5..9235f66bf53 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -26,7 +26,7 @@ Boston, MA 02111-1307, USA. */ whatever definitions are necessary. */ /* Target CPU builtins. FIXME: Defining sparc is for the benefit of - Solaris only; otheriwse just define __sparc__. Sadly the headers + Solaris only; otherwise just define __sparc__. Sadly the headers are such a mess there is no Solaris-specific header. */ #define TARGET_CPU_CPP_BUILTINS() \ do \ @@ -1043,7 +1043,7 @@ while (0) : (GET_MODE_SIZE (MODE) + 3) / 4) \ : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) -/* Due to the ARCH64 descrepancy above we must override this next +/* Due to the ARCH64 discrepancy above we must override this next macro too. */ #define REGMODE_NATURAL_SIZE(MODE) \ ((TARGET_ARCH64 && FLOAT_MODE_P (MODE)) ? 4 : UNITS_PER_WORD) @@ -1278,7 +1278,7 @@ extern enum reg_class sparc_regno_reg_class[FIRST_PSEUDO_REGISTER]; We know in this case that we will not end up with a leaf function. - The register allocater is given the global and out registers first + The register allocator is given the global and out registers first because these registers are call clobbered and thus less useful to global register allocation. diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 81fbebffcf1..07ce71874c6 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -3201,7 +3201,7 @@ operands[1])); } - /* Handle MEM cases first, note that only v9 guarentees + /* Handle MEM cases first, note that only v9 guarantees full 16-byte alignment for quads. */ if (GET_CODE (operands[0]) == MEM) { @@ -7771,7 +7771,7 @@ ;; For __builtin_setjmp we need to flush register windows iff the function ;; calls alloca as well, because otherwise the register window might be -;; saved after %sp adjustement and thus setjmp would crash +;; saved after %sp adjustment and thus setjmp would crash (define_expand "builtin_setjmp_setup" [(match_operand 0 "register_operand" "r")] "" diff --git a/gcc/config/stormy16/stormy-abi b/gcc/config/stormy16/stormy-abi index 4243136d692..01d15796f4e 100644 --- a/gcc/config/stormy16/stormy-abi +++ b/gcc/config/stormy16/stormy-abi @@ -162,6 +162,6 @@ In the 'Overflow' column, 'none' means that any overflow of the computation perfomed in the 'Calculation' column is ignored. 'signed' means that the overflow is only reported if it happens when the values are treated as signed quantities. 'unsigned' is the same, -except that the values are treated as unsigned qunatities. 'either' +except that the values are treated as unsigned quantities. 'either' means that overflow is reported for either signed or unsigned overflow. diff --git a/gcc/config/stormy16/stormy16.c b/gcc/config/stormy16/stormy16.c index fff02a70240..8ce526f90d2 100644 --- a/gcc/config/stormy16/stormy16.c +++ b/gcc/config/stormy16/stormy16.c @@ -729,7 +729,7 @@ nonimmediate_nonstack_operand (op, mode) && ! xstormy16_extra_constraint_p (op, 'R')); } -/* Splitter for the 'move' patterns, for modes not directly implemeted +/* Splitter for the 'move' patterns, for modes not directly implemented by hardware. Emit insns to copy a value of mode MODE from SRC to DEST. diff --git a/gcc/config/stormy16/stormy16.h b/gcc/config/stormy16/stormy16.h index 58fe8356083..c6d1596a4d9 100644 --- a/gcc/config/stormy16/stormy16.h +++ b/gcc/config/stormy16/stormy16.h @@ -496,7 +496,7 @@ enum reg_class if (! SECOND_TIME) \ xstormy16_setup_incoming_varargs (ARGS_SO_FAR, MODE, TYPE, & PRETEND_ARGS_SIZE) -/* Build up the stdarg/varargs va_list type tree, assinging it to NODE. If not +/* Build up the stdarg/varargs va_list type tree, assigning it to NODE. If not defined, it is assumed that va_list is a void * pointer. */ #define BUILD_VA_LIST_TYPE(NODE) \ ((NODE) = xstormy16_build_va_list ())