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RISC-V: Fix build error

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- This build error was indroduced by "RISC-V: Implement movmemsi"
    and "RISC-V: Support -mpreferred-stack-boundary flag"

gcc/ChangeLog

2017-11-08  Kito Cheng  <kito.cheng@gmail.com>

        * config/riscv/riscv-protos.h (riscv_slow_unaligned_access_p):
        New extern.
        (MOVE_RATIO): Use riscv_slow_unaligned_access_p.
        config/riscv/riscv.c (predict.h): New include.
        (riscv_slow_unaligned_access_p): No longer static.
        (riscv_block_move_straight): Add require.
        config/riscv/riscv-protos.h (riscv_hard_regno_nregs): Delete.

From-SVN: r254554
This commit is contained in:
Kito Cheng 2017-11-08 22:04:49 +00:00 committed by Palmer Dabbelt
parent fd5dce5c53
commit fb5621b184
4 changed files with 16 additions and 4 deletions
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10
gcc/ChangeLog
View File

@ -1,3 +1,13 @@
2017-11-08 Kito Cheng <kito.cheng@gmail.com>
* config/riscv/riscv-protos.h (riscv_slow_unaligned_access_p):
New extern.
(MOVE_RATIO): Use riscv_slow_unaligned_access_p.
config/riscv/riscv.c (predict.h): New include.
(riscv_slow_unaligned_access_p): No longer static.
(riscv_block_move_straight): Add require.
config/riscv/riscv-protos.h (riscv_hard_regno_nregs): Delete.
2017-11-08 Jakub Jelinek <jakub@redhat.com>
PR target/82855

1
gcc/config/riscv/riscv-protos.h
View File

@ -68,7 +68,6 @@ extern void riscv_expand_prologue (void);
extern void riscv_expand_epilogue (bool);
extern bool riscv_can_use_return_insn (void);
extern rtx riscv_function_value (const_tree, const_tree, enum machine_mode);
extern unsigned int riscv_hard_regno_nregs (int, enum machine_mode);
extern bool riscv_expand_block_move (rtx, rtx, rtx);
/* Routines implemented in riscv-c.c. */

5
gcc/config/riscv/riscv.c
View File

@ -51,6 +51,7 @@ along with GCC; see the file COPYING3. If not see
#include "df.h"
#include "diagnostic.h"
#include "builtins.h"
#include "predict.h"
/* True if X is an UNSPEC wrapper around a SYMBOL_REF or LABEL_REF. */
#define UNSPEC_ADDRESS_P(X) \
@ -217,7 +218,7 @@ struct riscv_cpu_info {
/* Global variables for machine-dependent things. */
/* Whether unaligned accesses execute very slowly. */
static bool riscv_slow_unaligned_access_p;
bool riscv_slow_unaligned_access_p;
/* Which tuning parameters to use. */
static const struct riscv_tune_info *tune_info;
@ -2657,7 +2658,7 @@ riscv_block_move_straight (rtx dest, rtx src, HOST_WIDE_INT length)
bits = MAX (BITS_PER_UNIT,
MIN (BITS_PER_WORD, MIN (MEM_ALIGN (src), MEM_ALIGN (dest))));
mode = mode_for_size (bits, MODE_INT, 0);
mode = mode_for_size (bits, MODE_INT, 0).require ();
delta = bits / BITS_PER_UNIT;
/* Allocate a buffer for the temporary registers. */

4
gcc/config/riscv/riscv.h
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@ -824,7 +824,7 @@ while (0)
case, movmem or libcall is more efficient. */
#define MOVE_RATIO(speed) \
(!STRICT_ALIGNMENT && riscv_slow_unaligned_access ? 1 : \
(!STRICT_ALIGNMENT && riscv_slow_unaligned_access_p ? 1 : \
(speed) ? RISCV_MAX_MOVE_BYTES_PER_LOOP_ITER / UNITS_PER_WORD : \
CLEAR_RATIO (speed) / 2)
@ -841,6 +841,8 @@ while (0)
#ifndef USED_FOR_TARGET
extern const enum reg_class riscv_regno_to_class[];
extern bool riscv_slow_unaligned_access_p;
extern unsigned riscv_stack_boundary;
#endif
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \