From fb5e5621003312f08d6a50c5043cbc43aa6709d1 Mon Sep 17 00:00:00 2001
From: Kelvin Nilsen <kelvin@gcc.gnu.org>
Date: Mon, 17 Apr 2017 16:16:43 +0000
Subject: [PATCH] re PR target/80315 (Calling __builtin_crypto_vshasigmaw with
 argument 3 out of range creates an unrecognizable insn)

gcc/testsuite/ChangeLog:

2017-04-12  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	PR target/80315
	* gcc.target/powerpc/pr80315-1.c: New test.
	* gcc.target/powerpc/pr80315-2.c: New test.
	* gcc.target/powerpc/pr80315-3.c: New test.
	* gcc.target/powerpc/pr80315-4.c: New test.

From-SVN: r246949
---
 gcc/testsuite/ChangeLog                      |  8 ++++++++
 gcc/testsuite/gcc.target/powerpc/pr80315-1.c | 16 ++++++++++++++++
 gcc/testsuite/gcc.target/powerpc/pr80315-2.c | 16 ++++++++++++++++
 gcc/testsuite/gcc.target/powerpc/pr80315-3.c | 18 ++++++++++++++++++
 gcc/testsuite/gcc.target/powerpc/pr80315-4.c | 18 ++++++++++++++++++
 5 files changed, 76 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/pr80315-1.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/pr80315-2.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/pr80315-3.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/pr80315-4.c

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 8286f736d6f..204d8636d9d 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2017-04-12  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+
+	PR target/80315
+	* gcc.target/powerpc/pr80315-1.c: New test.
+	* gcc.target/powerpc/pr80315-2.c: New test.
+	* gcc.target/powerpc/pr80315-3.c: New test.
+	* gcc.target/powerpc/pr80315-4.c: New test.
+
 2017-04-16  Tom de Vries  <tom@codesourcery.com>
 
 	* g++.dg/parse/error11.C: Remove braces around line number in dejagnu
diff --git a/gcc/testsuite/gcc.target/powerpc/pr80315-1.c b/gcc/testsuite/gcc.target/powerpc/pr80315-1.c
new file mode 100644
index 00000000000..3fcf334f1c3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr80315-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mcpu=power8" } */
+
+int
+main()
+{
+  __attribute__((altivec(vector__))) unsigned int test, res;
+  const int s0 = 0;
+  int mask;
+
+  /* Argument 2 must be 0 or 1.  Argument 3 must be in range 0..15.  */
+  res = __builtin_crypto_vshasigmaw (test, 1, 0xff); /* { dg-error "argument 3 must be in the range 0..15" } */
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr80315-2.c b/gcc/testsuite/gcc.target/powerpc/pr80315-2.c
new file mode 100644
index 00000000000..250fc58a9f6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr80315-2.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mcpu=power8" } */
+
+int
+main ()
+{
+  __attribute__((altivec(vector__))) unsigned long long test, res;
+  const int s0 = 0;
+  int mask;
+
+  /* Argument 2 must be 0 or 1.  Argument 3 must be in range 0..15.  */
+  res = __builtin_crypto_vshasigmad (test, 1, 0xff); /* { dg-error "argument 3 must be in the range 0..15" } */
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr80315-3.c b/gcc/testsuite/gcc.target/powerpc/pr80315-3.c
new file mode 100644
index 00000000000..2084e920de9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr80315-3.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+vector unsigned int
+main ()
+{
+  vector unsigned int test, res;
+  const int s0 = 0;
+  int mask;
+
+  /* Argument 2 must be 0 or 1.  Argument 3 must be in range 0..15.  */
+  res = vec_shasigma_be (test, 1, 0xff); /* { dg-error "argument 3 must be in the range 0..15" } */
+  return res;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr80315-4.c b/gcc/testsuite/gcc.target/powerpc/pr80315-4.c
new file mode 100644
index 00000000000..2d87b40ea83
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr80315-4.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+vector unsigned long long int
+main ()
+{
+  vector unsigned long long int test, res;
+  const int s0 = 0;
+  int mask;
+
+  /* Argument 2 must be 0 or 1.  Argument 3 must be in range 0..15.  */
+  res = vec_shasigma_be (test, 1, 0xff); /* { dg-error "argument 3 must be in the range 0..15" } */
+  return res;
+}