diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a3cc94e2a32..1dc690f42cb 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-12-12  Bernd Schmidt  <bschmidt@redhat.com>
+
+	PR rtl-optimization/78669
+	* ira.c (combine_and_move_insns): When deleting an insn, clear the
+	replace flag for all used regs in that insn.
+
 2016-12-12  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
 	* config/arm/arm-opts.h: Move struct arm_arch_core_flag and
diff --git a/gcc/ira.c b/gcc/ira.c
index 4a95e3d22be..5823d5c7dda 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -3714,6 +3714,14 @@ combine_and_move_insns (void)
 	  remove_death (regno, use_insn);
 	  SET_REG_N_REFS (regno, 0);
 	  REG_FREQ (regno) = 0;
+	  df_ref use;
+	  FOR_EACH_INSN_USE (use, def_insn)
+	    {
+	      unsigned int use_regno = DF_REF_REGNO (use);
+	      if (!HARD_REGISTER_NUM_P (use_regno))
+		reg_equiv[use_regno].replace = 0;
+	    }
+
 	  delete_insn (def_insn);
 
 	  reg_equiv[regno].init_insns = NULL;
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ed44f323013..66407ff05d9 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-12-12  Bernd Schmidt  <bschmidt@redhat.com>
+
+	PR rtl-optimization/78669
+	* gcc.target/i386/pr78669.c: New test.
+
 2016-12-12  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 
 	* g++.dg/debug/dwarf2/typedef1.C: Adjust pattern for last change.
diff --git a/gcc/testsuite/gcc.target/i386/pr78669.c b/gcc/testsuite/gcc.target/i386/pr78669.c
new file mode 100644
index 00000000000..14f0f06eb63
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr78669.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target int128 } */
+/* { dg-options "-Os -fno-tree-ter -mavx512bw " } */
+typedef __int128 u128;
+typedef __int128 v64u128 __attribute__((vector_size(64)));
+
+v64u128 v64u128_g;
+
+static inline v64u128
+baz(v64u128 v64u128_0, v64u128 v64u128_3)
+{
+  v64u128_0 |= (v64u128){} == v64u128_0;
+  v64u128_3 = (v64u128){} >= v64u128_3;
+  return v64u128_0 + v64u128_3;
+}
+
+static void __attribute__((noinline, noclone))
+bar(u128 u128_0, v64u128 v64u128_3)
+{
+  v64u128_g = baz((v64u128){(u128)1 << 64, u128_0}, v64u128_3);
+}
+
+void
+foo(v64u128 v64u128_3)
+{
+  bar(3, v64u128_3);
+}