IBM Z: Update autovec-*-quiet-uneq expectations
Commit 229752afe3
("VEC_COND_EXPR optimizations") has improved code
generation: we no longer need "vx x,x,-1", which turned out to be
superfluous. Instead, we simply swap 0 and -1 arguments of the
preceding "vsel".
gcc/testsuite/ChangeLog:
2020-11-23 Ilya Leoshkevich <iii@linux.ibm.com>
* gcc.target/s390/zvector/autovec-double-quiet-uneq.c: Expect
that "vx" is not emitted.
* gcc.target/s390/zvector/autovec-float-quiet-uneq.c: Likewise.
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@ -5,6 +5,9 @@
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AUTOVEC_DOUBLE (QUIET_UNEQ);
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AUTOVEC_DOUBLE (QUIET_UNEQ);
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/* { dg-final { scan-assembler {\n\tvzero\t} } } */
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/* { dg-final { scan-assembler {\n\tvgmg\t} } } */
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/* { dg-final { scan-assembler-times {\n\tvfchdb\t} 2 } } */
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/* { dg-final { scan-assembler-times {\n\tvfchdb\t} 2 } } */
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/* { dg-final { scan-assembler {\n\tvo\t} } } */
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/* { dg-final { scan-assembler {\n\tvo\t} } } */
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/* { dg-final { scan-assembler {\n\tvx\t} } } */
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/* { dg-final { scan-assembler {\n\tvsel\t} } } */
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/* { dg-final { scan-assembler-not {\n\tvx\t} } } */
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@ -5,6 +5,9 @@
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AUTOVEC_FLOAT (QUIET_UNEQ);
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AUTOVEC_FLOAT (QUIET_UNEQ);
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/* { dg-final { scan-assembler {\n\tvzero\t} } } */
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/* { dg-final { scan-assembler {\n\tvgmf\t} } } */
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/* { dg-final { scan-assembler-times {\n\tvfchsb\t} 2 } } */
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/* { dg-final { scan-assembler-times {\n\tvfchsb\t} 2 } } */
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/* { dg-final { scan-assembler {\n\tvo\t} } } */
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/* { dg-final { scan-assembler {\n\tvo\t} } } */
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/* { dg-final { scan-assembler {\n\tvx\t} } } */
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/* { dg-final { scan-assembler {\n\tvsel\t} } } */
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/* { dg-final { scan-assembler-not {\n\tvx\t} } } */
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