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s390.c (print_operand): Support 'S' format flag. 

* config/s390/s390.c (print_operand): Support 'S' format flag.
	* config/s390/s390.md ("*tmqi_mem"): Use 'S' format flag.
	("*tstsi", "*tstsi_cconly", "*tstsi_cconly2"): Likewise.
	("*tsthiCCT", "*tsthiCCT_cconly", "*tsthi", "*tsthi_cconly"): Likewise.
	("*tstqiCCT", "*tstqiCCT_cconly", "*tstqi", "*tstqi_cconly"): Likewise.
	("*cmphi_ccu", "*cmpqi_ccu", "*clc"): Likewise
	("movti", "*movdi_31", "*movqi", "*movdf_31", "*mvc"): Likewise.
	("*movstricthi"): Likewise.
	("*load_multiple_di", "*load_multiple_si"): Likewise.
	("*store_multiple_di", "*store_multiple_si"): Likewise.
	("*sethiqisi", "*sethihisi"): Likewise.
	("*sethiqidi_64", "*sethiqidi_31"): Likewise.
	("*andqi3_zarch", "*andqi3_esa", "*nc"): Likewise.
	("*iorqi3_zarch", "*iorqi3_esa", "*oc"): Likewise.
	("*xorqi3", "*xc", "*xc_zero"): Likewise.
	("get_tp_64", "get_tp_31", "set_tp_64", "set_tp_31"): Likewise.

	("*tmhi_full"): Fix incorrect op_type attribute.

	("*adddi3_alc_cc", "*adddi3_alc"): Remove double backslash.
	("*subdi3_slb_cc", "*subdi3_slb"): Likewise.
	("*addsi3_alc_cc", "*addsi3_alc"): Likewise.
	("*subsi3_slb_cc", "*subsi3_slb"): Likewise.

From-SVN: r88903
This commit is contained in:
Ulrich Weigand 2004-10-11 20:54:07 +00:00 committed by Ulrich Weigand
parent 61b26514c2
commit fc0ea003f9
3 changed files with 132 additions and 84 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
gcc/ChangeLog
View File

@ -1,3 +1,29 @@
2004-10-11 Ulrich Weigand <uweigand@de.ibm.com>
* config/s390/s390.c (print_operand): Support 'S' format flag.
* config/s390/s390.md ("*tmqi_mem"): Use 'S' format flag.
("*tstsi", "*tstsi_cconly", "*tstsi_cconly2"): Likewise.
("*tsthiCCT", "*tsthiCCT_cconly", "*tsthi", "*tsthi_cconly"): Likewise.
("*tstqiCCT", "*tstqiCCT_cconly", "*tstqi", "*tstqi_cconly"): Likewise.
("*cmphi_ccu", "*cmpqi_ccu", "*clc"): Likewise
("movti", "*movdi_31", "*movqi", "*movdf_31", "*mvc"): Likewise.
("*movstricthi"): Likewise.
("*load_multiple_di", "*load_multiple_si"): Likewise.
("*store_multiple_di", "*store_multiple_si"): Likewise.
("*sethiqisi", "*sethihisi"): Likewise.
("*sethiqidi_64", "*sethiqidi_31"): Likewise.
("*andqi3_zarch", "*andqi3_esa", "*nc"): Likewise.
("*iorqi3_zarch", "*iorqi3_esa", "*oc"): Likewise.
("*xorqi3", "*xc", "*xc_zero"): Likewise.
("get_tp_64", "get_tp_31", "set_tp_64", "set_tp_31"): Likewise.
("*tmhi_full"): Fix incorrect op_type attribute.
("*adddi3_alc_cc", "*adddi3_alc"): Remove double backslash.
("*subdi3_slb_cc", "*subdi3_slb"): Likewise.
("*addsi3_alc_cc", "*addsi3_alc"): Likewise.
("*subsi3_slb_cc", "*subsi3_slb"): Likewise.
2004-10-11 Andrew Pinski <pinskia@physics.uc.edu
PR middle-end/16266

21
gcc/config/s390/s390.c
View File

@ -4066,6 +4066,7 @@ print_operand_address (FILE *file, rtx addr)
'J': print tls_load/tls_gdcall/tls_ldcall suffix
'O': print only the displacement of a memory reference.
'R': print only the base register of a memory reference.
'S': print S-type memory reference (base+displacement).
'N': print the second word of a DImode operand.
'M': print the second word of a TImode operand.
'Y': print shift count operand.
@ -4143,6 +4144,26 @@ print_operand (FILE *file, rtx x, int code)
}
return;
case 'S':
{
struct s390_address ad;
if (GET_CODE (x) != MEM
|| !s390_decompose_address (XEXP (x, 0), &ad)
|| (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
|| ad.indx)
abort ();
if (ad.disp)
output_addr_const (file, ad.disp);
else
fprintf (file, "0");
if (ad.base)
fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
}
return;
case 'N':
if (GET_CODE (x) == REG)
x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);

169
gcc/config/s390/s390.md
View File

@ -60,6 +60,7 @@
;; %J: print tls_load/tls_gdcall/tls_ldcall suffix
;; %O: print only the displacement of a memory reference.
;; %R: print only the base register of a memory reference.
;; %S: print S-type memory reference (base+displacement).
;; %N: print the second word of a DImode operand.
;; %M: print the second word of a TImode operand.
@ -302,8 +303,8 @@
(match_operand:QI 2 "immediate_operand" "n,n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 0))"
"@
tm\t%0,%b1
tmy\t%0,%b1"
tm\t%S0,%b1
tmy\t%S0,%b1"
[(set_attr "op_type" "SI,SIY")])
(define_insn "*tmdi_reg"
@ -340,7 +341,7 @@
(match_operand:HI 1 "immediate_operand" "n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (constm1_rtx, operands[1], 1))"
"tml\t%0,65535"
[(set_attr "op_type" "RX")])
[(set_attr "op_type" "RI")])
(define_insn "*tmqi_full"
[(set (reg 33)
@ -401,8 +402,8 @@
"s390_match_ccmode(insn, CCSmode)"
"@
ltr\t%2,%0
icm\t%2,15,%0
icmy\t%2,15,%0"
icm\t%2,15,%S0
icmy\t%2,15,%S0"
[(set_attr "op_type" "RR,RS,RSY")])
(define_insn "*tstsi_cconly"
@ -413,8 +414,8 @@
"s390_match_ccmode(insn, CCSmode)"
"@
ltr\t%0,%0
icm\t%2,15,%0
icmy\t%2,15,%0"
icm\t%2,15,%S0
icmy\t%2,15,%S0"
[(set_attr "op_type" "RR,RS,RSY")])
(define_insn "*tstsi_cconly2"
@ -433,8 +434,8 @@
(match_dup 0))]
"s390_match_ccmode(insn, CCTmode)"
"@
icm\t%2,3,%0
icmy\t%2,3,%0
icm\t%2,3,%S0
icmy\t%2,3,%S0
tml\t%0,65535"
[(set_attr "op_type" "RS,RSY,RI")])
@ -445,8 +446,8 @@
(clobber (match_scratch:HI 2 "=d,d,X"))]
"s390_match_ccmode(insn, CCTmode)"
"@
icm\t%2,3,%0
icmy\t%2,3,%0
icm\t%2,3,%S0
icmy\t%2,3,%S0
tml\t%0,65535"
[(set_attr "op_type" "RS,RSY,RI")])
@ -458,8 +459,8 @@
(match_dup 0))]
"s390_match_ccmode(insn, CCSmode)"
"@
icm\t%2,3,%0
icmy\t%2,3,%0"
icm\t%2,3,%S0
icmy\t%2,3,%S0"
[(set_attr "op_type" "RS,RSY")])
(define_insn "*tsthi_cconly"
@ -469,8 +470,8 @@
(clobber (match_scratch:HI 2 "=d,d"))]
"s390_match_ccmode(insn, CCSmode)"
"@
icm\t%2,3,%0
icmy\t%2,3,%0"
icm\t%2,3,%S0
icmy\t%2,3,%S0"
[(set_attr "op_type" "RS,RSY")])
(define_insn "*tstqiCCT"
@ -481,8 +482,8 @@
(match_dup 0))]
"s390_match_ccmode(insn, CCTmode)"
"@
icm\t%2,1,%0
icmy\t%2,1,%0
icm\t%2,1,%S0
icmy\t%2,1,%S0
tml\t%0,255"
[(set_attr "op_type" "RS,RSY,RI")])
@ -492,8 +493,8 @@
(match_operand:QI 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCTmode)"
"@
cli\t%0,0
cliy\t%0,0
cli\t%S0,0
cliy\t%S0,0
tml\t%0,255"
[(set_attr "op_type" "SI,SIY,RI")])
@ -505,8 +506,8 @@
(match_dup 0))]
"s390_match_ccmode(insn, CCSmode)"
"@
icm\t%2,1,%0
icmy\t%2,1,%0"
icm\t%2,1,%S0
icmy\t%2,1,%S0"
[(set_attr "op_type" "RS,RSY")])
(define_insn "*tstqi_cconly"
@ -516,8 +517,8 @@
(clobber (match_scratch:QI 2 "=d,d"))]
"s390_match_ccmode(insn, CCSmode)"
"@
icm\t%2,1,%0
icmy\t%2,1,%0"
icm\t%2,1,%S0
icmy\t%2,1,%S0"
[(set_attr "op_type" "RS,RSY")])
@ -645,8 +646,8 @@
&& (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))
&& !register_operand (operands[1], HImode)"
"@
clm\t%0,3,%1
clmy\t%0,3,%1
clm\t%0,3,%S1
clmy\t%0,3,%S1
#"
[(set_attr "op_type" "RS,RSY,SS")])
@ -658,10 +659,10 @@
&& (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))
&& !register_operand (operands[1], QImode)"
"@
clm\t%0,1,%1
clmy\t%0,1,%1
cli\t%0,%b1
cliy\t%0,%b1
clm\t%0,1,%S1
clmy\t%0,1,%S1
cli\t%S0,%b1
cliy\t%S0,%b1
#"
[(set_attr "op_type" "RS,RSY,SI,SIY,SS")])
@ -675,7 +676,7 @@
(use (match_operand 2 "const_int_operand" "n"))]
"s390_match_ccmode (insn, CCUmode)
&& INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256"
"clc\t%O0(%2,%R0),%1"
"clc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")
(set_attr "type" "cs")])
@ -800,8 +801,8 @@
(match_operand:TI 1 "general_operand" "QS,d,dKm,d,Q"))]
"TARGET_64BIT"
"@
lmg\t%0,%N0,%1
stmg\t%1,%N1,%0
lmg\t%0,%N0,%S1
stmg\t%1,%N1,%S0
#
#
#"
@ -914,8 +915,8 @@
(match_operand:DI 1 "general_operand" "Q,d,dKm,d,*f,R,T,*f,*f,Q"))]
"!TARGET_64BIT"
"@
lm\t%0,%N0,%1
stm\t%1,%N1,%0
lm\t%0,%N0,%S1
stm\t%1,%N1,%S0
#
#
ldr\t%0,%1
@ -1271,8 +1272,8 @@
icy\t%0,%1
stc\t%1,%0
stcy\t%1,%0
mvi\t%0,%b1
mviy\t%0,%b1
mvi\t%S0,%b1
mviy\t%S0,%b1
#"
[(set_attr "op_type" "RR,RI,RX,RXY,RX,RXY,SI,SIY,SS")
(set_attr "type" "lr,*,*,*,store,store,store,store,cs")])
@ -1310,8 +1311,8 @@
(clobber (reg:CC 33))]
""
"@
icm\t%0,3,%1
icmy\t%0,3,%1"
icm\t%0,3,%S1
icmy\t%0,3,%S1"
[(set_attr "op_type" "RS,RSY")])
;
@ -1366,8 +1367,8 @@
ldy\t%0,%1
std\t%1,%0
stdy\t%1,%0
lm\t%0,%N0,%1
stm\t%1,%N1,%0
lm\t%0,%N0,%S1
stm\t%1,%N1,%S0
#
#
#"
@ -1459,7 +1460,7 @@
(match_operand:BLK 1 "memory_operand" "Q"))
(use (match_operand 2 "const_int_operand" "n"))]
"INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256"
"mvc\t%O0(%2,%R0),%1"
"mvc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")
(set_attr "type" "cs")])
@ -1572,7 +1573,7 @@
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (DImode, REGNO (operands[1]) + words - 1);
return "lmg\t%1,%0,%2";
return "lmg\t%1,%0,%S2";
}
[(set_attr "op_type" "RSY")
(set_attr "type" "lm")])
@ -1585,7 +1586,7 @@
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[1]) + words - 1);
return which_alternative == 0 ? "lm\t%1,%0,%2" : "lmy\t%1,%0,%2";
return which_alternative == 0 ? "lm\t%1,%0,%S2" : "lmy\t%1,%0,%S2";
}
[(set_attr "op_type" "RS,RSY")
(set_attr "type" "lm")])
@ -1663,7 +1664,7 @@
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (DImode, REGNO (operands[2]) + words - 1);
return "stmg\t%2,%0,%1";
return "stmg\t%2,%0,%S1";
}
[(set_attr "op_type" "RSY")
(set_attr "type" "stm")])
@ -1677,7 +1678,7 @@
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[2]) + words - 1);
return which_alternative == 0 ? "stm\t%2,%0,%1" : "stmy\t%2,%0,%1";
return which_alternative == 0 ? "stm\t%2,%0,%S1" : "stmy\t%2,%0,%S1";
}
[(set_attr "op_type" "RS,RSY")
(set_attr "type" "stm")])
@ -2262,8 +2263,8 @@
(clobber (reg:CC 33))]
""
"@
icm\t%0,8,%1
icmy\t%0,8,%1"
icm\t%0,8,%S1
icmy\t%0,8,%S1"
[(set_attr "op_type" "RS,RSY")])
(define_insn "*sethighhisi"
@ -2272,8 +2273,8 @@
(clobber (reg:CC 33))]
""
"@
icm\t%0,12,%1
icmy\t%0,12,%1"
icm\t%0,12,%S1
icmy\t%0,12,%S1"
[(set_attr "op_type" "RS,RSY")])
(define_insn "*sethighqidi_64"
@ -2281,7 +2282,7 @@
(unspec:DI [(match_operand:QI 1 "s_operand" "QS")] UNSPEC_SETHIGH))
(clobber (reg:CC 33))]
"TARGET_64BIT"
"icmh\t%0,8,%1"
"icmh\t%0,8,%S1"
[(set_attr "op_type" "RSY")])
(define_insn "*sethighqidi_31"
@ -2290,8 +2291,8 @@
(clobber (reg:CC 33))]
"!TARGET_64BIT"
"@
icm\t%0,8,%1
icmy\t%0,8,%1"
icm\t%0,8,%S1
icmy\t%0,8,%S1"
[(set_attr "op_type" "RS,RSY")])
(define_insn_and_split "*extractqi"
@ -4230,8 +4231,8 @@
(plus:DI (plus:DI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"s390_match_ccmode (insn, CCLmode) && TARGET_64BIT"
"@
alcgr\\t%0,%2
alcg\\t%0,%2"
alcgr\t%0,%2
alcg\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_insn "*adddi3_alc"
@ -4242,8 +4243,8 @@
(clobber (reg:CC 33))]
"TARGET_64BIT"
"@
alcgr\\t%0,%2
alcg\\t%0,%2"
alcgr\t%0,%2
alcg\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_insn "*subdi3_slb_cc"
@ -4257,8 +4258,8 @@
(minus:DI (minus:DI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"s390_match_ccmode (insn, CCLmode) && TARGET_64BIT"
"@
slbgr\\t%0,%2
slbg\\t%0,%2"
slbgr\t%0,%2
slbg\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_insn "*subdi3_slb"
@ -4269,8 +4270,8 @@
(clobber (reg:CC 33))]
"TARGET_64BIT"
"@
slbgr\\t%0,%2
slbg\\t%0,%2"
slbgr\t%0,%2
slbg\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_expand "adddicc"
@ -4299,8 +4300,8 @@
(plus:SI (plus:SI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"s390_match_ccmode (insn, CCLmode) && TARGET_CPU_ZARCH"
"@
alcr\\t%0,%2
alc\\t%0,%2"
alcr\t%0,%2
alc\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_insn "*addsi3_alc"
@ -4311,8 +4312,8 @@
(clobber (reg:CC 33))]
"TARGET_CPU_ZARCH"
"@
alcr\\t%0,%2
alc\\t%0,%2"
alcr\t%0,%2
alc\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_insn "*subsi3_slb_cc"
@ -4326,8 +4327,8 @@
(minus:SI (minus:SI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"s390_match_ccmode (insn, CCLmode) && TARGET_CPU_ZARCH"
"@
slbr\\t%0,%2
slb\\t%0,%2"
slbr\t%0,%2
slb\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_insn "*subsi3_slb"
@ -4338,8 +4339,8 @@
(clobber (reg:CC 33))]
"TARGET_CPU_ZARCH"
"@
slbr\\t%0,%2
slb\\t%0,%2"
slbr\t%0,%2
slb\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_expand "addsicc"
@ -5374,8 +5375,8 @@
"@
nr\t%0,%2
nill\t%0,%b2
ni\t%0,%b2
niy\t%0,%b2
ni\t%S0,%b2
niy\t%S0,%b2
#"
[(set_attr "op_type" "RR,RI,SI,SIY,SS")])
@ -5387,7 +5388,7 @@
"!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@
nr\t%0,%2
ni\t%0,%b2
ni\t%S0,%b2
#"
[(set_attr "op_type" "RR,SI,SS")])
@ -5410,7 +5411,7 @@
(use (match_operand 2 "const_int_operand" "n"))
(clobber (reg:CC 33))]
"INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256"
"nc\t%O0(%2,%R0),%1"
"nc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")
(set_attr "type" "cs")])
@ -5664,8 +5665,8 @@
"@
or\t%0,%2
oill\t%0,%b2
oi\t%0,%b2
oiy\t%0,%b2
oi\t%S0,%b2
oiy\t%S0,%b2
#"
[(set_attr "op_type" "RR,RI,SI,SIY,SS")])
@ -5677,7 +5678,7 @@
"!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@
or\t%0,%2
oi\t%0,%b2
oi\t%S0,%b2
#"
[(set_attr "op_type" "RR,SI,SS")])
@ -5700,7 +5701,7 @@
(use (match_operand 2 "const_int_operand" "n"))
(clobber (reg:CC 33))]
"INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256"
"oc\t%O0(%2,%R0),%1"
"oc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")
(set_attr "type" "cs")])
@ -5920,8 +5921,8 @@
"s390_logical_operator_ok_p (operands)"
"@
xr\t%0,%2
xi\t%0,%b2
xiy\t%0,%b2
xi\t%S0,%b2
xiy\t%S0,%b2
#"
[(set_attr "op_type" "RR,SI,SIY,SS")])
@ -5944,7 +5945,7 @@
(use (match_operand 2 "const_int_operand" "n"))
(clobber (reg:CC 33))]
"INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256"
"xc\t%O0(%2,%R0),%1"
"xc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")
(set_attr "type" "cs")])
@ -6000,7 +6001,7 @@
(use (match_operand 1 "const_int_operand" "n"))
(clobber (reg:CC 33))]
"INTVAL (operands[1]) >= 1 && INTVAL (operands[1]) <= 256"
"xc\t%O0(%1,%R0),%0"
"xc\t%O0(%1,%R0),%S0"
[(set_attr "op_type" "SS")
(set_attr "type" "cs")])
@ -7423,7 +7424,7 @@
"TARGET_64BIT"
"@
ear\t%0,%%a0\;sllg\t%0,%0,32\;ear\t%0,%%a1
stam\t%%a0,%%a1,%0"
stam\t%%a0,%%a1,%S0"
[(set_attr "op_type" "NN,RS")
(set_attr "atype" "reg,*")
(set_attr "type" "o3,*")
@ -7435,7 +7436,7 @@
"!TARGET_64BIT"
"@
ear\t%0,%%a0
stam\t%%a0,%%a0,%0"
stam\t%%a0,%%a0,%S0"
[(set_attr "op_type" "RRE,RS")])
(define_insn "set_tp_64"
@ -7444,7 +7445,7 @@
"TARGET_64BIT"
"@
sar\t%%a1,%0\;srlg\t%1,%0,32\;sar\t%%a0,%1
lam\t%%a0,%%a1,%0"
lam\t%%a0,%%a1,%S0"
[(set_attr "op_type" "NN,RS")
(set_attr "atype" "reg,*")
(set_attr "type" "o3,*")
@ -7455,7 +7456,7 @@
"!TARGET_64BIT"
"@
sar\t%%a0,%0
lam\t%%a0,%%a0,%0"
lam\t%%a0,%%a0,%S0"
[(set_attr "op_type" "RRE,RS")])
(define_insn "*tls_load_64"