rs6000: Add optimizations for _mm_sad_epu8
Power9 ISA added `vabsdub` instruction which is realized in the `vec_absd` instrinsic. Use `vec_absd` for `_mm_sad_epu8` compatibility intrinsic, when `_ARCH_PWR9`. Also, the realization of `vec_sum2s` on little-endian includes two rotates in order to position the input and output to match the semantics of `vec_sum2s`: - Rotate the second input vector left 12 bytes. In the current usage, that vector is `{0}`, so this shift is unnecessary, but is currently not eliminated under optimization. - Rotate the vector produced by the `vsum2sws` instruction left 4 bytes. The two words within each doubleword of this (rotated) result must then be explicitly swapped to match the semantics of `_mm_sad_epu8`, effectively reversing this rotate. So, this rotate (and a susequent swap) are unnecessary, but not currently removed under optimization. Using `__builtin_altivec_vsum2sws` retains both rotates, so is not an option for removing the rotates. For little-endian, use the `vsum2sws` instruction directly, and eliminate the explicit rotate (swap). 2021-11-19 Paul A. Clarke <pc@us.ibm.com> gcc * config/rs6000/emmintrin.h (_mm_sad_epu8): Use vec_absd when _ARCH_PWR9, optimize vec_sum2s when LE.
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@ -2189,27 +2189,37 @@ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __arti
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_mm_sad_epu8 (__m128i __A, __m128i __B)
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{
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__v16qu a, b;
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__v16qu vmin, vmax, vabsdiff;
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__v16qu vabsdiff;
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__v4si vsum;
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const __v4su zero = { 0, 0, 0, 0 };
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__v4si result;
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a = (__v16qu) __A;
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b = (__v16qu) __B;
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vmin = vec_min (a, b);
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vmax = vec_max (a, b);
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#ifndef _ARCH_PWR9
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__v16qu vmin = vec_min (a, b);
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__v16qu vmax = vec_max (a, b);
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vabsdiff = vec_sub (vmax, vmin);
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#else
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vabsdiff = vec_absd (a, b);
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#endif
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/* Sum four groups of bytes into integers. */
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vsum = (__vector signed int) vec_sum4s (vabsdiff, zero);
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#ifdef __LITTLE_ENDIAN__
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/* Sum across four integers with two integer results. */
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asm ("vsum2sws %0,%1,%2" : "=v" (result) : "v" (vsum), "v" (zero));
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/* Note: vec_sum2s could be used here, but on little-endian, vector
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shifts are added that are not needed for this use-case.
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A vector shift to correctly position the 32-bit integer results
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(currently at [0] and [2]) to [1] and [3] would then need to be
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swapped back again since the desired results are two 64-bit
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integers ([1]|[0] and [3]|[2]). Thus, no shift is performed. */
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#else
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/* Sum across four integers with two integer results. */
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result = vec_sum2s (vsum, (__vector signed int) zero);
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/* Rotate the sums into the correct position. */
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#ifdef __LITTLE_ENDIAN__
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result = vec_sld (result, result, 4);
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#else
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result = vec_sld (result, result, 6);
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#endif
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/* Rotate the sums into the correct position. */
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return (__m128i) result;
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}
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