re PR target/79907 (ICE in extract_constrain_insn, at recog.c:2213 on ppc64le)
PR target/79907 * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Test TARGET_UPPER_REGS_DI when setting 'wi' constraint regclass. * gcc.target/powerpc/pr79907.c: New. From-SVN: r246029
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@ -1,3 +1,9 @@
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2017-03-10 Pat Haugen <pthaugen@us.ibm.com>
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PR target/79907
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* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Test
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TARGET_UPPER_REGS_DI when setting 'wi' constraint regclass.
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2017-03-10 Martin Liska <mliska@suse.cz>
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PR target/65705
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@ -3182,7 +3182,7 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
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else
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rs6000_constraints[RS6000_CONSTRAINT_ws] = FLOAT_REGS;
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if (TARGET_UPPER_REGS_DF) /* DImode */
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if (TARGET_UPPER_REGS_DI) /* DImode */
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rs6000_constraints[RS6000_CONSTRAINT_wi] = VSX_REGS;
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else
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rs6000_constraints[RS6000_CONSTRAINT_wi] = FLOAT_REGS;
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@ -1,3 +1,8 @@
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2017-03-10 Pat Haugen <pthaugen@us.ibm.com>
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PR target/79907
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* gcc.target/powerpc/pr79907.c: New.
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2017-03-10 Olivier Hainque <hainque@adacore.com>
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* gnat.dg/opt64.adb: New test.
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@ -0,0 +1,15 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-require-effective-target powerpc_p8vector_ok } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
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/* { dg-options "-mcpu=power8 -O3 -mno-upper-regs-df" } */
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int foo (short a[], int x)
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{
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unsigned int i;
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for (i = 0; i < 1000; i++)
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{
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x = a[i];
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a[i] = (x <= 0 ? 0 : x);
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}
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return x;
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}
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