rtl.def (REG): Remove middle field.
gcc/ * rtl.def (REG): Remove middle field. * rtl.h (rtx_def): Add orignal_regno to u2. (ORIGINAL_REGNO): Use it instead of field 1. (REG_ATTRS): Lower field index accordingly. * gengtype.c (adjust_field_rtx_def): Remove handling of ORIGINAL_REGNO. Move REG_ATTRS index down. * print-rtl.c (print_rtx): Move ORIGINAL_REGNO handling to the code that prints the REGNO. From-SVN: r210359
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@ -1,3 +1,14 @@
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2014-05-13 Richard Sandiford <rdsandiford@googlemail.com>
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* rtl.def (REG): Remove middle field.
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* rtl.h (rtx_def): Add orignal_regno to u2.
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(ORIGINAL_REGNO): Use it instead of field 1.
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(REG_ATTRS): Lower field index accordingly.
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* gengtype.c (adjust_field_rtx_def): Remove handling of
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ORIGINAL_REGNO. Move REG_ATTRS index down.
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* print-rtl.c (print_rtx): Move ORIGINAL_REGNO handling to the
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code that prints the REGNO.
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2014-05-13 Richard Sandiford <rdsandiford@googlemail.com>
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2014-05-13 Richard Sandiford <rdsandiford@googlemail.com>
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* print-rtl.c (print_rtx): Guard whole '0' block with ifndef
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* print-rtl.c (print_rtx): Guard whole '0' block with ifndef
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@ -1248,8 +1248,6 @@ adjust_field_rtx_def (type_p t, options_p ARG_UNUSED (opt))
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else if (i == DEBUG_EXPR && aindex == 0)
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else if (i == DEBUG_EXPR && aindex == 0)
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t = tree_tp, subname = "rt_tree";
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t = tree_tp, subname = "rt_tree";
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else if (i == REG && aindex == 1)
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else if (i == REG && aindex == 1)
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t = scalar_tp, subname = "rt_int";
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else if (i == REG && aindex == 2)
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t = reg_attrs_tp, subname = "rt_reg";
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t = reg_attrs_tp, subname = "rt_reg";
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else if (i == SCRATCH && aindex == 0)
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else if (i == SCRATCH && aindex == 0)
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t = scalar_tp, subname = "rt_int";
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t = scalar_tp, subname = "rt_int";
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@ -216,12 +216,7 @@ print_rtx (const_rtx in_rtx)
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that the field has several different valid contents. */
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that the field has several different valid contents. */
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case '0':
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case '0':
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#ifndef GENERATOR_FILE
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#ifndef GENERATOR_FILE
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if (i == 1 && REG_P (in_rtx))
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if (i == 1 && GET_CODE (in_rtx) == SYMBOL_REF)
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{
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if (REGNO (in_rtx) != ORIGINAL_REGNO (in_rtx))
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fprintf (outfile, " [%d]", ORIGINAL_REGNO (in_rtx));
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}
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else if (i == 1 && GET_CODE (in_rtx) == SYMBOL_REF)
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{
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{
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int flags = SYMBOL_REF_FLAGS (in_rtx);
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int flags = SYMBOL_REF_FLAGS (in_rtx);
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if (flags)
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if (flags)
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@ -491,6 +486,8 @@ print_rtx (const_rtx in_rtx)
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REG_OFFSET (in_rtx));
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REG_OFFSET (in_rtx));
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fputs (" ]", outfile);
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fputs (" ]", outfile);
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}
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}
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if (REG_P (in_rtx) && REGNO (in_rtx) != ORIGINAL_REGNO (in_rtx))
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fprintf (outfile, " [%d]", ORIGINAL_REGNO (in_rtx));
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#endif
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#endif
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if (is_insn && &INSN_CODE (in_rtx) == &XINT (in_rtx, i)
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if (is_insn && &INSN_CODE (in_rtx) == &XINT (in_rtx, i)
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@ -378,12 +378,10 @@ DEF_RTL_EXPR(PC, "pc", "", RTX_OBJ)
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/* A register. The "operand" is the register number, accessed with
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/* A register. The "operand" is the register number, accessed with
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the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER
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the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER
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than a hardware register is being referred to. The second operand
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than a hardware register is being referred to. The second operand
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holds the original register number - this will be different for a
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points to a reg_attrs structure.
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pseudo register that got turned into a hard register. The third
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operand points to a reg_attrs structure.
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This rtx needs to have as many (or more) fields as a MEM, since we
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This rtx needs to have as many (or more) fields as a MEM, since we
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can change REG rtx's into MEMs during reload. */
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can change REG rtx's into MEMs during reload. */
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DEF_RTL_EXPR(REG, "reg", "i00", RTX_OBJ)
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DEF_RTL_EXPR(REG, "reg", "i0", RTX_OBJ)
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/* A scratch register. This represents a register used only within a
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/* A scratch register. This represents a register used only within a
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single insn. It will be turned into a REG during register allocation
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single insn. It will be turned into a REG during register allocation
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@ -352,6 +352,9 @@ struct GTY((chain_next ("RTX_NEXT (&%h)"),
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layout for that case and use the gap for extra code-specific
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layout for that case and use the gap for extra code-specific
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information. */
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information. */
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/* The ORIGINAL_REGNO of a REG. */
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unsigned int original_regno;
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/* In a CONST_WIDE_INT (aka hwivec_def), this is the number of
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/* In a CONST_WIDE_INT (aka hwivec_def), this is the number of
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HOST_WIDE_INTs in the hwivec_def. */
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HOST_WIDE_INTs in the hwivec_def. */
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unsigned int num_elem;
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unsigned int num_elem;
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@ -1194,7 +1197,8 @@ enum label_kind
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/* ORIGINAL_REGNO holds the number the register originally had; for a
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/* ORIGINAL_REGNO holds the number the register originally had; for a
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pseudo register turned into a hard reg this will hold the old pseudo
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pseudo register turned into a hard reg this will hold the old pseudo
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register number. */
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register number. */
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#define ORIGINAL_REGNO(RTX) X0UINT (RTX, 1)
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#define ORIGINAL_REGNO(RTX) \
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(RTL_FLAG_CHECK1 ("ORIGINAL_REGNO", (RTX), REG)->u2.original_regno)
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/* Force the REGNO macro to only be used on the lhs. */
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/* Force the REGNO macro to only be used on the lhs. */
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static inline unsigned int
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static inline unsigned int
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@ -1641,7 +1645,7 @@ do { \
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/* The register attribute block. We provide access macros for each value
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/* The register attribute block. We provide access macros for each value
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in the block and provide defaults if none specified. */
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in the block and provide defaults if none specified. */
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#define REG_ATTRS(RTX) X0REGATTR (RTX, 2)
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#define REG_ATTRS(RTX) X0REGATTR (RTX, 1)
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#ifndef GENERATOR_FILE
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#ifndef GENERATOR_FILE
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/* For a MEM rtx, the alias set. If 0, this MEM is not in any alias
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/* For a MEM rtx, the alias set. If 0, this MEM is not in any alias
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