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loop.c: Fix formatting.

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* loop.c: Fix formatting.
        * loop.h: Likewise.

From-SVN: r36400
This commit is contained in:
Kazu Hirata 2000-09-14 01:20:34 +00:00 committed by Jeff Law
parent f903ebb1d5
commit fd5d5b07b7
3 changed files with 125 additions and 119 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2000-09-13 Kazu Hirata <kazu@hxi.com>
* loop.c: Fix formatting.
* loop.h: Likewise.
2000-09-13 Richard Henderson <rth@cygnus.com>
* config/ia64/ia64.md (divsf3): New.

106
gcc/loop.c
View File

@ -78,9 +78,6 @@ static int max_luid;
static int max_loop_num;
/* Bound on pseudo register number before loop optimization.
A pseudo has valid regscan info if its number is < max_reg_before_loop. */
unsigned int max_reg_before_loop;
@ -258,7 +255,8 @@ static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
void debug_loop PARAMS ((const struct loop *));
typedef struct rtx_pair {
typedef struct rtx_pair
{
rtx r1;
rtx r2;
} rtx_pair;
@ -283,7 +281,8 @@ static int indirect_jump_in_function_p PARAMS ((rtx));
static int compute_luids PARAMS ((rtx, rtx, int));
static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
struct induction *, rtx));
struct induction *,
rtx));
/* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
copy the value of the strength reduced giv to its original register. */
@ -2587,8 +2586,7 @@ find_and_verify_loops (f, loops)
cont. */
if ((INSN_LUID (label)
< INSN_LUID (loop->cont))
&& (INSN_LUID (label)
> INSN_LUID (loop->start))
&& (INSN_LUID (label) > INSN_LUID (loop->start))
/* And if there is no later destination already
recorded. */
&& (! loop->cont_dominator
@ -2812,9 +2810,9 @@ find_and_verify_loops (f, loops)
off LABEL_OUTSIDE_LOOP_P bit. */
if (JUMP_LABEL (insn))
{
for (q = 0,
r = this_loop->exit_labels;
r; q = r, r = LABEL_NEXTREF (r))
for (q = 0, r = this_loop->exit_labels;
r;
q = r, r = LABEL_NEXTREF (r))
if (XEXP (r, 0) == JUMP_LABEL (insn))
{
LABEL_OUTSIDE_LOOP_P (r) = 0;
@ -4498,7 +4496,7 @@ strength_reduce (loop, insn_count, flags)
v->maybe_dead = 1;
}
else if (v->giv_type == DEST_REG
&& REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
&& REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
{
struct induction *v1;
@ -5967,7 +5965,7 @@ basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
inc_val, mult_val, location))
return 1;
}
/* ... fall through ... */
/* Fall through. */
/* Can accept constant setting of biv only when inside inner most loop.
Otherwise, a biv of an inner loop may be incorrectly recognized
@ -5985,7 +5983,7 @@ basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
if (loop->level == 1
&& GET_MODE_CLASS (mode) != MODE_CC
&& GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
{
{
/* Possible bug here? Perhaps we don't know the mode of X. */
*inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
*mult_val = const0_rtx;
@ -6433,7 +6431,7 @@ simplify_giv_expr (loop, x, ext_val, benefit)
}
goto do_default;
case REG:
case REG:
/* If this is a new register, we can't deal with it. */
if (REGNO (x) >= max_reg_before_loop)
return 0;
@ -6514,7 +6512,11 @@ simplify_giv_expr (loop, x, ext_val, benefit)
{
int i = m->consec;
tem = m->insn;
do { tem = NEXT_INSN (tem); } while (--i > 0);
do
{
tem = NEXT_INSN (tem);
}
while (--i > 0);
tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
if (tem)
@ -6544,9 +6546,9 @@ simplify_giv_expr (loop, x, ext_val, benefit)
return tem;
}
else if (GET_CODE (tem) == CONST
&& GET_CODE (XEXP (tem, 0)) == PLUS
&& GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
&& GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
&& GET_CODE (XEXP (tem, 0)) == PLUS
&& GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
&& GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
{
tem = simplify_giv_expr (loop, XEXP (tem, 0),
ext_val, benefit);
@ -6809,7 +6811,7 @@ express_from_1 (a, b, mult)
a = ra, b = ob;
else
{
/* Indicates an extra register in B. Strip one level from B and
/* Indicates an extra register in B. Strip one level from B and
recurse, hoping B was the higher order expression. */
ob = express_from_1 (a, ob, mult);
if (ob == NULL_RTX)
@ -7123,9 +7125,9 @@ check_ext_dependant_givs (bl, loop_info)
{
if (loop_dump_stream)
{
fprintf(loop_dump_stream,
"Verified ext dependant giv at %d of reg %d\n",
INSN_UID (v->insn), bl->regno);
fprintf (loop_dump_stream,
"Verified ext dependant giv at %d of reg %d\n",
INSN_UID (v->insn), bl->regno);
}
}
else
@ -7146,9 +7148,9 @@ check_ext_dependant_givs (bl, loop_info)
why = "biv iteration info incomplete";
}
fprintf(loop_dump_stream,
"Failed ext dependant giv at %d, %s\n",
INSN_UID (v->insn), why);
fprintf (loop_dump_stream,
"Failed ext dependant giv at %d, %s\n",
INSN_UID (v->insn), why);
}
v->ignore = 1;
}
@ -8031,7 +8033,7 @@ check_dbra_loop (loop, insn_count)
rtx jump1;
if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
if (GET_CODE (jump1) == JUMP_INSN)
return 0;
return 0;
}
/* Check all of the bivs to see if the compare uses one of them.
@ -8228,7 +8230,7 @@ check_dbra_loop (loop, insn_count)
&& ! loop_info->has_volatile
&& reversible_mem_store
&& (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
+ the_movables.num + compare_and_branch == insn_count)
+ the_movables.num + compare_and_branch == insn_count)
&& (bl == ivs->loop_iv_list && bl->next == 0))
|| no_use_except_counting)
{
@ -8379,7 +8381,7 @@ check_dbra_loop (loop, insn_count)
jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
if (jump_label == pc_rtx)
jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
/* Set start_value; if this is not a CONST_INT, we need
to generate a SUB.
@ -8463,7 +8465,7 @@ check_dbra_loop (loop, insn_count)
/* Inc LABEL_NUSES so that delete_insn will
not delete the label. */
LABEL_NUSES (XEXP (jump_label, 0)) ++;
LABEL_NUSES (XEXP (jump_label, 0))++;
/* Emit an insn after the end of the loop to set the biv's
proper exit value if it is used anywhere outside the loop. */
@ -9210,7 +9212,7 @@ canonicalize_condition (insn, cond, reverse, earliest, want_reg)
in cse.c */
while (GET_RTX_CLASS (code) == '<'
&& op1 == CONST0_RTX (GET_MODE (op0))
&& op1 == CONST0_RTX (GET_MODE (op0))
&& op0 != want_reg)
{
/* Set non-zero when we find something of interest. */
@ -9553,7 +9555,7 @@ insert_loop_mem (mem, data)
else
loop_info->mems_allocated = 32;
loop_info->mems = (loop_mem_info*)
loop_info->mems = (loop_mem_info *)
xrealloc (loop_info->mems,
loop_info->mems_allocated * sizeof (loop_mem_info));
}
@ -9805,21 +9807,21 @@ load_mems (loop)
&& rtx_equal_p (SET_SRC (set), mem))
SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
/* See if this copies the mem from a register that isn't
/* See if this copies the mem from a register that isn't
modified afterwards. We'll try to remove the
redundant copy later on by doing a little register
renaming and copy propagation. This will help
to untangle things for the BIV detection code. */
if (set
&& ! maybe_never
&& GET_CODE (SET_SRC (set)) == REG
&& REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
&& REGNO (SET_SRC (set)) < last_max_reg
&& VARRAY_INT (regs->n_times_set, REGNO (SET_SRC (set))) == 1
&& rtx_equal_p (SET_DEST (set), mem))
SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
if (set
&& ! maybe_never
&& GET_CODE (SET_SRC (set)) == REG
&& REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
&& REGNO (SET_SRC (set)) < last_max_reg
&& VARRAY_INT (regs->n_times_set, REGNO (SET_SRC (set))) == 1
&& rtx_equal_p (SET_DEST (set), mem))
SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
/* Replace the memory reference with the shadow register. */
/* Replace the memory reference with the shadow register. */
replace_loop_mems (p, loop_info->mems[i].mem,
loop_info->mems[i].reg);
}
@ -10057,7 +10059,6 @@ try_copy_prop (loop, replacement, regno)
}
}
/* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
loop LOOP if the order of the sets of these registers can be
swapped. There must be exactly one insn within the loop that sets
@ -10145,7 +10146,6 @@ try_swap_copy_prop (loop, replacement, regno)
}
}
/* Replace MEM with its associated pseudo register. This function is
called from load_mems via for_each_rtx. DATA is actually a pointer
to a structure describing the instruction currently being scanned
@ -10156,7 +10156,7 @@ replace_loop_mem (mem, data)
rtx *mem;
void *data;
{
loop_replace_args *args = (loop_replace_args *)data;
loop_replace_args *args = (loop_replace_args *) data;
rtx m = *mem;
if (m == NULL_RTX)
@ -10187,12 +10187,11 @@ replace_loop_mem (mem, data)
return 0;
}
static void
replace_loop_mems (insn, mem, reg)
rtx insn;
rtx mem;
rtx reg;
rtx insn;
rtx mem;
rtx reg;
{
loop_replace_args args;
@ -10203,7 +10202,6 @@ replace_loop_mems (insn, mem, reg)
for_each_rtx (&insn, replace_loop_mem, &args);
}
/* Replace one register with another. Called through for_each_rtx; PX points
to the rtx being scanned. DATA is actually a pointer to
a structure of arguments. */
@ -10214,7 +10212,7 @@ replace_loop_reg (px, data)
void *data;
{
rtx x = *px;
loop_replace_args *args = (loop_replace_args *)data;
loop_replace_args *args = (loop_replace_args *) data;
if (x == NULL_RTX)
return 0;
@ -10225,7 +10223,6 @@ replace_loop_reg (px, data)
return 0;
}
static void
replace_loop_regs (insn, reg, replacement)
rtx insn;
@ -10241,7 +10238,6 @@ replace_loop_regs (insn, reg, replacement)
for_each_rtx (&insn, replace_loop_reg, &args);
}
/* Replace occurrences of the old exit label for the loop with the new
one. DATA is an rtx_pair containing the old and new labels,
respectively. */
@ -10283,7 +10279,8 @@ replace_label (x, data)
#define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
static void loop_dump_aux (loop, file, verbose)
static void
loop_dump_aux (loop, file, verbose)
const struct loop *loop;
FILE *file;
int verbose;
@ -10324,7 +10321,7 @@ static void loop_dump_aux (loop, file, verbose)
LOOP_INSN_UID (loop->end));
fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
LOOP_BLOCK_NUM (loop->top),
LOOP_INSN_UID (loop->top) ,
LOOP_INSN_UID (loop->top),
LOOP_BLOCK_NUM (loop->scan_start),
LOOP_INSN_UID (loop->scan_start));
fprintf (file, ";; exit_count %d", loop->exit_count);
@ -10347,7 +10344,6 @@ static void loop_dump_aux (loop, file, verbose)
}
}
/* Call this function from the debugger to dump LOOP. */
void

55
gcc/loop.h
View File

@ -25,7 +25,6 @@ Boston, MA 02111-1307, USA. */
#define LOOP_UNROLL 1
#define LOOP_BCT 2
/* Get the loop info pointer of a loop. */
#define LOOP_INFO(LOOP) ((struct loop_info *) (LOOP)->aux)
@ -52,7 +51,11 @@ Boston, MA 02111-1307, USA. */
/* An enum for the two different types of givs, those that are used
as memory addresses and those that are calculated into registers. */
enum g_types { DEST_ADDR, DEST_REG };
enum g_types
{
DEST_ADDR,
DEST_REG
};
/* A `struct induction' is created for every instruction that sets
an induction variable (either a biv or a giv). */
@ -74,7 +77,7 @@ struct induction
/* For a biv, this is the place where add_val
was found. */
enum machine_mode mode; /* The mode of this biv or giv */
enum machine_mode mem_mode; /* For DEST_ADDR, mode of the memory object. */
enum machine_mode mem_mode; /* For DEST_ADDR, mode of the memory object. */
rtx mult_val; /* Multiplicative factor for src_reg. */
rtx add_val; /* Additive constant for that product. */
int benefit; /* Gain from eliminating this insn. */
@ -102,25 +105,25 @@ struct induction
unsigned always_executed : 1; /* 1 if this set occurs each iteration. */
unsigned maybe_multiple : 1; /* Only used for a biv and 1 if this biv
update may be done multiple times per
iteration. */
iteration. */
unsigned cant_derive : 1; /* For giv's, 1 if this giv cannot derive
another giv. This occurs in many cases
where a giv's lifetime spans an update to
a biv. */
a biv. */
unsigned maybe_dead : 1; /* 1 if this giv might be dead. In that case,
we won't use it to eliminate a biv, it
would probably lose. */
would probably lose. */
unsigned auto_inc_opt : 1; /* 1 if this giv had its increment output next
to it to try to form an auto-inc address. */
to it to try to form an auto-inc address. */
unsigned unrolled : 1; /* 1 if new register has been allocated and
initialized in unrolled loop. */
unsigned shared : 1;
unsigned no_const_addval : 1; /* 1 if add_val does not contain a const. */
unsigned no_const_addval : 1; /* 1 if add_val does not contain a const. */
int lifetime; /* Length of life of this giv */
rtx derive_adjustment; /* If nonzero, is an adjustment to be
subtracted from add_val when this giv
derives another. This occurs when the
giv spans a biv update by incrementation. */
giv spans a biv update by incrementation. */
rtx ext_dependant; /* If nonzero, is a sign or zero extension
if a biv on which this giv is dependant. */
struct induction *next_iv; /* For givs, links together all givs that are
@ -135,7 +138,7 @@ struct induction
HOST_WIDE_INT const_adjust; /* Used by loop unrolling, when an address giv
is split, and a constant is eliminated from
the address, the -constant is stored here
for later use. */
for later use. */
int ix; /* Used by recombine_givs, as n index into
the stats array. */
struct induction *same_insn; /* If there are multiple identical givs in
@ -143,12 +146,13 @@ struct induction
field set, and they all point to the giv
that doesn't have this field set. */
rtx last_use; /* For a giv made from a biv increment, this is
a substitute for the lifetime information. */
a substitute for the lifetime information. */
};
/* A `struct iv_class' is created for each biv. */
struct iv_class {
struct iv_class
{
unsigned int regno; /* Pseudo reg which is the biv. */
int biv_count; /* Number of insns setting this reg. */
struct induction *biv; /* List of all insns that set this reg. */
@ -161,16 +165,15 @@ struct iv_class {
rtx initial_value; /* Value of reg at loop start */
rtx initial_test; /* Test performed on BIV before loop */
struct iv_class *next; /* Links all class structures together */
rtx init_insn; /* insn which initializes biv, 0 if none. */
rtx init_set; /* SET of INIT_INSN, if any. */
rtx init_insn; /* insn which initializes biv, 0 if none. */
rtx init_set; /* SET of INIT_INSN, if any. */
unsigned incremented : 1; /* 1 if somewhere incremented/decremented */
unsigned eliminable : 1; /* 1 if plausible candidate for elimination. */
unsigned nonneg : 1; /* 1 if we added a REG_NONNEG note for this. */
unsigned eliminable : 1; /* 1 if plausible candidate for elimination. */
unsigned nonneg : 1; /* 1 if we added a REG_NONNEG note for this. */
unsigned reversed : 1; /* 1 if we reversed the loop that this
biv controls. */
biv controls. */
};
typedef struct loop_mem_info
{
rtx mem; /* The MEM itself. */
@ -178,7 +181,6 @@ typedef struct loop_mem_info
int optimize; /* Nonzero if we can optimize access to this MEM. */
} loop_mem_info;
struct loop_ivs
{
/* Indexed by register number, indicates whether or not register is
@ -207,7 +209,6 @@ struct loop_ivs
unsigned int last_increment_giv;
};
struct loop_regs
{
int num;
@ -245,7 +246,6 @@ struct loop_regs
int multiple_uses;
};
/* Information pertaining to a loop. */
struct loop_info
@ -321,8 +321,13 @@ struct loop_info
};
/* Definitions used by the basic induction variable discovery code. */
enum iv_mode { UNKNOWN_INDUCT, BASIC_INDUCT, NOT_BASIC_INDUCT,
GENERAL_INDUCT };
enum iv_mode
{
UNKNOWN_INDUCT,
BASIC_INDUCT,
NOT_BASIC_INDUCT,
GENERAL_INDUCT
};
/* Variables declared in loop.c, but also needed in unroll.c. */
@ -349,8 +354,8 @@ void unroll_loop PARAMS ((struct loop *, int, rtx, int));
rtx biv_total_increment PARAMS ((struct iv_class *));
unsigned HOST_WIDE_INT loop_iterations PARAMS ((struct loop *));
int precondition_loop_p PARAMS ((const struct loop *,
rtx *, rtx *, rtx *,
enum machine_mode *mode));
rtx *, rtx *, rtx *,
enum machine_mode *mode));
rtx final_biv_value PARAMS ((const struct loop *, struct iv_class *));
rtx final_giv_value PARAMS ((const struct loop *, struct induction *));
void emit_unrolled_add PARAMS ((rtx, rtx, rtx));