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re PR target/57098 (ICE: in extract_insn, at recog.c:2154 (unrecognizable insn) with -mcmodel=large -msse4 and __builtin_shuffle())

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PR target/57098
	* config/i386/i386.c (ix86_expand_vec_perm): Validize constant memory.

testsuite/ChangeLog:

	PR target/57098
	* gcc.target/i386/pr57098.c: New test.

From-SVN: r198430
This commit is contained in:
Uros Bizjak 2013-04-29 20:20:58 +02:00
parent 69acfe77c1
commit fdca7d03ed
4 changed files with 28 additions and 9 deletions
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13
gcc/ChangeLog
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@ -1,3 +1,8 @@
2013-04-29 Uros Bizjak <ubizjak@gmail.com>
PR target/57098
* config/i386/i386.c (ix86_expand_vec_perm): Validize constant memory.
2013-04-29 Ian Bolton <ian.bolton@arm.com>
* config/aarch64/aarch64.md (movsi_aarch64): Support LDR/STR
@ -32,8 +37,7 @@
* lto-streamer-in.c (input_cfg): Ditto.
* lto-cgraph.c (merge_profile_summaries): Ditto.
* tree-optimize.c (execute_fixup_cfg): Ditto.
* tree-inline.c (copy_bb): Update comment to use
apply_scale.
* tree-inline.c (copy_bb): Update comment to use apply_scale.
(copy_edges_for_bb): Ditto.
(copy_cfg_body): Ditto.
@ -63,9 +67,8 @@
2013-04-29 Richard Biener <rguenther@suse.de>
PR middle-end/57089
* omp-low.c (expand_omp_taskreg): If the parent function had
a broken loop tree make sure to schedule a fixup for the child
as well.
* omp-low.c (expand_omp_taskreg): If the parent function had a broken
loop tree make sure to schedule a fixup for the child as well.
(expand_omp_for_generic): Properly add loops.
(expand_omp_for_static_nochunk): Likewise.
(expand_omp_for_static_chunk): Likewise.

6
gcc/config/i386/i386.c
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@ -20559,7 +20559,7 @@ ix86_expand_vec_perm (rtx operands[])
vec[i * 2 + 1] = const1_rtx;
}
vt = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (w, vec));
vt = force_const_mem (maskmode, vt);
vt = validize_mem (force_const_mem (maskmode, vt));
t1 = expand_simple_binop (maskmode, PLUS, t1, vt, t1, 1,
OPTAB_DIRECT);
@ -20756,7 +20756,7 @@ ix86_expand_vec_perm (rtx operands[])
for (i = 0; i < 16; ++i)
vec[i] = GEN_INT (i/e * e);
vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec));
vt = force_const_mem (V16QImode, vt);
vt = validize_mem (force_const_mem (V16QImode, vt));
if (TARGET_XOP)
emit_insn (gen_xop_pperm (mask, mask, mask, vt));
else
@ -20767,7 +20767,7 @@ ix86_expand_vec_perm (rtx operands[])
for (i = 0; i < 16; ++i)
vec[i] = GEN_INT (i % e);
vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec));
vt = force_const_mem (V16QImode, vt);
vt = validize_mem (force_const_mem (V16QImode, vt));
emit_insn (gen_addv16qi3 (mask, mask, vt));
}

7
gcc/testsuite/ChangeLog
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@ -1,6 +1,11 @@
2013-04-29 Uros Bizjak <ubizjak@gmail.com>
PR target/57098
* gcc.target/i386/pr57098.c: New test.
2013-04-29 Kai Tietz <ktietz@redhat.com>
* gcc.c-torture/execute/pr55875.c
* gcc.c-torture/execute/pr55875.c: New test.
2013-04-29 Richard Biener <rguenther@suse.de>

11
gcc/testsuite/gcc.target/i386/pr57098.c Normal file
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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-msse4 -mcmodel=large" } */
typedef int V __attribute__((vector_size(16)));
void
foo (V *p, V *mask)
{
*p = __builtin_shuffle (*p, *mask);
}