arm.c (arm_legitimate_index_p): Limit iWMMXt addressing modes to LDRD for DImode.
2007-03-01 Paul Brook <paul@codesourcery.com> * config/arm/arm.c (arm_legitimate_index_p): Limit iWMMXt addressing modes to LDRD for DImode. (output_move_double): Fixup out of range ldrd/strd. (vfp_secondary_reload_class): Rename... (coproc_secondary_reload_class): ... to this. Add wb argument. * config/arm/arm.h (SECONDARY_OUTPUT_RELOAD_CLASS): Use coproc_secondary_reload_class for CLASS_IWMMXT. (SECONDARY_INPUT_RELOAD_CLASS): Ditto. * arm-protos.h (coproc_secondary_reload_class): Update prototype. From-SVN: r122437
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Paul Brook
Paul Brook
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@ -1,3 +1,15 @@
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2007-03-01 Paul Brook <paul@codesourcery.com>
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* config/arm/arm.c (arm_legitimate_index_p): Limit iWMMXt addressing
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modes to LDRD for DImode.
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(output_move_double): Fixup out of range ldrd/strd.
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(vfp_secondary_reload_class): Rename...
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(coproc_secondary_reload_class): ... to this. Add wb argument.
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* config/arm/arm.h (SECONDARY_OUTPUT_RELOAD_CLASS): Use
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coproc_secondary_reload_class for CLASS_IWMMXT.
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(SECONDARY_INPUT_RELOAD_CLASS): Ditto.
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* arm-protos.h (coproc_secondary_reload_class): Update prototype.
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2007-03-01 Zdenek Dvorak <dvorakz@suse.cz>
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* tree-ssa-loop-prefetch.c (determine_unroll_factor): Bound the unroll
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@ -68,7 +68,8 @@ extern rtx thumb_legitimize_reload_address (rtx *, enum machine_mode, int, int,
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int);
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extern int arm_const_double_rtx (rtx);
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extern int neg_const_double_rtx_ok_for_fpa (rtx);
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extern enum reg_class vfp_secondary_reload_class (enum machine_mode, rtx);
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extern enum reg_class coproc_secondary_reload_class (enum machine_mode, rtx,
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bool);
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extern bool arm_tls_referenced_p (rtx);
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extern int cirrus_memory_offset (rtx);
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@ -3922,10 +3922,15 @@ thumb2_legitimate_index_p (enum machine_mode mode, rtx index, int strict_p)
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&& (INTVAL (index) & 3) == 0);
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if (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (mode))
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return (code == CONST_INT
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&& INTVAL (index) < 1024
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&& INTVAL (index) > -1024
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&& (INTVAL (index) & 3) == 0);
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{
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/* For DImode assume values will usually live in core regs
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and only allow LDRD addressing modes. */
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if (!TARGET_LDRD || mode != DImode)
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return (code == CONST_INT
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&& INTVAL (index) < 1024
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&& INTVAL (index) > -1024
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&& (INTVAL (index) & 3) == 0);
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}
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if (arm_address_register_rtx_p (index, strict_p)
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&& (GET_MODE_SIZE (mode) <= 4))
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@ -5764,12 +5769,12 @@ arm_eliminable_register (rtx x)
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}
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/* Return GENERAL_REGS if a scratch register required to reload x to/from
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VFP registers. Otherwise return NO_REGS. */
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coprocessor registers. Otherwise return NO_REGS. */
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enum reg_class
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vfp_secondary_reload_class (enum machine_mode mode, rtx x)
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coproc_secondary_reload_class (enum machine_mode mode, rtx x, bool wb)
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{
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if (arm_coproc_mem_operand (x, FALSE) || s_register_operand (x, mode))
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if (arm_coproc_mem_operand (x, wb) || s_register_operand (x, mode))
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return NO_REGS;
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return GENERAL_REGS;
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@ -9146,12 +9151,37 @@ output_move_double (rtx *operands)
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output_asm_insn ("ldr%(d%)\t%0, [%1] @split", otherops);
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}
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else
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output_asm_insn ("ldr%(d%)\t%0, [%1, %2]!", otherops);
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{
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/* IWMMXT allows offsets larger than ldrd can handle,
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fix these up with a pair of ldr. */
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if (GET_CODE (otherops[2]) == CONST_INT
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&& (INTVAL(otherops[2]) <= -256
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|| INTVAL(otherops[2]) >= 256))
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{
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output_asm_insn ("ldr%?\t%0, [%1, %2]!", otherops);
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otherops[0] = gen_rtx_REG (SImode, 1 + reg0);
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output_asm_insn ("ldr%?\t%0, [%1, #4]", otherops);
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}
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else
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output_asm_insn ("ldr%(d%)\t%0, [%1, %2]!", otherops);
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}
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}
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else
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{
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/* We only allow constant increments, so this is safe. */
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output_asm_insn ("ldr%(d%)\t%0, [%1], %2", otherops);
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/* IWMMXT allows offsets larger than ldrd can handle,
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fix these up with a pair of ldr. */
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if (GET_CODE (otherops[2]) == CONST_INT
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&& (INTVAL(otherops[2]) <= -256
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|| INTVAL(otherops[2]) >= 256))
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{
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otherops[0] = gen_rtx_REG (SImode, 1 + reg0);
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output_asm_insn ("ldr%?\t%0, [%1, #4]", otherops);
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otherops[0] = operands[0];
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output_asm_insn ("ldr%?\t%0, [%1], %2", otherops);
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}
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else
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/* We only allow constant increments, so this is safe. */
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output_asm_insn ("ldr%(d%)\t%0, [%1], %2", otherops);
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}
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break;
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@ -9289,7 +9319,29 @@ output_move_double (rtx *operands)
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otherops[1] = XEXP (XEXP (XEXP (operands[0], 0), 1), 0);
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otherops[2] = XEXP (XEXP (XEXP (operands[0], 0), 1), 1);
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if (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY)
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/* IWMMXT allows offsets larger than ldrd can handle,
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fix these up with a pair of ldr. */
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if (GET_CODE (otherops[2]) == CONST_INT
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&& (INTVAL(otherops[2]) <= -256
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|| INTVAL(otherops[2]) >= 256))
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{
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rtx reg1;
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reg1 = gen_rtx_REG (SImode, 1 + REGNO (operands[1]));
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if (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY)
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{
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output_asm_insn ("ldr%?\t%0, [%1, %2]!", otherops);
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otherops[0] = reg1;
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output_asm_insn ("ldr%?\t%0, [%1, #4]", otherops);
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}
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else
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{
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otherops[0] = reg1;
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output_asm_insn ("ldr%?\t%0, [%1, #4]", otherops);
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otherops[0] = operands[1];
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output_asm_insn ("ldr%?\t%0, [%1], %2", otherops);
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}
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}
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else if (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY)
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output_asm_insn ("str%(d%)\t%0, [%1, %2]!", otherops);
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else
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output_asm_insn ("str%(d%)\t%0, [%1], %2", otherops);
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@ -1121,10 +1121,12 @@ enum reg_class
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or out of a register in CLASS in MODE. If it can be done directly,
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NO_REGS is returned. */
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#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
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/* Restrict which direct reloads are allowed for VFP regs. */ \
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/* Restrict which direct reloads are allowed for VFP/iWMMXt regs. */ \
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((TARGET_VFP && TARGET_HARD_FLOAT \
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&& (CLASS) == VFP_REGS) \
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? vfp_secondary_reload_class (MODE, X) \
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? coproc_secondary_reload_class (MODE, X, FALSE) \
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: (TARGET_IWMMXT && (CLASS) == IWMMXT_REGS) \
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? coproc_secondary_reload_class (MODE, X, TRUE) \
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: TARGET_32BIT \
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? (((MODE) == HImode && ! arm_arch4 && true_regnum (X) == -1) \
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? GENERAL_REGS : NO_REGS) \
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@ -1132,10 +1134,12 @@ enum reg_class
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/* If we need to load shorts byte-at-a-time, then we need a scratch. */
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#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
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/* Restrict which direct reloads are allowed for VFP regs. */ \
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/* Restrict which direct reloads are allowed for VFP/iWMMXt regs. */ \
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((TARGET_VFP && TARGET_HARD_FLOAT \
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&& (CLASS) == VFP_REGS) \
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? vfp_secondary_reload_class (MODE, X) : \
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? coproc_secondary_reload_class (MODE, X, FALSE) : \
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(TARGET_IWMMXT && (CLASS) == IWMMXT_REGS) ? \
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coproc_secondary_reload_class (MODE, X, TRUE) : \
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/* Cannot load constants into Cirrus registers. */ \
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(TARGET_MAVERICK && TARGET_HARD_FLOAT \
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&& (CLASS) == CIRRUS_REGS \
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