(truncdfsf2): Rewrite to allow FLOAT_REGS in constraints for better register preferences.
(truncdfsf2): Rewrite to allow FLOAT_REGS in constraints for better register preferences. (movM): If REG_WAS_0, make sure the reg hasn't changed since then. (cmpM expanders): Don't allow both operands to be MEM. Use VOIDmode for the COMPARE rtx instead of CCmode. (cmpM recognizers): Likewise. Remove constraints for constants from operand 0. (cmpdf,cmpsf recognizers): When using VOIDmode as mode of the COMPARE rtx, require that the mode be exactly VOIDmode. From-SVN: r3716
This commit is contained in:
parent
b9342cdfeb
commit
fe4435d988
@ -69,7 +69,7 @@
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;; actually generating RTL. The bCOND or sCOND (emitted immediately
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;; actually generating RTL. The bCOND or sCOND (emitted immediately
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;; after the tstM or cmp) will actually emit the tstM or cmpM.
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;; after the tstM or cmp) will actually emit the tstM or cmpM.
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(define_insn "tstsi_cc"
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(define_insn "tstsi_1"
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[(set (cc0)
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[(set (cc0)
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(match_operand:SI 0 "nonimmediate_operand" "rm"))]
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(match_operand:SI 0 "nonimmediate_operand" "rm"))]
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""
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""
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@ -88,12 +88,12 @@
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""
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""
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"
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"
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{
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{
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i386_compare_gen = gen_tstsi_cc;
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i386_compare_gen = gen_tstsi_1;
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i386_compare_op0 = operands[0];
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i386_compare_op0 = operands[0];
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DONE;
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DONE;
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}")
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}")
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(define_insn "tsthi_cc"
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(define_insn "tsthi_1"
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[(set (cc0)
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[(set (cc0)
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(match_operand:HI 0 "nonimmediate_operand" "rm"))]
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(match_operand:HI 0 "nonimmediate_operand" "rm"))]
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""
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""
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@ -112,12 +112,12 @@
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""
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""
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"
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"
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{
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{
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i386_compare_gen = gen_tsthi_cc;
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i386_compare_gen = gen_tsthi_1;
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i386_compare_op0 = operands[0];
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i386_compare_op0 = operands[0];
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DONE;
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DONE;
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}")
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}")
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(define_insn "tstqi_cc"
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(define_insn "tstqi_1"
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[(set (cc0)
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[(set (cc0)
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(match_operand:QI 0 "nonimmediate_operand" "qm"))]
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(match_operand:QI 0 "nonimmediate_operand" "qm"))]
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""
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""
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@ -136,7 +136,7 @@
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""
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""
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"
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"
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{
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{
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i386_compare_gen = gen_tstqi_cc;
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i386_compare_gen = gen_tstqi_1;
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i386_compare_op0 = operands[0];
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i386_compare_op0 = operands[0];
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DONE;
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DONE;
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}")
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}")
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@ -210,11 +210,11 @@
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;;- compare instructions. See comments above tstM patterns about
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;;- compare instructions. See comments above tstM patterns about
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;; expansion of these insns.
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;; expansion of these insns.
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(define_insn "cmpsi_cc"
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(define_insn "cmpsi_1"
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[(set (cc0)
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[(set (cc0)
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(compare:CC (match_operand:SI 0 "nonimmediate_operand" "mr,ri")
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(compare (match_operand:SI 0 "nonimmediate_operand" "mr,r")
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(match_operand:SI 1 "general_operand" "ri,mr")))]
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(match_operand:SI 1 "general_operand" "ri,mr")))]
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""
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"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
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"*
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"*
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{
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{
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if (CONSTANT_P (operands[0]) || GET_CODE (operands[1]) == MEM)
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if (CONSTANT_P (operands[0]) || GET_CODE (operands[1]) == MEM)
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@ -227,22 +227,25 @@
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(define_expand "cmpsi"
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(define_expand "cmpsi"
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[(set (cc0)
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[(set (cc0)
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(compare:CC (match_operand:SI 0 "nonimmediate_operand" "")
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(compare (match_operand:SI 0 "nonimmediate_operand" "")
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(match_operand:SI 1 "general_operand" "")))]
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(match_operand:SI 1 "general_operand" "")))]
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""
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""
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"
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"
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{
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{
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i386_compare_gen = gen_cmpsi_cc;
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if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
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operands[0] = force_reg (SImode, operands[0]);
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i386_compare_gen = gen_cmpsi_1;
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i386_compare_op0 = operands[0];
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i386_compare_op0 = operands[0];
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i386_compare_op1 = operands[1];
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i386_compare_op1 = operands[1];
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DONE;
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DONE;
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}")
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}")
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(define_insn "cmphi_cc"
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(define_insn "cmphi_1"
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[(set (cc0)
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[(set (cc0)
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(compare:CC (match_operand:HI 0 "nonimmediate_operand" "mr,ri")
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(compare (match_operand:HI 0 "nonimmediate_operand" "mr,r")
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(match_operand:HI 1 "general_operand" "ri,mr")))]
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(match_operand:HI 1 "general_operand" "ri,mr")))]
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""
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"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
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"*
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"*
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{
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{
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if (CONSTANT_P (operands[0]) || GET_CODE (operands[1]) == MEM)
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if (CONSTANT_P (operands[0]) || GET_CODE (operands[1]) == MEM)
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@ -255,22 +258,25 @@
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(define_expand "cmphi"
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(define_expand "cmphi"
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[(set (cc0)
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[(set (cc0)
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(compare:CC (match_operand:HI 0 "nonimmediate_operand" "")
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(compare (match_operand:HI 0 "nonimmediate_operand" "")
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(match_operand:HI 1 "general_operand" "")))]
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(match_operand:HI 1 "general_operand" "")))]
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""
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""
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"
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"
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{
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{
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i386_compare_gen = gen_cmphi_cc;
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if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
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operands[0] = force_reg (HImode, operands[0]);
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i386_compare_gen = gen_cmphi_1;
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i386_compare_op0 = operands[0];
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i386_compare_op0 = operands[0];
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i386_compare_op1 = operands[1];
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i386_compare_op1 = operands[1];
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DONE;
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DONE;
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}")
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}")
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(define_insn "cmpqi_cc"
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(define_insn "cmpqi_1"
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[(set (cc0)
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[(set (cc0)
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(compare:CC (match_operand:QI 0 "nonimmediate_operand" "qn,mq")
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(compare (match_operand:QI 0 "nonimmediate_operand" "q,mq")
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(match_operand:QI 1 "general_operand" "qm,nq")))]
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(match_operand:QI 1 "general_operand" "qm,nq")))]
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""
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"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
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"*
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"*
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{
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{
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if (CONSTANT_P (operands[0]) || GET_CODE (operands[1]) == MEM)
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if (CONSTANT_P (operands[0]) || GET_CODE (operands[1]) == MEM)
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@ -283,12 +289,15 @@
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(define_expand "cmpqi"
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(define_expand "cmpqi"
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[(set (cc0)
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[(set (cc0)
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(compare:CC (match_operand:QI 0 "nonimmediate_operand" "")
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(compare (match_operand:QI 0 "nonimmediate_operand" "")
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(match_operand:QI 1 "general_operand" "")))]
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(match_operand:QI 1 "general_operand" "")))]
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""
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""
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"
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"
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{
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{
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i386_compare_gen = gen_cmpqi_cc;
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if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
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operands[0] = force_reg (QImode, operands[0]);
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i386_compare_gen = gen_cmpqi_1;
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i386_compare_op0 = operands[0];
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i386_compare_op0 = operands[0];
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i386_compare_op1 = operands[1];
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i386_compare_op1 = operands[1];
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DONE;
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DONE;
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@ -298,48 +307,53 @@
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;; SFmode, there is the normal insn, and an insn where the second operand
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;; SFmode, there is the normal insn, and an insn where the second operand
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;; is converted to the desired mode.
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;; is converted to the desired mode.
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(define_insn "cmpdf_cc"
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(define_insn ""
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[(set (cc0)
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[(set (cc0)
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(compare:CC (match_operand:DF 0 "nonimmediate_operand" "f,fm")
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(match_operator 2 "VOIDmode_compare_op"
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(match_operand:DF 1 "nonimmediate_operand" "fm,f")))
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[(match_operand:DF 0 "nonimmediate_operand" "f,fm")
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(clobber (match_scratch:HI 2 "=a,a"))]
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(match_operand:DF 1 "nonimmediate_operand" "fm,f")]))
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(clobber (match_scratch:HI 3 "=a,a"))]
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"TARGET_80387
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"TARGET_80387
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&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
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&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
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"* return (char *) output_float_compare (insn, operands);")
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"* return (char *) output_float_compare (insn, operands);")
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(define_insn ""
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(define_insn ""
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[(set (cc0)
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[(set (cc0)
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(compare:CC (match_operand:DF 0 "register_operand" "f")
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(match_operator 2 "VOIDmode_compare_op"
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(float:DF
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[(match_operand:DF 0 "register_operand" "f")
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(match_operand:SI 1 "nonimmediate_operand" "rm"))))
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(float:DF
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(clobber (match_scratch:HI 2 "=a"))]
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(match_operand:SI 1 "nonimmediate_operand" "rm"))]))
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(clobber (match_scratch:HI 3 "=a"))]
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"TARGET_80387"
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"TARGET_80387"
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"* return (char *) output_float_compare (insn, operands);")
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"* return (char *) output_float_compare (insn, operands);")
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(define_insn ""
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(define_insn ""
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[(set (cc0)
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[(set (cc0)
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(compare:CC (float:DF
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(match_operator 2 "VOIDmode_compare_op"
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(match_operand:SI 0 "nonimmediate_operand" "rm"))
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[(float:DF
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(match_operand:DF 1 "register_operand" "f")))
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(match_operand:SI 0 "nonimmediate_operand" "rm"))
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(clobber (match_scratch:HI 2 "=a"))]
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(match_operand:DF 1 "register_operand" "f")]))
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(clobber (match_scratch:HI 3 "=a"))]
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"TARGET_80387"
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"TARGET_80387"
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"* return (char *) output_float_compare (insn, operands);")
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"* return (char *) output_float_compare (insn, operands);")
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(define_insn ""
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(define_insn ""
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[(set (cc0)
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[(set (cc0)
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(compare:CC (match_operand:DF 0 "register_operand" "f")
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(match_operator 2 "VOIDmode_compare_op"
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(float_extend:DF
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[(match_operand:DF 0 "register_operand" "f")
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(match_operand:SF 1 "nonimmediate_operand" "fm"))))
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(float_extend:DF
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(clobber (match_scratch:HI 2 "=a"))]
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(match_operand:SF 1 "nonimmediate_operand" "fm"))]))
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(clobber (match_scratch:HI 3 "=a"))]
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"TARGET_80387"
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"TARGET_80387"
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"* return (char *) output_float_compare (insn, operands);")
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"* return (char *) output_float_compare (insn, operands);")
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(define_insn ""
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(define_insn ""
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[(set (cc0)
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[(set (cc0)
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(compare:CC (float_extend:DF
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(match_operator 2 "VOIDmode_compare_op"
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(match_operand:SF 0 "nonimmediate_operand" "fm"))
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[(float_extend:DF
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(match_operand:DF 1 "register_operand" "f")))
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(match_operand:SF 0 "nonimmediate_operand" "fm"))
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(clobber (match_scratch:HI 2 "=a"))]
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(match_operand:DF 1 "register_operand" "f")]))
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(clobber (match_scratch:HI 3 "=a"))]
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"TARGET_80387"
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"TARGET_80387"
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"* return (char *) output_float_compare (insn, operands);")
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"* return (char *) output_float_compare (insn, operands);")
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@ -351,48 +365,53 @@
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"TARGET_80387"
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"TARGET_80387"
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"* return (char *) output_float_compare (insn, operands);")
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"* return (char *) output_float_compare (insn, operands);")
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(define_insn ""
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;; These two insns will never be generated by combine due to the mode of
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[(set (cc0)
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;; the COMPARE.
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(compare:CCFPEQ (match_operand:DF 0 "register_operand" "f")
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;(define_insn ""
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(float_extend:DF
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; [(set (cc0)
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(match_operand:SF 1 "register_operand" "f"))))
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; (compare:CCFPEQ (match_operand:DF 0 "register_operand" "f")
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(clobber (match_scratch:HI 2 "=a"))]
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; (float_extend:DF
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"TARGET_80387"
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; (match_operand:SF 1 "register_operand" "f"))))
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"* return (char *) output_float_compare (insn, operands);")
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; (clobber (match_scratch:HI 2 "=a"))]
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; "TARGET_80387"
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; "* return (char *) output_float_compare (insn, operands);")
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;
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;(define_insn ""
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; [(set (cc0)
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; (compare:CCFPEQ (float_extend:DF
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; (match_operand:SF 0 "register_operand" "f"))
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; (match_operand:DF 1 "register_operand" "f")))
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; (clobber (match_scratch:HI 2 "=a"))]
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; "TARGET_80387"
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; "* return (char *) output_float_compare (insn, operands);")
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(define_insn ""
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(define_insn "cmpsf_cc_1"
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[(set (cc0)
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[(set (cc0)
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(compare:CCFPEQ (float_extend:DF
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(match_operator 2 "VOIDmode_compare_op"
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(match_operand:SF 0 "register_operand" "f"))
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[(match_operand:SF 0 "nonimmediate_operand" "f,fm")
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(match_operand:DF 1 "register_operand" "f")))
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(match_operand:SF 1 "nonimmediate_operand" "fm,f")]))
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(clobber (match_scratch:HI 2 "=a"))]
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(clobber (match_scratch:HI 3 "=a,a"))]
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"TARGET_80387"
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"* return (char *) output_float_compare (insn, operands);")
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(define_insn "cmpsf_cc"
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[(set (cc0)
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(compare:CC (match_operand:SF 0 "nonimmediate_operand" "f,fm")
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(match_operand:SF 1 "nonimmediate_operand" "fm,f")))
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(clobber (match_scratch:HI 2 "=a,a"))]
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"TARGET_80387
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"TARGET_80387
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&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
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&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
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"* return (char *) output_float_compare (insn, operands);")
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"* return (char *) output_float_compare (insn, operands);")
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(define_insn ""
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(define_insn ""
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[(set (cc0)
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[(set (cc0)
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(compare:CC (match_operand:SF 0 "register_operand" "f")
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(match_operator 2 "VOIDmode_compare_op"
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(float:SF
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[(match_operand:SF 0 "register_operand" "f")
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(match_operand:SI 1 "nonimmediate_operand" "rm"))))
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(float:SF
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(clobber (match_scratch:HI 2 "=a"))]
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(match_operand:SI 1 "nonimmediate_operand" "rm"))]))
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(clobber (match_scratch:HI 3 "=a"))]
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"TARGET_80387"
|
"TARGET_80387"
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"* return (char *) output_float_compare (insn, operands);")
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"* return (char *) output_float_compare (insn, operands);")
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|
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(define_insn ""
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(define_insn ""
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[(set (cc0)
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[(set (cc0)
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(compare:CC (float:SF
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(match_operator 2 "VOIDmode_compare_op"
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(match_operand:SI 0 "nonimmediate_operand" "rm"))
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[(float:SF
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(match_operand:SF 1 "register_operand" "f")))
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(match_operand:SI 0 "nonimmediate_operand" "rm"))
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(clobber (match_scratch:HI 2 "=a"))]
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(match_operand:SF 1 "register_operand" "f")]))
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|
(clobber (match_scratch:HI 3 "=a"))]
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"TARGET_80387"
|
"TARGET_80387"
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"* return (char *) output_float_compare (insn, operands);")
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"* return (char *) output_float_compare (insn, operands);")
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@ -406,8 +425,8 @@
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|
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(define_expand "cmpdf"
|
(define_expand "cmpdf"
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[(set (cc0)
|
[(set (cc0)
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(compare:CC (match_operand:DF 0 "register_operand" "")
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(compare (match_operand:DF 0 "register_operand" "")
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||||||
(match_operand:DF 1 "nonimmediate_operand" "")))]
|
(match_operand:DF 1 "nonimmediate_operand" "")))]
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"TARGET_80387"
|
"TARGET_80387"
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"
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"
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{
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{
|
||||||
@ -420,8 +439,8 @@
|
|||||||
|
|
||||||
(define_expand "cmpsf"
|
(define_expand "cmpsf"
|
||||||
[(set (cc0)
|
[(set (cc0)
|
||||||
(compare:CC (match_operand:SF 0 "register_operand" "")
|
(compare (match_operand:SF 0 "register_operand" "")
|
||||||
(match_operand:SF 1 "nonimmediate_operand" "")))]
|
(match_operand:SF 1 "nonimmediate_operand" "")))]
|
||||||
"TARGET_80387"
|
"TARGET_80387"
|
||||||
"
|
"
|
||||||
{
|
{
|
||||||
@ -432,6 +451,14 @@
|
|||||||
DONE;
|
DONE;
|
||||||
}")
|
}")
|
||||||
|
|
||||||
|
(define_expand "cmpdf_cc"
|
||||||
|
[(parallel [(set (cc0)
|
||||||
|
(compare (match_operand:DF 0 "register_operand" "")
|
||||||
|
(match_operand:DF 1 "register_operand" "")))
|
||||||
|
(clobber (match_scratch:HI 2 ""))])]
|
||||||
|
"TARGET_80387"
|
||||||
|
"")
|
||||||
|
|
||||||
(define_expand "cmpdf_ccfpeq"
|
(define_expand "cmpdf_ccfpeq"
|
||||||
[(parallel [(set (cc0)
|
[(parallel [(set (cc0)
|
||||||
(compare:CCFPEQ (match_operand:DF 0 "register_operand" "")
|
(compare:CCFPEQ (match_operand:DF 0 "register_operand" "")
|
||||||
@ -444,6 +471,14 @@
|
|||||||
operands[1] = copy_to_mode_reg (DFmode, operands[1]);
|
operands[1] = copy_to_mode_reg (DFmode, operands[1]);
|
||||||
}")
|
}")
|
||||||
|
|
||||||
|
(define_expand "cmpsf_cc"
|
||||||
|
[(parallel [(set (cc0)
|
||||||
|
(compare (match_operand:SF 0 "register_operand" "")
|
||||||
|
(match_operand:SF 1 "register_operand" "")))
|
||||||
|
(clobber (match_scratch:HI 2 ""))])]
|
||||||
|
"TARGET_80387"
|
||||||
|
"")
|
||||||
|
|
||||||
(define_expand "cmpsf_ccfpeq"
|
(define_expand "cmpsf_ccfpeq"
|
||||||
[(parallel [(set (cc0)
|
[(parallel [(set (cc0)
|
||||||
(compare:CCFPEQ (match_operand:SF 0 "register_operand" "")
|
(compare:CCFPEQ (match_operand:SF 0 "register_operand" "")
|
||||||
@ -623,10 +658,12 @@
|
|||||||
if (operands[1] == const1_rtx
|
if (operands[1] == const1_rtx
|
||||||
&& (link = find_reg_note (insn, REG_WAS_0, 0))
|
&& (link = find_reg_note (insn, REG_WAS_0, 0))
|
||||||
/* Make sure the insn that stored the 0 is still present. */
|
/* Make sure the insn that stored the 0 is still present. */
|
||||||
&& ! XEXP (link, 0)->volatil
|
&& ! INSN_DELETED_P (XEXP (link, 0))
|
||||||
&& GET_CODE (XEXP (link, 0)) != NOTE
|
&& GET_CODE (XEXP (link, 0)) != NOTE
|
||||||
/* Make sure cross jumping didn't happen here. */
|
/* Make sure cross jumping didn't happen here. */
|
||||||
&& no_labels_between_p (XEXP (link, 0), insn))
|
&& no_labels_between_p (XEXP (link, 0), insn)
|
||||||
|
/* Make sure the reg hasn't been clobbered. */
|
||||||
|
&& ! reg_set_between_p (operands[0], XEXP (link, 0), insn))
|
||||||
/* Fastest way to change a 0 to a 1. */
|
/* Fastest way to change a 0 to a 1. */
|
||||||
return AS1 (inc%L0,%0);
|
return AS1 (inc%L0,%0);
|
||||||
|
|
||||||
@ -654,10 +691,12 @@
|
|||||||
if (REG_P (operands[0]) && operands[1] == const1_rtx
|
if (REG_P (operands[0]) && operands[1] == const1_rtx
|
||||||
&& (link = find_reg_note (insn, REG_WAS_0, 0))
|
&& (link = find_reg_note (insn, REG_WAS_0, 0))
|
||||||
/* Make sure the insn that stored the 0 is still present. */
|
/* Make sure the insn that stored the 0 is still present. */
|
||||||
&& ! XEXP (link, 0)->volatil
|
&& ! INSN_DELETED_P (XEXP (link, 0))
|
||||||
&& GET_CODE (XEXP (link, 0)) != NOTE
|
&& GET_CODE (XEXP (link, 0)) != NOTE
|
||||||
/* Make sure cross jumping didn't happen here. */
|
/* Make sure cross jumping didn't happen here. */
|
||||||
&& no_labels_between_p (XEXP (link, 0), insn))
|
&& no_labels_between_p (XEXP (link, 0), insn)
|
||||||
|
/* Make sure the reg hasn't been clobbered. */
|
||||||
|
&& ! reg_set_between_p (operands[0], XEXP (link, 0), insn))
|
||||||
/* Fastest way to change a 0 to a 1. */
|
/* Fastest way to change a 0 to a 1. */
|
||||||
return AS1 (inc%L0,%k0);
|
return AS1 (inc%L0,%k0);
|
||||||
|
|
||||||
@ -685,10 +724,12 @@
|
|||||||
if (operands[1] == const1_rtx
|
if (operands[1] == const1_rtx
|
||||||
&& (link = find_reg_note (insn, REG_WAS_0, 0))
|
&& (link = find_reg_note (insn, REG_WAS_0, 0))
|
||||||
/* Make sure the insn that stored the 0 is still present. */
|
/* Make sure the insn that stored the 0 is still present. */
|
||||||
&& ! XEXP (link, 0)->volatil
|
&& ! INSN_DELETED_P (XEXP (link, 0))
|
||||||
&& GET_CODE (XEXP (link, 0)) != NOTE
|
&& GET_CODE (XEXP (link, 0)) != NOTE
|
||||||
/* Make sure cross jumping didn't happen here. */
|
/* Make sure cross jumping didn't happen here. */
|
||||||
&& no_labels_between_p (XEXP (link, 0), insn))
|
&& no_labels_between_p (XEXP (link, 0), insn)
|
||||||
|
/* Make sure the reg hasn't been clobbered. */
|
||||||
|
&& ! reg_set_between_p (operands[0], XEXP (link, 0), insn))
|
||||||
/* Fastest way to change a 0 to a 1. */
|
/* Fastest way to change a 0 to a 1. */
|
||||||
return AS1 (inc%W0,%0);
|
return AS1 (inc%W0,%0);
|
||||||
|
|
||||||
@ -727,10 +768,12 @@
|
|||||||
if (operands[1] == const1_rtx
|
if (operands[1] == const1_rtx
|
||||||
&& (link = find_reg_note (insn, REG_WAS_0, 0))
|
&& (link = find_reg_note (insn, REG_WAS_0, 0))
|
||||||
/* Make sure the insn that stored the 0 is still present. */
|
/* Make sure the insn that stored the 0 is still present. */
|
||||||
&& ! XEXP (link, 0)->volatil
|
&& ! INSN_DELETED_P (XEXP (link, 0))
|
||||||
&& GET_CODE (XEXP (link, 0)) != NOTE
|
&& GET_CODE (XEXP (link, 0)) != NOTE
|
||||||
/* Make sure cross jumping didn't happen here. */
|
/* Make sure cross jumping didn't happen here. */
|
||||||
&& no_labels_between_p (XEXP (link, 0), insn))
|
&& no_labels_between_p (XEXP (link, 0), insn)
|
||||||
|
/* Make sure the reg hasn't been clobbered. */
|
||||||
|
&& ! reg_set_between_p (operands[0], XEXP (link, 0), insn))
|
||||||
/* Fastest way to change a 0 to a 1. */
|
/* Fastest way to change a 0 to a 1. */
|
||||||
return AS1 (inc%B0,%0);
|
return AS1 (inc%B0,%0);
|
||||||
|
|
||||||
@ -763,10 +806,12 @@
|
|||||||
if (operands[1] == const1_rtx
|
if (operands[1] == const1_rtx
|
||||||
&& (link = find_reg_note (insn, REG_WAS_0, 0))
|
&& (link = find_reg_note (insn, REG_WAS_0, 0))
|
||||||
/* Make sure the insn that stored the 0 is still present. */
|
/* Make sure the insn that stored the 0 is still present. */
|
||||||
&& ! XEXP (link, 0)->volatil
|
&& ! INSN_DELETED_P (XEXP (link, 0))
|
||||||
&& GET_CODE (XEXP (link, 0)) != NOTE
|
&& GET_CODE (XEXP (link, 0)) != NOTE
|
||||||
/* Make sure cross jumping didn't happen here. */
|
/* Make sure cross jumping didn't happen here. */
|
||||||
&& no_labels_between_p (XEXP (link, 0), insn))
|
&& no_labels_between_p (XEXP (link, 0), insn)
|
||||||
|
/* Make sure the reg hasn't been clobbered. */
|
||||||
|
&& ! reg_set_between_p (operands[0], XEXP (link, 0), insn))
|
||||||
/* Fastest way to change a 0 to a 1. */
|
/* Fastest way to change a 0 to a 1. */
|
||||||
return AS1 (inc%B0,%0);
|
return AS1 (inc%B0,%0);
|
||||||
|
|
||||||
@ -808,9 +853,9 @@
|
|||||||
return AS1 (push%L1,%1);
|
return AS1 (push%L1,%1);
|
||||||
}")
|
}")
|
||||||
|
|
||||||
;; The constraints used to be:
|
;; Allow MEM-MEM moves before reload. The reload class for such a
|
||||||
;; op 0 "=f,fm,!*rf,!*rm"
|
;; move will be ALL_REGS. PREFERRED_RELOAD_CLASS will narrow this to
|
||||||
;; op 1 "fmG,f,*rfm,*rfF"
|
;; GENERAL_REGS. For the purposes of regclass, prefer FLOAT_REGS.
|
||||||
|
|
||||||
(define_insn "movsf"
|
(define_insn "movsf"
|
||||||
[(set (match_operand:SF 0 "general_operand" "=*rf,*rfm,f,!*rm")
|
[(set (match_operand:SF 0 "general_operand" "=*rf,*rfm,f,!*rm")
|
||||||
@ -909,9 +954,9 @@
|
|||||||
return AS1 (fxch,%0);
|
return AS1 (fxch,%0);
|
||||||
}")
|
}")
|
||||||
|
|
||||||
;; The constraints used to be:
|
;; Allow MEM-MEM moves before reload. The reload class for such a
|
||||||
;; op 0 "=f,fm,!*rf,!*rm"
|
;; move will be ALL_REGS. PREFERRED_RELOAD_CLASS will narrow this to
|
||||||
;; op 1 "fmG,f,*rfm,*rfF"
|
;; GENERAL_REGS. For the purposes of regclass, prefer FLOAT_REGS.
|
||||||
|
|
||||||
(define_insn "movdf"
|
(define_insn "movdf"
|
||||||
[(set (match_operand:DF 0 "general_operand" "=*rf,*rfm,f,!*rm")
|
[(set (match_operand:DF 0 "general_operand" "=*rf,*rfm,f,!*rm")
|
||||||
@ -1194,26 +1239,36 @@
|
|||||||
;; insn.
|
;; insn.
|
||||||
|
|
||||||
(define_insn "truncdfsf2"
|
(define_insn "truncdfsf2"
|
||||||
[(set (match_operand:SF 0 "general_operand" "=m,!*r")
|
[(set (match_operand:SF 0 "nonimmediate_operand" "=f,m")
|
||||||
(float_truncate:SF
|
(float_truncate:SF
|
||||||
(match_operand:DF 1 "register_operand" "f,f")))]
|
(match_operand:DF 1 "register_operand" "0,f")))]
|
||||||
"TARGET_80387"
|
"TARGET_80387"
|
||||||
"*
|
"*
|
||||||
{
|
{
|
||||||
int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0;
|
int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0;
|
||||||
|
|
||||||
if (NON_STACK_REG_P (operands[0]))
|
if (GET_CODE (operands[0]) == MEM)
|
||||||
{
|
|
||||||
output_to_reg (operands[0], stack_top_dies);
|
|
||||||
RET;
|
|
||||||
}
|
|
||||||
else if (GET_CODE (operands[0]) == MEM)
|
|
||||||
{
|
{
|
||||||
if (stack_top_dies)
|
if (stack_top_dies)
|
||||||
return AS1 (fstp%z0,%0);
|
return AS1 (fstp%z0,%0);
|
||||||
else
|
else
|
||||||
return AS1 (fst%z0,%0);
|
return AS1 (fst%z0,%0);
|
||||||
}
|
}
|
||||||
|
else if (STACK_TOP_P (operands[0]))
|
||||||
|
{
|
||||||
|
rtx xops[4];
|
||||||
|
|
||||||
|
xops[0] = AT_SP (SFmode);
|
||||||
|
xops[1] = stack_pointer_rtx;
|
||||||
|
xops[2] = GEN_INT (GET_MODE_SIZE (SFmode));
|
||||||
|
xops[3] = operands[0];
|
||||||
|
|
||||||
|
output_asm_insn (AS2 (sub%L1,%2,%1), xops);
|
||||||
|
output_asm_insn (AS1 (fstp%z0,%y0), xops);
|
||||||
|
output_asm_insn (AS1 (fld%z0,%y0), xops);
|
||||||
|
output_asm_insn (AS2 (add%L1,%2,%1), xops);
|
||||||
|
RET;
|
||||||
|
}
|
||||||
else
|
else
|
||||||
abort ();
|
abort ();
|
||||||
}")
|
}")
|
||||||
|
Loading…
Reference in New Issue
Block a user