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[AArch64] Fix categorisation of the frecp* insns.

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gcc/

	* config/aarch64/aarch64.md
	(type): Remove frecpe, frecps, frecpx.
	(aarch64_frecp<FRECP:frecp_suffix><mode>): Move to aarch64-simd.md,
	fix to be a TARGET_SIMD instruction.
	(aarch64_frecps): Remove.
	* config/aarch64/aarch64-simd.md
	(aarch64_frecp<FRECP:frecp_suffix><mode>): New, moved from aarch64.md
 	(aarch64_frecps<mode>): Handle all float/vector of float modes.

From-SVN: r202292
This commit is contained in:
James Greenhalgh 2013-09-05 15:53:37 +00:00 committed by James Greenhalgh
parent 6e4150e1d4
commit fe6f68e2bb
3 changed files with 25 additions and 30 deletions
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11
gcc/ChangeLog
View File

@ -1,3 +1,14 @@
2013-09-05 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64.md
(type): Remove frecpe, frecps, frecpx.
(aarch64_frecp<FRECP:frecp_suffix><mode>): Move to aarch64-simd.md,
fix to be a TARGET_SIMD instruction.
(aarch64_frecps): Remove.
* config/aarch64/aarch64-simd.md
(aarch64_frecp<FRECP:frecp_suffix><mode>): New, moved from aarch64.md
(aarch64_frecps<mode>): Handle all float/vector of float modes.
2013-09-05 James Greenhalgh <james.greenhalgh@arm.com>
Sofiane Naci <sofiane.naci@arm.com>

18
gcc/config/aarch64/aarch64-simd.md
View File

@ -4179,13 +4179,23 @@
(set_attr "simd_mode" "<MODE>")]
)
(define_insn "aarch64_frecp<FRECP:frecp_suffix><mode>"
[(set (match_operand:GPF 0 "register_operand" "=w")
(unspec:GPF [(match_operand:GPF 1 "register_operand" "w")]
FRECP))]
"TARGET_SIMD"
"frecp<FRECP:frecp_suffix>\\t%<s>0, %<s>1"
[(set_attr "simd_type" "simd_frecp<FRECP:frecp_suffix>")
(set_attr "mode" "<MODE>")]
)
(define_insn "aarch64_frecps<mode>"
[(set (match_operand:VDQF 0 "register_operand" "=w")
(unspec:VDQF [(match_operand:VDQF 1 "register_operand" "w")
(match_operand:VDQF 2 "register_operand" "w")]
[(set (match_operand:VALLF 0 "register_operand" "=w")
(unspec:VALLF [(match_operand:VALLF 1 "register_operand" "w")
(match_operand:VALLF 2 "register_operand" "w")]
UNSPEC_FRECPS))]
"TARGET_SIMD"
"frecps\\t%0.<Vtype>, %1.<Vtype>, %2.<Vtype>"
"frecps\\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>"
[(set_attr "simd_type" "simd_frecps")
(set_attr "simd_mode" "<MODE>")]
)

26
gcc/config/aarch64/aarch64.md
View File

@ -240,9 +240,6 @@
fmovf2i,\
fmovi2f,\
fmul,\
frecpe,\
frecps,\
frecpx,\
frint,\
fsqrt,\
load_acq,\
@ -3946,29 +3943,6 @@
(set_attr "mode" "<MODE>")]
)
(define_insn "aarch64_frecp<FRECP:frecp_suffix><mode>"
[(set (match_operand:GPF 0 "register_operand" "=w")
(unspec:GPF [(match_operand:GPF 1 "register_operand" "w")]
FRECP))]
"TARGET_FLOAT"
"frecp<FRECP:frecp_suffix>\\t%<s>0, %<s>1"
[(set_attr "v8type" "frecp<FRECP:frecp_suffix>")
(set_attr "type" "ffarith<s>")
(set_attr "mode" "<MODE>")]
)
(define_insn "aarch64_frecps<mode>"
[(set (match_operand:GPF 0 "register_operand" "=w")
(unspec:GPF [(match_operand:GPF 1 "register_operand" "w")
(match_operand:GPF 2 "register_operand" "w")]
UNSPEC_FRECPS))]
"TARGET_FLOAT"
"frecps\\t%<s>0, %<s>1, %<s>2"
[(set_attr "v8type" "frecps")
(set_attr "type" "ffarith<s>")
(set_attr "mode" "<MODE>")]
)
;; -------------------------------------------------------------------
;; Reload support
;; -------------------------------------------------------------------