re PR target/14457 (ICE with simple c++ source)
PR target/14457 * config/m68hc11/m68hc11.c (splitable_operand): New predicate. * config/m68hc11/m68hc11-protos.h (splitable_operand): Declare. * config/m68hc11/m68hc11.h (PREDICATE_CODES): Register it. (inhibit_libc): Must define. * config/m68hc11/m68hc11.md ("movhi_const0"): Use splitable_operand. ("*andhi3_gen", "iorhi3", "*iorhi3_gen"): Likewise. ("xorhi3"): Likewise. From-SVN: r82670
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@ -1,3 +1,14 @@
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2004-06-06 Stephane Carrez <stcarrez@nerim.fr>
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PR target/14457
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* config/m68hc11/m68hc11.c (splitable_operand): New predicate.
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* config/m68hc11/m68hc11-protos.h (splitable_operand): Declare.
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* config/m68hc11/m68hc11.h (PREDICATE_CODES): Register it.
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(inhibit_libc): Must define.
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* config/m68hc11/m68hc11.md ("movhi_const0"): Use splitable_operand.
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("*andhi3_gen", "iorhi3", "*iorhi3_gen"): Likewise.
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("xorhi3"): Likewise.
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2004-06-06 Eric Botcazou <ebotcazou@libertysurf.fr>
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* cgraphunit.c (cgraph_decide_inlining): Adjust dump lines in
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@ -1,5 +1,5 @@
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/* Prototypes for exported functions defined in m68hc11.c
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Copyright (C) 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
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Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
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Contributed by Stephane Carrez (stcarrez@nerim.fr)
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This file is part of GCC.
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@ -104,6 +104,7 @@ extern int memory_reload_operand (rtx, enum machine_mode);
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extern int stack_register_operand (rtx, enum machine_mode);
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extern int d_register_operand (rtx, enum machine_mode);
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extern int hard_addr_reg_operand (rtx, enum machine_mode);
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extern int splitable_operand (rtx, enum machine_mode);
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extern int arith_src_operand (rtx, enum machine_mode);
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extern int m68hc11_logical_operator (rtx, enum machine_mode);
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extern int m68hc11_arith_operator (rtx, enum machine_mode);
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@ -1009,6 +1009,24 @@ non_push_operand (rtx operand, enum machine_mode mode)
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return 1;
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}
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int
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splitable_operand (rtx operand, enum machine_mode mode)
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{
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if (general_operand (operand, mode) == 0)
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return 0;
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if (push_operand (operand, mode) == 1)
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return 0;
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/* Reject a (MEM (MEM X)) because the patterns that use non_push_operand
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need to split such addresses to access the low and high part but it
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is not possible to express a valid address for the low part. */
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if (mode != QImode && GET_CODE (operand) == MEM
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&& GET_CODE (XEXP (operand, 0)) == MEM)
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return 0;
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return 1;
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}
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int
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reg_or_some_mem_operand (rtx operand, enum machine_mode mode)
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{
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@ -92,7 +92,9 @@ Note:
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while (0)
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/* As an embedded target, we have no libc. */
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#define inhibit_libc
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#ifndef inhibit_libc
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# define inhibit_libc
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#endif
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/* Forward type declaration for prototypes definitions.
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rtx_ptr is equivalent to rtx. Can't use the same name. */
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@ -1633,6 +1635,7 @@ do { \
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{"m68hc11_shift_operator", {ASHIFT, ASHIFTRT, LSHIFTRT, ROTATE, ROTATERT}},\
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{"m68hc11_eq_compare_operator", {EQ, NE}}, \
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{"non_push_operand", {SUBREG, REG, MEM}}, \
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{"splitable_operand", {SUBREG, REG, MEM}}, \
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{"reg_or_some_mem_operand", {SUBREG, REG, MEM}}, \
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{"tst_operand", {SUBREG, REG, MEM}}, \
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{"cmp_operand", {SUBREG, REG, MEM, SYMBOL_REF, LABEL_REF, \
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@ -885,7 +885,7 @@
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}")
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(define_insn "movhi_const0"
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[(set (match_operand:HI 0 "non_push_operand" "=d,A,um")
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[(set (match_operand:HI 0 "splitable_operand" "=d,A,um")
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(const_int 0))]
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""
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"@
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@ -3230,8 +3230,8 @@
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(define_insn "*andhi3_gen"
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[(set (match_operand:HI 0 "register_operand" "=d,d,!*A")
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(and:HI (match_operand:HI 1 "register_operand" "%0,0,0")
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(match_operand:HI 2 "general_operand" "mi,!u*A,!um*A")))]
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(and:HI (match_operand:HI 1 "splitable_operand" "%0,0,0")
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(match_operand:HI 2 "splitable_operand" "mi,!u*A,!um*Ai")))]
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""
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"*
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{
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@ -3371,7 +3371,7 @@
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(define_expand "iorhi3"
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[(set (match_operand:HI 0 "register_operand" "")
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(ior:HI (match_operand:HI 1 "register_operand" "")
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(match_operand:HI 2 "general_operand" "")))]
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(match_operand:HI 2 "splitable_operand" "")))]
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""
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"")
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@ -3459,8 +3459,8 @@
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(define_insn "*iorhi3_gen"
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[(set (match_operand:HI 0 "register_operand" "=d,d,!*A")
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(ior:HI (match_operand:HI 1 "register_operand" "%0,0,0")
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(match_operand:HI 2 "general_operand" "mi,!u*A,!um*A")))]
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(ior:HI (match_operand:HI 1 "splitable_operand" "%0,0,0")
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(match_operand:HI 2 "splitable_operand" "mi,!u*A,!um*Ai")))]
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""
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"*
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{
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@ -3589,8 +3589,8 @@
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(define_insn "xorhi3"
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[(set (match_operand:HI 0 "register_operand" "=d,d,!*A")
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(xor:HI (match_operand:HI 1 "register_operand" "%0,0,0")
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(match_operand:HI 2 "general_operand" "im,!u*A,!ium*A")))]
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(xor:HI (match_operand:HI 1 "splitable_operand" "%0,0,0")
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(match_operand:HI 2 "splitable_operand" "im,!u*A,!ium*A")))]
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""
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"*
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{
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