darwin.c, [...]: Fix comment formatting.
* config/darwin.c, config/darwin.h, config/freebsd-spec.h, config/arm/arm.c, config/arm/arm.md, config/cris/cris-protos.h, config/fr30/fr30.c, config/fr30/fr30.h, config/h8300/h8300.c, config/i386/i386.h, config/i860/i860.c, config/i860/i860.h, config/ia64/ia64-c.c, config/ia64/ia64.c, config/ia64/ia64.h, config/ip2k/ip2k.h, config/ip2k/ip2k.md, config/ip2k/libgcc.S, config/m32r/linux.h, config/m32r/m32r.c, config/m32r/m32r.h, config/m68k/m68k.c, config/m68k/netbsd-elf.h, config/mips/mips.c, config/mmix/mmix.c, config/mmix/mmix.md, config/ns32k/netbsd.h, config/ns32k/ns32k.c, config/ns32k/ns32k.h, config/pdp11/pdp11.h, config/rs6000/darwin-ldouble.c, config/s390/s390.h, config/s390/s390.md, config/sparc/netbsd-elf.h, config/sparc/openbsd.h, config/sparc/sparc.c, config/xtensa/lib2funcs.S: Fix comment formatting. From-SVN: r77268
This commit is contained in:
parent
59b9a953b6
commit
ff482c8d4d
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@ -1,3 +1,22 @@
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2004-02-04 Kazu Hirata <kazu@cs.umass.edu>
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* config/darwin.c, config/darwin.h, config/freebsd-spec.h,
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config/arm/arm.c, config/arm/arm.md,
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config/cris/cris-protos.h, config/fr30/fr30.c,
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config/fr30/fr30.h, config/h8300/h8300.c, config/i386/i386.h,
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config/i860/i860.c, config/i860/i860.h, config/ia64/ia64-c.c,
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config/ia64/ia64.c, config/ia64/ia64.h, config/ip2k/ip2k.h,
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config/ip2k/ip2k.md, config/ip2k/libgcc.S,
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config/m32r/linux.h, config/m32r/m32r.c, config/m32r/m32r.h,
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config/m68k/m68k.c, config/m68k/netbsd-elf.h,
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config/mips/mips.c, config/mmix/mmix.c, config/mmix/mmix.md,
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config/ns32k/netbsd.h, config/ns32k/ns32k.c,
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config/ns32k/ns32k.h, config/pdp11/pdp11.h,
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config/rs6000/darwin-ldouble.c, config/s390/s390.h,
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config/s390/s390.md, config/sparc/netbsd-elf.h,
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config/sparc/openbsd.h, config/sparc/sparc.c,
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config/xtensa/lib2funcs.S: Fix comment formatting.
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2004-02-04 Kazu Hirata <kazu@cs.umass.edu>
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* config/alpha/alpha.c, config/arc/arc.c,
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@ -3318,7 +3318,7 @@ thumb_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer)
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case AND:
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case XOR:
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case IOR:
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/* XXX guess. */
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/* XXX guess. */
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return 8;
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case ADDRESSOF:
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@ -3331,7 +3331,7 @@ thumb_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer)
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? 4 : 0));
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case IF_THEN_ELSE:
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/* XXX a guess. */
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/* XXX a guess. */
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if (GET_CODE (XEXP (x, 1)) == PC || GET_CODE (XEXP (x, 2)) == PC)
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return 14;
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return 2;
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@ -3759,11 +3759,11 @@ arm_xscale_rtx_costs (rtx x, int code, int outer_code, int *total)
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unsigned HOST_WIDE_INT masked_const;
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/* The cost will be related to two insns.
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First a load of the constant (MOV or LDR), then a multiply. */
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First a load of the constant (MOV or LDR), then a multiply. */
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cost = 2;
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if (! const_ok)
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cost += 1; /* LDR is probably more expensive because
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of longer result latency. */
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of longer result latency. */
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masked_const = i & 0xffff8000;
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if (masked_const != 0 && masked_const != 0xffff8000)
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{
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@ -2491,7 +2491,7 @@
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/* Ideally we shouldn't fail here if we could know that operands[1]
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ends up already living in an iwmmxt register. Otherwise it's
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cheaper to have the alternate code being generated than moving
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values to iwmmxt regs and back. */
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values to iwmmxt regs and back. */
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FAIL;
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}
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else if (!TARGET_REALLY_IWMMXT && !(TARGET_HARD_FLOAT && TARGET_MAVERICK))
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@ -2550,7 +2550,7 @@
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/* Ideally we shouldn't fail here if we could know that operands[1]
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ends up already living in an iwmmxt register. Otherwise it's
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cheaper to have the alternate code being generated than moving
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values to iwmmxt regs and back. */
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values to iwmmxt regs and back. */
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FAIL;
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}
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else if (!TARGET_REALLY_IWMMXT)
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@ -2606,7 +2606,7 @@
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/* Ideally we shouldn't fail here if we could know that operands[1]
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ends up already living in an iwmmxt register. Otherwise it's
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cheaper to have the alternate code being generated than moving
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values to iwmmxt regs and back. */
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values to iwmmxt regs and back. */
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FAIL;
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}
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else if (!TARGET_REALLY_IWMMXT)
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@ -52,7 +52,7 @@ extern rtx cris_expand_builtin_va_arg (tree, tree);
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extern void cris_pragma_expand_mul (struct cpp_reader *);
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/* Need one that returns an int; usable in expressions. */
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/* Need one that returns an int; usable in expressions. */
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extern int cris_fatal (char *);
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extern void cris_override_options (void);
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@ -82,7 +82,7 @@ machopic_classify_ident (tree ident)
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&& name[5] == '_'));
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tree temp;
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/* The PIC base symbol is always defined. */
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/* The PIC base symbol is always defined. */
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if (! strcmp (name, "<pic base>"))
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return MACHOPIC_DEFINED_DATA;
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@ -245,7 +245,7 @@ machopic_output_function_base_name (FILE *file)
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{
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const char *current_name;
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/* If dynamic-no-pic is on, we should not get here. */
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/* If dynamic-no-pic is on, we should not get here. */
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if (MACHO_DYNAMIC_NO_PIC_P)
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abort ();
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current_name =
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@ -710,7 +710,7 @@ objc_section_init (void) \
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/* Emit an assembler directive to set visibility for a symbol. Used
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to support visibility attribute and Darwin's private extern
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feature. */
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feature. */
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#undef TARGET_ASM_ASSEMBLE_VISIBILITY
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#define TARGET_ASM_ASSEMBLE_VISIBILITY darwin_assemble_visibility
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@ -103,16 +103,16 @@ struct rtx_def * fr30_compare_op1;
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save masks, and offsets for the current function. */
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struct fr30_frame_info
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{
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unsigned int total_size; /* # Bytes that the entire frame takes up. */
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unsigned int pretend_size; /* # Bytes we push and pretend caller did. */
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unsigned int args_size; /* # Bytes that outgoing arguments take up. */
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unsigned int reg_size; /* # Bytes needed to store regs. */
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unsigned int var_size; /* # Bytes that variables take up. */
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unsigned int total_size; /* # Bytes that the entire frame takes up. */
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unsigned int pretend_size; /* # Bytes we push and pretend caller did. */
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unsigned int args_size; /* # Bytes that outgoing arguments take up. */
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unsigned int reg_size; /* # Bytes needed to store regs. */
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unsigned int var_size; /* # Bytes that variables take up. */
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unsigned int frame_size; /* # Bytes in current frame. */
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unsigned int gmask; /* Mask of saved registers. */
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unsigned int save_fp; /* Nonzero if frame pointer must be saved. */
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unsigned int save_rp; /* Nonzero if return pointer must be saved. */
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int initialised; /* Nonzero if frame size already calculated. */
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unsigned int gmask; /* Mask of saved registers. */
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unsigned int save_fp; /* Nonzero if frame pointer must be saved. */
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unsigned int save_rp; /* Nonzero if return pointer must be saved. */
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int initialised; /* Nonzero if frame size already calculated. */
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};
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/* Current frame information calculated by fr30_compute_frame_size(). */
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statement is probably unnecessary. */
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if (targetm.calls.strict_argument_naming (&arg_regs_used_so_far))
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/* If TARGET_STRICT_ARGUMENT_NAMING returns true, then the last named
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arg must not be treated as an anonymous arg. */
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arg must not be treated as an anonymous arg. */
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arg_regs_used_so_far += fr30_num_arg_regs (int_mode, type);
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size = FR30_NUM_ARG_REGS - arg_regs_used_so_far;
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@ -39,7 +39,7 @@ Boston, MA 02111-1307, USA. */
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/* Define this to be a string constant containing `-D' options to define the
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predefined macros that identify this machine and system. These macros will
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be predefined unless the `-ansi' option is specified. */
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be predefined unless the `-ansi' option is specified. */
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#define TARGET_CPU_CPP_BUILTINS() \
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do \
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@ -661,7 +661,7 @@ enum reg_class
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- if the type has variable size
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- if the type is marked as addressable (it is required to be constructed
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into the stack)
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- if the type is a structure or union. */
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- if the type is a structure or union. */
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#define MUST_PASS_IN_STACK(MODE, TYPE) \
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(((MODE) == BLKmode) \
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@ -801,7 +801,7 @@ enum reg_class
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#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RETURN_VALUE_REGNUM)
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/* A C expression that is nonzero if REGNO is the number of a hard register in
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which the values of called function may come back. */
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which the values of called function may come back. */
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#define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == RETURN_VALUE_REGNUM)
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@ -70,7 +70,7 @@ Boston, MA 02111-1307, USA. */
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} \
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while (0)
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/* Define the default FreeBSD-specific per-CPU hook code. */
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/* Define the default FreeBSD-specific per-CPU hook code. */
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#define FBSD_TARGET_CPU_CPP_BUILTINS() do {} while (0)
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/* Provide a CPP_SPEC appropriate for FreeBSD. We just deal with the GCC
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@ -4419,7 +4419,7 @@ h8300_asm_named_section (const char *name, unsigned int flags ATTRIBUTE_UNUSED)
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int
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h8300_eightbit_constant_address_p (rtx x)
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{
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/* The ranges of the 8-bit area. */
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/* The ranges of the 8-bit area. */
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const unsigned HOST_WIDE_INT n1 = trunc_int_for_mode (0xff00, HImode);
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const unsigned HOST_WIDE_INT n2 = trunc_int_for_mode (0xffff, HImode);
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const unsigned HOST_WIDE_INT h1 = trunc_int_for_mode (0x00ffff00, SImode);
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@ -1919,7 +1919,7 @@ typedef struct ix86_args {
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been eliminated by then. */
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/* Non strict versions, pseudos are ok */
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/* Non strict versions, pseudos are ok. */
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#define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
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(REGNO (X) < STACK_POINTER_REGNUM \
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|| (REGNO (X) >= FIRST_REX_INT_REG \
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@ -1165,7 +1165,7 @@ output_block_move (rtx *operands)
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output_asm_insn ("bla %5,%2,.Lm%3", xoperands);
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output_asm_insn ("adds %0,%2,%6", xoperands);
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output_asm_insn ("\n.Lm%3:", xoperands); /* Label for bla above. */
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output_asm_insn ("\n.Ls%3:", xoperands); /* Loop start label. */
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output_asm_insn ("\n.Ls%3:", xoperands); /* Loop start label. */
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output_asm_insn ("adds %5,%6,%6", xoperands);
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/* NOTE: The code here which is supposed to handle the cases where the
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@ -824,7 +824,7 @@ struct cumulative_args { int ints, floats; };
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/* Define as C expression which evaluates to nonzero if the tablejump
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instruction expects the table to contain offsets from the address of the
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table.
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Do not define this if the table should contain absolute addresses. */
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Do not define this if the table should contain absolute addresses. */
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/* #define CASE_VECTOR_PC_RELATIVE 1 */
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/* Define this as 1 if `char' should by default be signed; else as 0. */
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@ -60,7 +60,7 @@ ia64_hpux_handle_builtin_pragma (cpp_reader *pfile ATTRIBUTE_UNUSED)
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typedef struct c89_mathlib_names
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{
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const char *realname; /* User visible function name. */
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const char *c89name; /* libm special name needed to set errno. */
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const char *c89name; /* libm special name needed to set errno. */
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} c89_mathlib_names;
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static const c89_mathlib_names c89_mathlib_name_list [] =
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@ -1525,7 +1525,7 @@ ia64_split_tmode (rtx out[2], rtx in, bool reversed, bool dead)
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{
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/* Again the postmodify cannot be made to match, but
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in this case it's more efficient to get rid of the
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postmodify entirely and fix up with an add insn. */
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postmodify entirely and fix up with an add insn. */
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out[1] = adjust_automodify_address (in, DImode, base, 8);
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fixup = gen_adddi3 (base, base,
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GEN_INT (INTVAL (XEXP (offset, 1)) - 8));
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@ -6827,7 +6827,7 @@ bundling (FILE *dump, int verbose, rtx prev_head_insn, rtx tail)
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initiate_bundle_state_table ();
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index_to_bundle_states = xmalloc ((insn_num + 2)
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* sizeof (struct bundle_state *));
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/* First (forward) pass -- generation of bundle states. */
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/* First (forward) pass -- generation of bundle states. */
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curr_state = get_free_bundle_state ();
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curr_state->insn = NULL;
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curr_state->before_nops_num = 0;
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@ -7424,7 +7424,7 @@ ia64_ld_address_bypass_p (rtx producer, rtx consumer)
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/* The following function returns TRUE if INSN produces address for a
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load/store insn. We will place such insns into M slot because it
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decreases its latency time. */
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decreases its latency time. */
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int
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ia64_produce_address_p (rtx insn)
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@ -90,7 +90,7 @@ extern int target_flags;
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#define MASK_INLINE_SQRT_LAT 0x00008000 /* inline sqrt, min latency. */
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#define MASK_INLINE_SQRT_THR 0x00010000 /* inline sqrt, max throughput. */
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#define MASK_INLINE_SQRT_THR 0x00010000 /* inline sqrt, max throughput. */
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#define MASK_DWARF2_ASM 0x00020000 /* test dwarf2 line info via gas. */
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@ -251,7 +251,7 @@ extern const char *ia64_tls_size_string;
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enum processor_type
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{
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PROCESSOR_ITANIUM, /* Original Itanium. */
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PROCESSOR_ITANIUM, /* Original Itanium. */
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PROCESSOR_ITANIUM2,
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PROCESSOR_max
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};
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@ -862,7 +862,7 @@ extern int ip2k_reorg_merge_qimode;
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#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
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/* Miscellaneous macros to describe machine specifics. */
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/* Miscellaneous macros to describe machine specifics. */
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#define IS_PSEUDO_P(R) (REGNO (R) >= FIRST_PSEUDO_REGISTER)
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|
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@ -975,7 +975,7 @@
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0xff & ~mask);
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if (CONSTANT_P (operands[3]))
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/* Constant can just be or-ed in. */
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/* Constant can just be or-ed in. */
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{
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p += sprintf (p, \"mov\\tw,#$%2.2x\;or\\t%%0,w\",
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(int) (INTVAL (operands[3]) << pos) & mask & 0xff);
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|
@ -984,7 +984,7 @@
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p += sprintf (p, \"mov\\tw,%%3\;\"); /* Value to deposit */
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/* Shift and mask the value before OR-ing into the destination. */
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/* Shift and mask the value before OR-ing into the destination. */
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if (pos != 0)
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p += sprintf (p, \"mulu\\tw,#%d\;\", 1<<pos);
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|
@ -1084,7 +1084,7 @@
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{
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/* It is not impossible to wind up with two constants here.
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If we simply emit the ashl, we'll generate unrecognizable
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instructions. */
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instructions. */
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if (! nonimmediate_operand (operands[1], HImode))
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operands[1] = copy_to_mode_reg (HImode, operands[1]);
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emit_insn (gen_ashlhi3 (operands[0], operands[1], const1_rtx));
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|
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@ -1498,7 +1498,7 @@ _abort:
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#endif
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#if defined(Lwrite)
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/* Dummy entrypoint to suppress problems with glue code. */
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/* Dummy entrypoint to suppress problems with glue code. */
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.sect .text.libgcc,"ax"
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.global _write
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.func write, _write
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|
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|
@ -57,7 +57,7 @@
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When the -shared link option is used a final link is not being
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done. */
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/* If ELF is the default format, we should not use /lib/elf. */
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/* If ELF is the default format, we should not use /lib/elf. */
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#undef LINK_SPEC
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#if TARGET_LITTLE_ENDIAN
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|
|
|
@ -2034,7 +2034,7 @@ m32r_output_function_prologue (FILE * file, HOST_WIDE_INT size)
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}
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/* Do any necessary cleanup after a function to restore stack, frame,
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and regs. */
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and regs. */
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static void
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m32r_output_function_epilogue (FILE * file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
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|
@ -2724,7 +2724,7 @@ emit_cond_move (rtx * operands, rtx insn ATTRIBUTE_UNUSED)
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}
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/* Returns true if the registers contained in the two
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rtl expressions are different. */
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rtl expressions are different. */
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int
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m32r_not_same_reg (rtx a, rtx b)
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|
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|
@ -1028,7 +1028,7 @@ extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];
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SIZE is the number of bytes of arguments passed on the stack. */
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#define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0
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/* Nonzero if we do not know how to pass TYPE solely in registers. */
|
||||
/* Nonzero if we do not know how to pass TYPE solely in registers. */
|
||||
#define MUST_PASS_IN_STACK(MODE, TYPE) \
|
||||
((TYPE) != 0 \
|
||||
&& (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \
|
||||
|
@ -1728,7 +1728,7 @@ extern char m32r_punct_chars[256];
|
|||
/* Define as C expression which evaluates to nonzero if the tablejump
|
||||
instruction expects the table to contain offsets from the address of the
|
||||
table.
|
||||
Do not define this if the table should contain absolute addresses. */
|
||||
Do not define this if the table should contain absolute addresses. */
|
||||
/* It's not clear what PIC will look like or whether we want to use -fpic
|
||||
for the embedded form currently being talked about. For now require -fpic
|
||||
to get pc relative switch tables. */
|
||||
|
|
|
@ -58,7 +58,7 @@ Boston, MA 02111-1307, USA. */
|
|||
#endif
|
||||
|
||||
|
||||
/* Structure describing stack frame layout. */
|
||||
/* Structure describing stack frame layout. */
|
||||
struct m68k_frame
|
||||
{
|
||||
/* Stack pointer to frame pointer offset. */
|
||||
|
|
|
@ -316,7 +316,7 @@ while (0)
|
|||
function. VALTYPE is the data type of the value (as a tree). If
|
||||
the precise function being called is known, FUNC is its
|
||||
FUNCTION_DECL; otherwise, FUNC is 0. For m68k/SVR4 generate the
|
||||
result in d0, a0, or fp0 as appropriate. */
|
||||
result in d0, a0, or fp0 as appropriate. */
|
||||
|
||||
#undef FUNCTION_VALUE
|
||||
#define FUNCTION_VALUE(VALTYPE, FUNC) \
|
||||
|
@ -359,14 +359,14 @@ while (0)
|
|||
|
||||
|
||||
/* Boundary (in *bits*) on which stack pointer should be aligned.
|
||||
The m68k/SVR4 convention is to keep the stack pointer longword aligned. */
|
||||
The m68k/SVR4 convention is to keep the stack pointer longword aligned. */
|
||||
|
||||
#undef STACK_BOUNDARY
|
||||
#define STACK_BOUNDARY 32
|
||||
|
||||
|
||||
/* Alignment of field after `int : 0' in a structure.
|
||||
For m68k/SVR4, this is the next longword boundary. */
|
||||
For m68k/SVR4, this is the next longword boundary. */
|
||||
|
||||
#undef EMPTY_FIELD_BOUNDARY
|
||||
#define EMPTY_FIELD_BOUNDARY 32
|
||||
|
@ -381,7 +381,7 @@ while (0)
|
|||
|
||||
|
||||
/* For m68k SVR4, structures are returned using the reentrant
|
||||
technique. */
|
||||
technique. */
|
||||
|
||||
#undef PCC_STATIC_STRUCT_RETURN
|
||||
|
||||
|
|
|
@ -2909,13 +2909,13 @@ gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0,
|
|||
if (mode == VOIDmode)
|
||||
mode = GET_MODE (cmp1);
|
||||
|
||||
/* Eliminate simple branches */
|
||||
/* Eliminate simple branches. */
|
||||
branch_p = (result == 0);
|
||||
if (branch_p)
|
||||
{
|
||||
if (GET_CODE (cmp0) == REG || GET_CODE (cmp0) == SUBREG)
|
||||
{
|
||||
/* Comparisons against zero are simple branches */
|
||||
/* Comparisons against zero are simple branches. */
|
||||
if (GET_CODE (cmp1) == CONST_INT && INTVAL (cmp1) == 0
|
||||
&& (! TARGET_MIPS16 || eqne_p))
|
||||
return 0;
|
||||
|
|
|
@ -246,7 +246,7 @@ mmix_init_machine_status (void)
|
|||
/* DATA_ALIGNMENT.
|
||||
We have trouble getting the address of stuff that is located at other
|
||||
than 32-bit alignments (GETA requirements), so try to give everything
|
||||
at least 32-bit alignment. */
|
||||
at least 32-bit alignment. */
|
||||
|
||||
int
|
||||
mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
|
||||
|
@ -1269,7 +1269,7 @@ mmix_file_start (void)
|
|||
|
||||
fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file);
|
||||
|
||||
/* Make sure each file starts with the text section. */
|
||||
/* Make sure each file starts with the text section. */
|
||||
text_section ();
|
||||
}
|
||||
|
||||
|
@ -1278,7 +1278,7 @@ mmix_file_start (void)
|
|||
static void
|
||||
mmix_file_end (void)
|
||||
{
|
||||
/* Make sure each file ends with the data section. */
|
||||
/* Make sure each file ends with the data section. */
|
||||
data_section ();
|
||||
}
|
||||
|
||||
|
|
|
@ -871,7 +871,7 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\;CSNN %0,$255,%2")
|
|||
= mmix_gen_compare_reg (LE, mmix_compare_op0, mmix_compare_op1);
|
||||
|
||||
/* The head comment of optabs.c:can_compare_p says we're required to
|
||||
implement this, so we have to clean up the mess here. */
|
||||
implement this, so we have to clean up the mess here. */
|
||||
if (operands[1] == NULL_RTX)
|
||||
{
|
||||
/* FIXME: Watch out for sharing/unsharing of rtx:es. */
|
||||
|
@ -893,7 +893,7 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\;CSNN %0,$255,%2")
|
|||
= mmix_gen_compare_reg (GE, mmix_compare_op0, mmix_compare_op1);
|
||||
|
||||
/* The head comment of optabs.c:can_compare_p says we're required to
|
||||
implement this, so we have to clean up the mess here. */
|
||||
implement this, so we have to clean up the mess here. */
|
||||
if (operands[1] == NULL_RTX)
|
||||
{
|
||||
/* FIXME: Watch out for sharing/unsharing of rtx:es. */
|
||||
|
|
|
@ -52,7 +52,7 @@ Boston, MA 02111-1307, USA. */
|
|||
/* 32532 spec says it can handle any alignment. Rumor from tm-ns32k.h
|
||||
tells this might not be actually true (but it's for 32032, perhaps
|
||||
National has fixed the bug for 32532). You might have to change this
|
||||
if the bug still exists. */
|
||||
if the bug still exists. */
|
||||
|
||||
#undef STRICT_ALIGNMENT
|
||||
#define STRICT_ALIGNMENT 0
|
||||
|
|
|
@ -543,7 +543,7 @@ register_move_cost (enum reg_class CLASS1, enum reg_class CLASS2)
|
|||
|
||||
#if 0
|
||||
/* We made the insn definitions copy from floating point to general
|
||||
registers via the stack. */
|
||||
registers via the stack. */
|
||||
int
|
||||
secondary_memory_needed (enum reg_class CLASS1,
|
||||
enum reg_class CLASS2,
|
||||
|
@ -558,7 +558,7 @@ secondary_memory_needed (enum reg_class CLASS1,
|
|||
|
||||
/* TARGET_ADDRESS_COST calls this. This function is not optimal
|
||||
for the 32032 & 32332, but it probably is better than
|
||||
the default. */
|
||||
the default. */
|
||||
|
||||
static int
|
||||
ns32k_address_cost (rtx operand)
|
||||
|
@ -882,7 +882,7 @@ expand_block_move (rtx operands[])
|
|||
/* Use movmd. It is slower than multiple movd's but more
|
||||
compact. It is also slower than movsd for large copies
|
||||
but causes less registers reloading so is better than movsd
|
||||
for small copies. */
|
||||
for small copies. */
|
||||
rtx src, dest;
|
||||
dest = copy_addr_to_reg (XEXP (operands[0], 0));
|
||||
src = copy_addr_to_reg (XEXP (operands[1], 0));
|
||||
|
|
|
@ -40,7 +40,7 @@ Boston, MA 02111-1307, USA. */
|
|||
else if (TARGET_32081) \
|
||||
builtin_define ("__ns32081__"); \
|
||||
\
|
||||
/* Misc. */ \
|
||||
/* Misc. */ \
|
||||
if (TARGET_RTD) \
|
||||
builtin_define ("__RTD__"); \
|
||||
\
|
||||
|
@ -56,7 +56,7 @@ Boston, MA 02111-1307, USA. */
|
|||
/* ABSOLUTE PREFIX, IMMEDIATE_PREFIX and EXTERNAL_PREFIX can be defined
|
||||
to cover most NS32k addressing syntax variations. This way we don't
|
||||
need to redefine long macros in all the tm.h files for just slight
|
||||
variations in assembler syntax. */
|
||||
variations in assembler syntax. */
|
||||
|
||||
#ifndef ABSOLUTE_PREFIX
|
||||
#define ABSOLUTE_PREFIX '@'
|
||||
|
@ -360,10 +360,10 @@ while (0)
|
|||
/* NS32000 pc is not overloaded on a register. */
|
||||
/* #define PC_REGNUM */
|
||||
|
||||
/* Register to use for pushing function arguments. */
|
||||
/* Register to use for pushing function arguments. */
|
||||
#define STACK_POINTER_REGNUM 25
|
||||
|
||||
/* Base register for access to local variables of the function. */
|
||||
/* Base register for access to local variables of the function. */
|
||||
#define FRAME_POINTER_REGNUM 24
|
||||
|
||||
|
||||
|
@ -383,7 +383,7 @@ while (0)
|
|||
/* Value is 1 if it is a good idea to tie two pseudo registers
|
||||
when one has mode MODE1 and one has mode MODE2.
|
||||
If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
|
||||
for any hard reg, then this must be 0 for correct output. */
|
||||
for any hard reg, then this must be 0 for correct output. */
|
||||
|
||||
#define MODES_TIEABLE_P(MODE1, MODE2) \
|
||||
((FLOAT_MODE_P(MODE1) && FLOAT_MODE_P(MODE2) \
|
||||
|
@ -1102,13 +1102,13 @@ __transfer_from_trampoline () \
|
|||
/* Specify the machine mode that this machine uses
|
||||
for the index in the tablejump instruction.
|
||||
HI mode is more efficient but the range is not wide enough for
|
||||
all programs. */
|
||||
all programs. */
|
||||
#define CASE_VECTOR_MODE SImode
|
||||
|
||||
/* Define as C expression which evaluates to nonzero if the tablejump
|
||||
instruction expects the table to contain offsets from the address of the
|
||||
table.
|
||||
Do not define this if the table should contain absolute addresses. */
|
||||
Do not define this if the table should contain absolute addresses. */
|
||||
#define CASE_VECTOR_PC_RELATIVE 1
|
||||
|
||||
/* Define this as 1 if `char' should by default be signed; else as 0. */
|
||||
|
@ -1264,7 +1264,7 @@ __transfer_from_trampoline () \
|
|||
/* This is how to output an assembler line defining an external/static
|
||||
address which is not in tree format (for collect.c). */
|
||||
|
||||
/* The prefix to add to user-visible assembler symbols. */
|
||||
/* The prefix to add to user-visible assembler symbols. */
|
||||
#define USER_LABEL_PREFIX "_"
|
||||
|
||||
/* This is how to output an insn to push a register on the stack.
|
||||
|
|
|
@ -170,7 +170,7 @@ extern int target_flags;
|
|||
/* Define this if most significant word of a multiword number is first. */
|
||||
#define WORDS_BIG_ENDIAN 1
|
||||
|
||||
/* Define that floats are in VAX order, not high word first as for ints. */
|
||||
/* Define that floats are in VAX order, not high word first as for ints. */
|
||||
#define FLOAT_WORDS_BIG_ENDIAN 0
|
||||
|
||||
/* Width of a word, in units (bytes).
|
||||
|
@ -883,7 +883,7 @@ extern int may_call_alloca;
|
|||
/* Define as C expression which evaluates to nonzero if the tablejump
|
||||
instruction expects the table to contain offsets from the address of the
|
||||
table.
|
||||
Do not define this if the table should contain absolute addresses. */
|
||||
Do not define this if the table should contain absolute addresses. */
|
||||
/* #define CASE_VECTOR_PC_RELATIVE 1 */
|
||||
|
||||
/* Define this as 1 if `char' should by default be signed; else as 0. */
|
||||
|
@ -908,7 +908,7 @@ extern int may_call_alloca;
|
|||
|
||||
/* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE,
|
||||
return the mode to be used for the comparison. For floating-point, CCFPmode
|
||||
should be used. */
|
||||
should be used. */
|
||||
|
||||
#define SELECT_CC_MODE(OP,X,Y) \
|
||||
(GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode)
|
||||
|
@ -1013,7 +1013,7 @@ extern struct rtx_def *cc0_reg_rtx;
|
|||
/* Globalizing directive for a label. */
|
||||
#define GLOBAL_ASM_OP "\t.globl "
|
||||
|
||||
/* The prefix to add to user-visible assembler symbols. */
|
||||
/* The prefix to add to user-visible assembler symbols. */
|
||||
|
||||
#define USER_LABEL_PREFIX "_"
|
||||
|
||||
|
@ -1034,7 +1034,7 @@ extern struct rtx_def *cc0_reg_rtx;
|
|||
fprintf (FILE, "\t%sL_%d\n", TARGET_UNIX_ASM ? "" : ".word ", VALUE)
|
||||
|
||||
/* This is how to output an element of a case-vector that is relative.
|
||||
Don't define this if it is not supported. */
|
||||
Don't define this if it is not supported. */
|
||||
|
||||
/* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */
|
||||
|
||||
|
|
|
@ -95,7 +95,7 @@ _xlqadd (double a, double b, double c, double d)
|
|||
d = tau;
|
||||
}
|
||||
|
||||
/* b <- second largest magnitude double. */
|
||||
/* b <- second largest magnitude double. */
|
||||
if (fabs (c) > fabs (b))
|
||||
{
|
||||
t = b;
|
||||
|
@ -104,7 +104,7 @@ _xlqadd (double a, double b, double c, double d)
|
|||
}
|
||||
|
||||
/* Thanks to commutativity, sum is invariant w.r.t. the next
|
||||
conditional exchange. */
|
||||
conditional exchange. */
|
||||
tau = d + c;
|
||||
|
||||
/* Order the smallest magnitude doubles. */
|
||||
|
@ -183,7 +183,7 @@ _xlqdiv (double a, double b, double c, double d)
|
|||
|
||||
/* Finite nonzero result requires corrections to the highest order term. */
|
||||
|
||||
s = c * t; /* (s,sigma) = c*t exactly. */
|
||||
s = c * t; /* (s,sigma) = c*t exactly. */
|
||||
w = -(-b + d * t); /* Written to get fnmsub for speed, but not
|
||||
numerically necessary. */
|
||||
|
||||
|
@ -191,10 +191,10 @@ _xlqdiv (double a, double b, double c, double d)
|
|||
asm ("fmsub %0,%1,%2,%3" : "=f"(sigma) : "f"(c), "f"(t), "f"(s));
|
||||
v = a - s;
|
||||
|
||||
tau = ((v-sigma)+w)/c; /* Correction to t. */
|
||||
tau = ((v-sigma)+w)/c; /* Correction to t. */
|
||||
u = t + tau;
|
||||
|
||||
/* Construct long double result. */
|
||||
/* Construct long double result. */
|
||||
z.dval[0] = u;
|
||||
z.dval[1] = (t - u) + tau;
|
||||
return z.ldval;
|
||||
|
|
|
@ -876,7 +876,7 @@ extern struct rtx_def *s390_compare_op0, *s390_compare_op1;
|
|||
#define SLOW_BYTE_ACCESS 1
|
||||
|
||||
/* The maximum number of bytes that a single instruction can move quickly
|
||||
between memory and registers or between two memory locations. */
|
||||
between memory and registers or between two memory locations. */
|
||||
#define MOVE_MAX (TARGET_64BIT ? 16 : 8)
|
||||
#define MAX_MOVE_MAX 16
|
||||
|
||||
|
|
|
@ -7318,7 +7318,7 @@
|
|||
rtx temp = gen_reg_rtx (Pmode);
|
||||
|
||||
/* Copy the backchain to the first word, sp to the second and the literal pool
|
||||
base to the third. */
|
||||
base to the third. */
|
||||
emit_move_insn (operand_subword (operands[0], 2, 0,
|
||||
TARGET_64BIT ? OImode : TImode),
|
||||
gen_rtx_REG (Pmode, BASE_REGISTER));
|
||||
|
@ -7341,7 +7341,7 @@
|
|||
rtx base = gen_rtx_REG (Pmode, BASE_REGISTER);
|
||||
|
||||
/* Restore the backchain from the first word, sp from the second and the
|
||||
literal pool base from the third. */
|
||||
literal pool base from the third. */
|
||||
emit_move_insn (temp,
|
||||
operand_subword (operands[1], 0, 0,
|
||||
TARGET_64BIT ? OImode : TImode));
|
||||
|
|
|
@ -241,7 +241,7 @@ Boston, MA 02111-1307, USA. */
|
|||
#define MULTILIB_DEFAULTS { "m64" }
|
||||
#endif
|
||||
|
||||
/* Name the port. */
|
||||
/* Name the port. */
|
||||
#undef TARGET_NAME
|
||||
#define TARGET_NAME (DEFAULT_ARCH32_P ? TARGET_NAME32 : TARGET_NAME64)
|
||||
|
||||
|
|
|
@ -62,7 +62,7 @@ Boston, MA 02111-1307, USA. */
|
|||
/* Assembler format: exception region output. */
|
||||
|
||||
/* All configurations that don't use elf must be explicit about not using
|
||||
dwarf unwind information. */
|
||||
dwarf unwind information. */
|
||||
#define DWARF2_UNWIND_INFO 0
|
||||
|
||||
#undef ASM_PREFERRED_EH_DATA_FORMAT
|
||||
|
|
|
@ -7937,7 +7937,7 @@ sparc_init_libfuncs (void)
|
|||
/* Use the subroutines that Sun's library provides for integer
|
||||
multiply and divide. The `*' prevents an underscore from
|
||||
being prepended by the compiler. .umul is a little faster
|
||||
than .mul. */
|
||||
than .mul. */
|
||||
set_optab_libfunc (smul_optab, SImode, "*.umul");
|
||||
set_optab_libfunc (sdiv_optab, SImode, "*.div");
|
||||
set_optab_libfunc (udiv_optab, SImode, "*.udiv");
|
||||
|
@ -8348,7 +8348,7 @@ sparc_rtx_costs (rtx x, int code, int outer_code, int *total)
|
|||
return true;
|
||||
|
||||
case IF_THEN_ELSE:
|
||||
/* Conditional moves. */
|
||||
/* Conditional moves. */
|
||||
switch (sparc_cpu)
|
||||
{
|
||||
case PROCESSOR_ULTRASPARC:
|
||||
|
|
|
@ -32,7 +32,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
|
|||
|
||||
/* __xtensa_libgcc_window_spill: This function flushes out all but the
|
||||
current register window. This is used to set up the stack so that
|
||||
arbitrary frames can be accessed. */
|
||||
arbitrary frames can be accessed. */
|
||||
|
||||
.align 4
|
||||
.global __xtensa_libgcc_window_spill
|
||||
|
@ -91,7 +91,7 @@ __xtensa_nonlocal_goto:
|
|||
function. This can be extracted from the high bits of the
|
||||
return address, initially in a0. As the unwinding
|
||||
proceeds, the window size is taken from the value of a0
|
||||
saved _two_ frames below the current frame. */
|
||||
saved _two_ frames below the current frame. */
|
||||
|
||||
addi a5, sp, -16 # a5 = prev - save area
|
||||
l32i a6, a5, 4
|
||||
|
@ -112,7 +112,7 @@ __xtensa_nonlocal_goto:
|
|||
current sp so they will be reloaded when the return from this
|
||||
function underflows. We don't have to worry about exceptions
|
||||
while updating the current save area, because the windows have
|
||||
already been flushed. */
|
||||
already been flushed. */
|
||||
|
||||
addi a4, sp, -16 # a4 = save area of this function
|
||||
l32i a6, a5, 0
|
||||
|
@ -125,7 +125,7 @@ __xtensa_nonlocal_goto:
|
|||
s32i a7, a4, 12
|
||||
|
||||
/* Set return address to goto handler. Use the window size bits
|
||||
from the return address two frames below the target. */
|
||||
from the return address two frames below the target. */
|
||||
extui a8, a8, 30, 2 # get window size from return addr.
|
||||
slli a3, a3, 2 # get goto handler addr. << 2
|
||||
ssai 2
|
||||
|
@ -149,7 +149,7 @@ __xtensa_nonlocal_goto:
|
|||
At least one IHI instruction is needed for each i-cache line which may
|
||||
be touched by the trampoline. An ISYNC instruction is also needed to
|
||||
make sure that the modified instructions are loaded into the instruction
|
||||
fetch buffer. */
|
||||
fetch buffer. */
|
||||
|
||||
#define TRAMPOLINE_SIZE 59
|
||||
|
||||
|
|
Loading…
Reference in New Issue