Remove '*' from movsi/di/ti patterns
Remove the remaining uses of '*' from the movsi/di/ti patterns. Using '*' in alternatives is typically incorrect at it tells the register allocator to ignore those alternatives. So remove these from all the integer move patterns. This removes unnecessary int to float moves, for example gcc.target/aarch64/pr62178.c no longer generates a redundant fmov since the w = m variant is now allowed. gcc/ * config/aarch64/aarch64.md (movsi_aarch64): Remove all '*'. (movdi_aarch64): Likewise. (movti_aarch64): Likewise. From-SVN: r252033
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@ -1,4 +1,10 @@
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2017-09-02 Simon Wright <simon@pushface.org>
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2017-09-12 Wilco Dijkstra <wdijkstr@arm.com>
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* config/aarch64/aarch64.md (movsi_aarch64): Remove all '*'.
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(movdi_aarch64): Likewise.
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(movti_aarch64): Likewise.
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2017-09-12 Simon Wright <simon@pushface.org>
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PR target/80204
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* config/darwin-driver.c (darwin_find_version_from_kernel): Eliminate
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@ -15,16 +21,16 @@
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2017-09-12 Carl Love <cel@us.ibm.com>
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* config/rs6000/altivec.md (vec_widen_umult_even_v4si,
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* config/rs6000/altivec.md (vec_widen_umult_even_v4si,
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vec_widen_smult_even_v4si): Add define expands for vmuleuw, vmulesw,
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vmulouw, vmulosw.
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* config/rs6000/rs6000-builtin.def (VMLEUW, VMULESW, VMULOUW,
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VMULOSW): Add definitions.
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* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
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ALTIVEC_BUILTIN_VMULESW, ALTIVEC_BUILTIN_VMULEUW,
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ALTIVEC_BUILTIN_VMULOSW, ALTIVEC_BUILTIN_VMULOUW entries.
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* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin,
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builtin_function_type): Add ALTIVEC_BUILTIN_* case statements.
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* config/rs6000/rs6000-builtin.def (VMLEUW, VMULESW, VMULOUW,
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VMULOSW): Add definitions.
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* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
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ALTIVEC_BUILTIN_VMULESW, ALTIVEC_BUILTIN_VMULEUW,
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ALTIVEC_BUILTIN_VMULOSW, ALTIVEC_BUILTIN_VMULOUW entries.
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* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin,
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builtin_function_type): Add ALTIVEC_BUILTIN_* case statements.
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2017-09-12 James Greenhalgh <james.greenhalgh@arm.com>
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@ -932,8 +932,8 @@
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)
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(define_insn_and_split "*movsi_aarch64"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=r,k,r,r,r,r,*w,m, m,r,r ,*w, r,*w,w")
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(match_operand:SI 1 "aarch64_mov_operand" " r,r,k,M,n,m, m,rZ,*w,Usa,Ush,rZ,w,*w,Ds"))]
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[(set (match_operand:SI 0 "nonimmediate_operand" "=r,k,r,r,r,r,w, m, m, r, r, w,r,w, w")
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(match_operand:SI 1 "aarch64_mov_operand" " r,r,k,M,n,m,m,rZ,*w,Usa,Ush,rZ,w,w,Ds"))]
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"(register_operand (operands[0], SImode)
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|| aarch64_reg_or_zero (operands[1], SImode))"
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"@
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@ -966,8 +966,8 @@
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)
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(define_insn_and_split "*movdi_aarch64"
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[(set (match_operand:DI 0 "nonimmediate_operand" "=r,k,r,r,r,r,r,*w,m, m,r,r, *w,r,*w,w")
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(match_operand:DI 1 "aarch64_mov_operand" " r,r,k,N,M,n,m, m,rZ,*w,Usa,Ush,rZ,w,*w,Dd"))]
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[(set (match_operand:DI 0 "nonimmediate_operand" "=r,k,r,r,r,r,r,w, m,m, r, r, w,r,w, w")
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(match_operand:DI 1 "aarch64_mov_operand" " r,r,k,N,M,n,m,m,rZ,w,Usa,Ush,rZ,w,w,Dd"))]
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"(register_operand (operands[0], DImode)
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|| aarch64_reg_or_zero (operands[1], DImode))"
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"@
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@ -1023,9 +1023,9 @@
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(define_insn "*movti_aarch64"
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[(set (match_operand:TI 0
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"nonimmediate_operand" "=r, *w,r ,*w,r,m,m,*w,m")
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"nonimmediate_operand" "=r, w,r,w,r,m,m,w,m")
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(match_operand:TI 1
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"aarch64_movti_operand" " rn,r ,*w,*w,m,r,Z, m,*w"))]
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"aarch64_movti_operand" " rn,r,w,w,m,r,Z,m,w"))]
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"(register_operand (operands[0], TImode)
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|| aarch64_reg_or_zero (operands[1], TImode))"
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"@
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