* config/i386/i386.c (ix86_decompose_address): Do not check for
register RTX when looking at index_reg or base_reg.
* config/i386/i386.h (INCOMING_RETURN_ADDR_RTX): Use stack_pointer_rtx.
From-SVN: r250526
* gimple.c (gimple_assign_set_rhs_with_ops): Do not ask gsi_replace
to update EH info here.
ada/
* checks.adb (Apply_Divide_Checks): Ensure that operands are not
evaluated twice.
From-SVN: r250525
2017-07-07 Torsten Duwe <duwe@suse.de>
c-family/
* c-attribs.c (c_common_attribute_table): Add entry for
"patchable_function_entry".
lto/
* lto-lang.c (lto_attribute_table): Add entry for
"patchable_function_entry".
* common.opt: Introduce -fpatchable-function-entry
command line option, and its variables function_entry_patch_area_size
and function_entry_patch_area_start.
* opts.c (common_handle_option): Add -fpatchable_function_entry_ case,
including a two-value parser.
* target.def (print_patchable_function_entry): New target hook.
* targhooks.h (default_print_patchable_function_entry): New function.
* targhooks.c (default_print_patchable_function_entry): Likewise.
* toplev.c (process_options): Switch off IPA-RA if
patchable function entries are being generated.
* varasm.c (assemble_start_function): Look at the
patchable-function-entry command line switch and current
function attributes and maybe generate NOP instructions by
calling the print_patchable_function_entry hook.
* doc/extend.texi: Document patchable_function_entry attribute.
* doc/invoke.texi: Document -fpatchable_function_entry
command line option.
* doc/tm.texi.in (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY):
New target hook.
* doc/tm.texi: Re-generate.
* c-c++-common/patchable_function_entry-default.c: New test.
* c-c++-common/patchable_function_entry-decl.c: Likewise.
* c-c++-common/patchable_function_entry-definition.c: Likewise.
From-SVN: r250521
PR target/81532
* config/i386/constraints.md (Yd, Ye): Use ALL_SSE_REGS for
TARGET_AVX512DQ rather than TARGET_AVX512BW.
* gcc.target/i386/pr80833-3.c: New test.
* gcc.target/i386/avx512dq-pr81532.c: New test.
* gcc.target/i386/avx512bw-pr81532.c: New test.
From-SVN: r250520
2017-07-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/81455
* tree-ssa-loop-unswitch.c (find_loop_guard): Make sure to
not walk in cycles when looking for guards.
* gcc.dg/pr81455.c: New testcase.
From-SVN: r250518
* dwarf2asm.c (dw2_asm_output_nstring): Encode double quote
character for AIX.
* dwarf2out.c (output_macinfo): Copy debug_line_section_label
to dl_section_ref. On AIX, append an expression to subtract
the size of the section length to dl_section_ref.
From-SVN: r250516
If config.{build,host,gcc} fails, configure currently silently
continues. This then makes it much harder than necessary to notice
you made a stupid pasto in config.gcc (and where exactly).
* configure.ac: If any of the config.* scripts fail, exit 1.
* configure: Regenerate.
From-SVN: r250507
2017-07-25 Richard Biener <rguenther@suse.de>
PR middle-end/81546
* tree-ssa-operands.c (verify_imm_links): Remove cap on number
of immediate uses, be more verbose on errors.
From-SVN: r250505
2017-07-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/81510
* tree-vect-loop.c (vect_is_simple_reduction): When the
reduction stmt is not inside the loop bail out.
* gcc.dg/torture/pr81510.c: New testcase.
* gcc.dg/torture/pr81510-2.c: Likewise.
From-SVN: r250504
* domwalk.c (cmp_bb_postorder): Simplify.
(sort_bbs_postorder): New function. Use it...
(dom_walker::walk): ...here to optimize common cases.
From-SVN: r250502
2017-07-25 Martin Liska <mliska@suse.cz>
PR ipa/81520
* ipa-visibility.c (function_and_variable_visibility): Make the redirection
just on target that do supporting aliasing. Fix GNU coding style.
2017-07-25 Martin Liska <mliska@suse.cz>
PR ipa/81520
* gcc.dg/ipa/pr81520.c: New test.
From-SVN: r250501
PR c/81364
* c-parser.c (c_parser_else_body): Don't warn about multistatement
macro expansion if the body is in { }.
(c_parser_while_statement): Likewise.
(c_parser_for_statement): Likewise.
* Wmultistatement-macros-12.c: New test.
From-SVN: r250498
PR target/81414
* config/aarch64/cortex-a57-fma-steering.c (analyze): Skip fmul/fmac
instructions if no du chain is found.
gcc/testsuite
* gcc.target/aarch64/pr81414.C: New.
From-SVN: r250496
2017-07-25 Richard Biener <rguenther@suse.de>
PR middle-end/81505
* fold-const.c (fold_negate_const): TREE_OVERFLOW should be
sticky.
* gcc.dg/ubsan/pr81505.c: New testcase.
From-SVN: r250494
2017-07-24 Daniel Santos <daniel.santos@pobox.com>
PR testsuite/80759
* gcc.target/x86_64/abi/ms-sysv/do-test.S
(ELFFN_BEGIN): Rename to FN_TYPE.
(ELFFN_END): Rename to FN_SIZE.
(ASMNAME): New macro.
(FUNC): Rename to FUNC_BEGIN, use ASMNAME and use .globl instead of
.global.
(FUNC_END): Use ASMNAME.
(test_data_save): Remove.
(test_data_input): Likewise.
(test_data_output: Likewise.
(test_data_fn): Likewise.
(test_data_retaddr): Likewise.
(regs_to_mem): Make globals, use r10 instead of rax.
(mem_to_regs): Likewise.
(do_test_unaligned): Remove .cfi directives, remove pushf/popf, move
body to ms-sysv.c.
(do_test_aligned): Likewise.
* gcc.target/x86_64/abi/ms-sysv/ms-sysv.c:
Add dg-* directives.
(PASTE_STR): New macro.
(ASMNAME): Likewise.
(LOAD_TEST_DATA_ADDR): Likewise.
(TEST_DATA_OFFSET): Likewise.
(do_test_body0): New C function.
(do_test_body): New inline assembly routine.
* gcc.target/x86_64/abi/ms-sysv/ms-sysv.exp
(runtest_ms_sysv): Modify.
From-SVN: r250489
2017-07-24 Daniel Santos <daniel.santos@pobox.com>
PR testsuite/80759
* config.host: include i386/t-msabi for darwin and solaris.
* config/i386/i386-asm.h
(ELFFN): Rename to FN_TYPE.
(FN_SIZE): New macro.
(FN_HIDDEN): Likewise.
(ASMNAME): Likewise.
(FUNC_START): Rename to FUNC_BEGIN, use ASMNAME, replace .global with
.globl.
(HIDDEN_FUNC): Use ASMNAME and .globl instead of .global.
(SSE_SAVE): Convert to cpp macro, hard-code offset (always 0x60).
* config/i386/resms64.S: Use SSE_SAVE as cpp macro instead of gas
.macro.
* config/i386/resms64f.S: Likewise.
* config/i386/resms64fx.S: Likewise.
* config/i386/resms64x.S: Likewise.
* config/i386/savms64.S: Likewise.
* config/i386/savms64f.S: Likewise.
From-SVN: r250488
Currently the emergency dump has no separation whatsoever from any
previous output in the dump file, making it harder than necessary
to find.
* passes.c (emergency_dump_function): Print some empty lines and a
header before the RTL dump.
From-SVN: r250481
Currently rtl_dump_bb crashes if BB_END(bb) is NULL, like it can be
during expand (rtl_dump_bb can be called at any time, by the emergency
dump added recently for example).
This fixes it.
* cfgrtl.c (rtl_dump_bb): Don't call NEXT_INSN on NULL.
From-SVN: r250480
Fix PR79041
As described in PR79041, -mcmodel=large -mpc-relative-literal-loads
may be used to avoid generating ADRP/ADD or ADRP/LDR. However both
trunk and GCC7 may still emit ADRP for some constant pool literals.
Fix this by adding a aarch64_pcrelative_literal_loads check.
gcc/
PR target/79041
* config/aarch64/aarch64.c (aarch64_classify_symbol):
Avoid SYMBOL_SMALL_ABSOLUTE for literals with pc-relative literals
gcc/testsuite/
* gcc.target/aarch64/pr79041-2.c: New test.
From-SVN: r250478
gcc/ChangeLog:
2017-07-24 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-c.c: Add support for built-in functions
vector float vec_extract_fp32_from_shorth (vector unsigned short);
vector float vec_extract_fp32_from_shortl (vector unsigned short);
* config/rs6000/altivec.h (vec_extract_fp_from_shorth,
vec_extract_fp_from_shortl): Add defines for the two builtins.
* config/rs6000/rs6000-builtin.def (VEXTRACT_FP_FROM_SHORTH,
VEXTRACT_FP_FROM_SHORTL): Add BU_P9V_OVERLOAD_1 and BU_P9V_VSX_1
new builtins.
* config/rs6000/vsx.md vsx_xvcvhpsp): Add define_insn.
(vextract_fp_from_shorth, vextract_fp_from_shortl): Add define_expands.
* doc/extend.texi: Update the built-in documentation file for the
new built-in function.
gcc/testsuite/ChangeLog:
2017-07-24 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-3-p9-runnable.c: Add new test file for
the new built-ins.
From-SVN: r250477
(On behalf of jackson.woodruff@arm.com)
This merges vector multiplies and adds into a single mla instruction
when the multiplication is done by a scalar.
typedef int __attribute__((vector_size(16))) vec;
vec
mla1(vec v0, vec v1, int v2)
{
return v0 + v1 * c;
}
Now generates:
mla1:
fmov s2, w0
mla v0.4s, v1.4s, v2.s[0]
This is also done for the identical case for a multiply followed by a
subtract of vectors with an integer operand on the multiply.
gcc/
2017-07-24 Jackson Woodruff <jackson.woodruff@arm.com>
* config/aarch64/aarch64-simd.md (aarch64_mla_elt_merge<mode>): New.
(aarch64_mls_elt_merge<mode>): Likewise.
gcc/testsuite/
2017-07-24 Jackson Woodruff <jackson.woodruff@arm.com>
* gcc.target/aarch64/simd/vmla_elem_1.c: New.
From-SVN: r250475
2017-07-24 Thomas Koenig <tkoenig@gcc.gnu.org>
Mikael Morin <mikael@gcc.gnu.org>
PR fortran/66102
* fortran/trans-array.c (gfc_conv_resolve_dependencies):
Break if dependency has been found.
2017-07-24 Thomas Koenig <tkoenig@gcc.gnu.org>
Mikael Morin <mikael@gcc.gnu.org>
PR fortran/66102
* gfortran.dg/realloc_on_assign_28.f90: New test.
Co-Authored-By: Mikael Morin <mikael@gcc.gnu.org>
From-SVN: r250471
2017-07-23 Michael Collison <michael.collison@arm.com>
Add optimized implementation of mersenne twister for aarch64
* config/cpu/aarch64/opt/ext/opt_random.h: New file.
(__arch64_recursion): New function.
(__aarch64_lsr_128): New function.
(__aarch64_lsl_128): New function.
(operator==): New function.
(simd_fast_mersenne_twister_engine): Implement
method _M_gen_rand.
* config/cpu/aarch64/opt/bits/opt_random.h: New file.
* include/ext/random: (simd_fast_mersenne_twister_engine):
add _M_state private array.
From-SVN: r250464
