* config/i386/x86-tune.def (X86_TUNE_SLOW_IMUL_IMM32_MEM,
X86_TUNE_SLOW_IMUL_IMM8): Keep enabled only for K8 and AMDFAM10.
(X86_TUNE_USE_VECTOR_FP_CONVERTS): Disable for generic.
From-SVN: r203876
2013-10-20 Chris Jefferson <chris@bubblescope.net>
Paolo Carlini <paolo.carlini@oracle.com>
PR libstdc++/58800
* include/bits/stl_algo.h (__unguarded_partition_pivot): Change
__last - 2 to __last - 1.
* testsuite/25_algorithms/nth_element/58800.cc: New
Co-Authored-By: Paolo Carlini <paolo.carlini@oracle.com>
From-SVN: r203872
2013-10-19 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (vspltis_constant): Make sure we check
all elements for both endian flavors.
From-SVN: r203863
PR target/58792
* config/i386/i386.c (ix86_function_value_regno): Add DX_REG,
ST1_REG and XMM1_REG for 32bit and 64bit targets. Also add DI_REG
and SI_REG for 64bit SYSV ABI targets.
From-SVN: r203857
* mode-switching.c (create_pre_exit): Rename maybe_builtin_apply
to multi_reg_return. Clarify that we are skipping USEs of multiple
return registers. Use bool type where appropriate.
From-SVN: r203856
* gcc-interface/utils.c (scale_by_factor_of): New function.
(rest_of_record_type_compilation): Use scale_by_factor_of in order to
scale the original offset for both rounding cases; in the second case,
take into accout the addend to compute the alignment. Tidy up.
From-SVN: r203852
2013-10-18 Teresa Johnson <tejohnson@google.com>
* predict.c (probably_never_executed): Compare frequency-based
count to number of training runs.
* params.def (UNLIKELY_BB_COUNT_FRACTION): New parameter.
From-SVN: r203830
* tree-ssa-threadupdate.c: Do not include "tm.h" or "tm_p.h".
* tree-ssa-threadupdate.c: Include "dbgcnt.h".
(register_jump_thread): Add "registered_jump_thread" debug counter support.
* dbgcnt.def (registered_jump_thread): New debug counter.
From-SVN: r203825
2013-10-18 Richard Biener <rguenther@suse.de>
* stor-layout.c (layout_type): Do not change TYPE_PRECISION
or TYPE_UNSIGNED of integral types.
(set_min_and_max_values_for_integral_type): Leave TYPE_MIN/MAX_VALUE
NULL_TREE for zero-precision integral types.
From-SVN: r203813
2013-10-03 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p8vector-fp.c: New test for floating point
scalar operations when using -mupper-regs-sf and -mupper-regs-df.
* gcc.target/powerpc/ppc-target-1.c: Update tests to allow either
VSX scalar operations or the traditional floating point form of
the instruction.
* gcc.target/powerpc/ppc-target-2.c: Likewise.
* gcc.target/powerpc/recip-3.c: Likewise.
* gcc.target/powerpc/recip-5.c: Likewise.
* gcc.target/powerpc/pr72747.c: Likewise.
* gcc.target/powerpc/vsx-builtin-3.c: Likewise.
From-SVN: r203800
2013-10-17 Charles Bayis <charles.baylis@linaro.org>
* gcc.dg/builtin-apply2.c: Skip test on arm hardfloat ABI targets.
* gcc.dg/tls/pr42894.c: Remove dg-options for arm*-*-* targets.
* gcc.target/arm/thumb-ltu.c: Remove dg-skip-if and require
effective target arm_thumb1_ok.
* lib/target-supports.exp
(check_effective_target_arm_fp16_ok_nocache): Don't force
-mfloat-abi=soft when building for hardfloat target.
From-SVN: r203799
2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new
fields to the reg_addr array that describes the valid addressing
mode for any register, general purpose registers, floating point
registers, and Altivec registers.
(FIRST_RELOAD_REG_CLASS): Likewise.
(LAST_RELOAD_REG_CLASS): Likewise.
(struct reload_reg_map_type): Likewise.
(reload_reg_map_type): Likewise.
(RELOAD_REG_VALID): Likewise.
(RELOAD_REG_MULTIPLE): Likewise.
(RELOAD_REG_INDEXED): Likewise.
(RELOAD_REG_OFFSET): Likewise.
(RELOAD_REG_PRE_INCDEC): Likewise.
(RELOAD_REG_PRE_MODIFY): Likewise.
(reg_addr): Likewise.
(mode_supports_pre_incdec_p): New helper functions to say whether
a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY.
(mode_supports_pre_modify_p): Likewise.
(rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to
print the valid address mode bits for each mode.
(rs6000_debug_print_mode): Likewise.
(rs6000_debug_reg_global): Likewise.
(rs6000_setup_reg_addr_masks): New function to set up the address
mask bits for each type.
(rs6000_init_hard_regno_mode_ok): Use memset to clear arrays.
Call rs6000_setup_reg_addr_masks to set up the address mask bits.
(rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and
mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and
PRE_MODIFY are supported.
(rs6000_output_move_128bit): Change to use {src,dest}_vmx_p for altivec
registers, instead of {src,dest}_av_p.
(rs6000_print_options_internal): Tweak the debug output slightly.
From-SVN: r203791
2013-10-07 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new
fields to the reg_addr array that describes the valid addressing
mode for any register, general purpose registers, floating point
registers, and Altivec registers.
(FIRST_RELOAD_REG_CLASS): Likewise.
(LAST_RELOAD_REG_CLASS): Likewise.
(struct reload_reg_map_type): Likewise.
(reload_reg_map_type): Likewise.
(RELOAD_REG_VALID): Likewise.
(RELOAD_REG_MULTIPLE): Likewise.
(RELOAD_REG_INDEXED): Likewise.
(RELOAD_REG_OFFSET): Likewise.
(RELOAD_REG_PRE_INCDEC): Likewise.
(RELOAD_REG_PRE_MODIFY): Likewise.
(reg_addr): Likewise.
(mode_supports_pre_incdec_p): New helper functions to say whether
a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY.
(mode_supports_pre_modify_p): Likewise.
(rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to
print the valid address mode bits for each mode.
(rs6000_debug_print_mode): Likewise.
(rs6000_debug_reg_global): Likewise.
(rs6000_setup_reg_addr_masks): New function to set up the address
mask bits for each type.
(rs6000_init_hard_regno_mode_ok): Use memset to clear arrays.
Call rs6000_setup_reg_addr_masks to set up the address mask bits.
(rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and
mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and
PRE_MODIFY are supported.
(rs6000_print_options_internal): Tweak the debug output slightly.
From-SVN: r203790
Jan Hubicka
Tim Shen
Chris Jefferson
Richard Sandiford
GCC Administrator
John David Anglin
Bill Schmidt
Mike Stump
Oleg Endo
Uros Bizjak
Uros Bizjak
Thomas Quinot
Eric Botcazou
Cong Hou
Edward Smith-Rowland
Paolo Carlini
Andrew MacLeod
Teresa Johnson
Kyrylo Tkachov
Jeff Law
Ian Lance Taylor
Andrew Macleod
Jan-Benedict Glaw
Richard Biener
James Greenhalgh
Ian Lance Taylor
Hans-Peter Nilsson
Sriraman Tallam
Michael Meissner
Charles Baylis
Michael Meissner