My patch that added initial C2X support and associated command-line
options missed documenting -Wc11-c2x-compat although the other options
were properly documented. This patch adds the missing documentation.
Tested with "make info" and "make pdf".
* doc/invoke.texi (-Wc11-c2x-compat): Document.
From-SVN: r278510
GCC currently defaults to -fcommon. As discussed in the PR, this is an ancient
C feature which is not conforming with the latest C standards. On many targets
this means global variable accesses have a codesize and performance penalty.
This applies to C code only, C++ code is not affected by -fcommon. It is about
time to change the default.
gcc/
PR85678
* common.opt (fcommon): Change init to 1.
* invoke.texi (-fcommon): Update documentation.
testsuite/
* g++.dg/lto/odr-6_1.c: Add -fcommon.
* gcc.dg/alias-15.c: Likewise.
* gcc.dg/fdata-sections-1.c: Likewise.
* gcc.dg/ipa/pr77653.c: Likewise.
* gcc.dg/lto/20090729_0.c: Likewise.
* gcc.dg/lto/20111207-1_0.c: Likewise.
* gcc.dg/lto/c-compatible-types-1_0.c: Likewise.
* gcc.dg/lto/pr55525_0.c: Likewise.
* gcc.dg/lto/pr88077_0.c: Use long to avoid alignment warning.
* gcc.dg/lto/pr88077_1.c: Add -fcommon.
* gcc.target/aarch64/sve/peel_ind_1.c: Allow ANCHOR0.
* gcc.target/aarch64/sve/peel_ind_2.c: Likewise.
* gcc.target/aarch64/sve/peel_ind_3.c: Likewise.
* gcc.target/i386/volatile-bitfields-2.c: Allow movl or movq.
From-SVN: r278509
Add flags to find libatomic in build-tree testing, fixing a catastrophic
libgomp testsuite failure with `riscv*-*-linux*' targets, which imply
`-latomic' with the `-pthread' GCC option, implied in turn by the
`-fopenacc' and `-fopenmp' options, removing failures like:
.../bin/riscv64-linux-gnu-ld: cannot find -latomic
collect2: error: ld returned 1 exit status
compiler exited with status 1
FAIL: libgomp.c/../libgomp.c-c++-common/atomic-18.c (test for excess errors)
Excess errors:
.../bin/riscv64-linux-gnu-ld: cannot find -latomic
UNRESOLVED: libgomp.c/../libgomp.c-c++-common/atomic-18.c compilation failed to produce executable
and bringing overall test results for the `riscv64-linux-gnu' target
(here with the `x86_64-linux-gnu' host and RISC-V QEMU in the Linux user
emulation mode as the target board) from:
=== libgomp Summary ===
# of expected passes 90
# of unexpected failures 3267
# of expected failures 2
# of unresolved testcases 3247
# of unsupported tests 548
to:
=== libgomp Summary ===
# of expected passes 6834
# of unexpected failures 4
# of expected failures 4
# of unsupported tests 518
libgomp/
* testsuite/lib/libgomp.exp (libgomp_init): Add flags to find
libatomic in build-tree testing.
From-SVN: r278505
* lto-streamer-out.c (DFS::sccstack): Turn into auto-vec.
Preallocate for 32 entries.
(DFS::worklist): Likewise.
(DFS::DFS): Do not initialize sccstack and worklist.
(DFS::~DFS): Do not release sccstack.
From-SVN: r278498
This is the analogue of r278103, but for DFP.
PR target/92573
* config/rs6000/dfp.md (dfptstsfi_<code>_<mode> for DFP_TEST and DDTD):
Handle UNORDERED if !HONOR_NANS.
From-SVN: r278497
* ipa-inline.c (wrapper_heuristics_may_apply): Break out from ...
(edge_badness): ... here.
(inline_small_functions): Use monotonicity of badness calculation
to avoid redundant updates.
From-SVN: r278496
2019-11-20 Richard Biener <rguenther@suse.de>
* tree-vect-slp.c (vect_analyze_slp_instance): Dump
constructors we are actually analyzing.
(vect_slp_check_for_constructors): Do not vectorize uniform
constuctors, do not dump here.
* gcc.dg/vect/bb-slp-42.c: Adjust.
* gcc.dg/vect/bb-slp-40.c: Likewise.
From-SVN: r278495
In asm-flag-4.c, we need to use dg-message instead of dg-error because
we have to match "sorry, unimplemented:" rather than "error:". In
asm-flag-5.c, fix the dg-error syntax.
2019-11-20 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/arm/asm-flag-4.c: Replace dg-error with dg-message.
* gcc.target/arm/asm-flag-5.c: Add quotes around dg-error
messages.
From-SVN: r278487
PR c++/90767
* call.c (complain_about_no_candidates_for_method_call): If
conv->from is not a type, pass to complain_about_bad_argument
lvalue_type of conv->from.
* g++.dg/diagnostic/pr90767-1.C: New test.
* g++.dg/diagnostic/pr90767-2.C: New test.
From-SVN: r278484
PR middle-end/90840
* expmed.c (store_bit_field_1): Handle the case where op0 is not a MEM
and has a mode that doesn't have corresponding integral type.
* gcc.c-torture/compile/pr90840.c: New test.
From-SVN: r278483
PR target/90867
* config/i386/i386-options.c (ix86_valid_target_attribute_tree): Don't
clear opts->x_ix86_isa_flags{,2} here...
(ix86_valid_target_attribute_inner_p): ... but here when seeing
arch=. Also clear opts->x_ix86_isa_flags{,2}_explicit.
* gcc.target/i386/pr90867.c: New test.
From-SVN: r278482
PR c/90898
* tree-ssa-ccp.c (insert_clobber_before_stack_restore): Remove
assertion.
(insert_clobbers_for_var): Fix a typo in function comment.
* gcc.dg/pr90898.c: New test.
From-SVN: r278481
PR middle-end/91195
* tree-ssa-phiopt.c (cond_store_replacement): Move lhs unsharing
earlier. Set TREE_NO_WARNING on the rhs1 of the artificially added
load.
* gcc.dg/pr91195.c: New test.
From-SVN: r278479
The standard [[]] attributes currently defined in C2x are all not
valid on types not being defined at the time.
Use on such types results in a warning from attribs.c about attributes
appertaining to types (the warning that I think is bogus in general
for both C and C++, applying as it does to all [[]] attributes
including gnu:: ones that are perfectly meaningful on types not being
defined and work fine when __attribute__ syntax is used instead). If
that warning is removed (as I intend to do in a subsequent patch),
warnings may or may not result from the attribute handlers, depending
on whether those particular attribute handlers consider the attributes
meaningful in such a context. In C, however, the rules about where
each [[]] attribute is valid are constraints, so a pedwarn, not a
warning, is required.
Because some handlers are shared between standard and gnu::
attributes, there can be cases that are valid for the GNU attribute
variant but not for the standard one. So in general it is not correct
to rely on the attribute handlers to give all required pedwarns
(although in some cases, a pedwarn in the attribute handler is in
appropriate way of diagnosing an invalid use); they not have the
information about whether the attribute was a gnu:: one and can
legitimately accept a wider range of uses for the gnu:: attributes.
This patch ensures appropriate diagnostics for invalid uses of C2x
standard attributes on types, and so helps pave the way for the
subsequent removal of the bogus check in attribs.c, by adding a check
run in the front end before calling decl_attributes; this check
removes the attributes from the list after calling pedwarn to avoid
subsequent duplicate warnings.
Bootstrapped with no regressions for x86_64-pc-linux-gnu.
gcc/c:
* c-decl.c (c_warn_type_attributes): New function.
(groktypename, grokdeclarator, finish_declspecs): Call
c_warn_type_attributes before applying attributes to types.
* c-tree.h (c_warn_type_attributes): Declare.
gcc/testsuite:
* gcc.dg/c2x-attr-deprecated-2.c, gcc.dg/c2x-attr-fallthrough-2.c,
gcc.dg/c2x-attr-maybe_unused-2.c: Expect errors for invalid uses
of standard attributes on types. Add more tests of invalid uses
on types.
From-SVN: r278471
PR c++/92414
* constexpr.c (cxx_eval_outermost_constant_expr): If DECL_INITIAL
on object is erroneous, return t without trying to evaluate
a constexpr dtor.
* g++.dg/cpp2a/constexpr-dtor4.C: New test.
From-SVN: r278468
The C++ committee continues to discuss how best to avoid breaking existing
code with the new rules for reversed operators. A recent suggestion was to
base the tie-breaker on the parameter types of the candidates, which made a
lot of sense to me, so this patch implements that.
This patch also mentions that a candidate was reversed or rewritten when
printing the list of candidates, and warns about a comparison that becomes
recursive under the new rules. There is no flag for this warning; people
can silence it by swapping the operands.
* call.c (same_fn_or_template): Change to cand_parms_match.
(joust): Adjust.
(print_z_candidate): Mark rewritten/reversed candidates.
(build_new_op_1): Warn about recursive call with reversed arguments.
From-SVN: r278465
* config/rs6000/rs6000.c (move_to_end_of_ready): New, factored out
from common code.
(power6_sched_reorder2): Factored out from rs6000_sched_reorder2,
call new function.
(power9_sched_reorder2): Call new function.
(rs6000_sched_reorder2): Likewise.
From-SVN: r278463
This patch tightens the instruction definitions to make sure
that MSA branch instructions cannot be put into delay slots and have their
delay slots eligible for being filled. Also, MSA *div*3 patterns use MSA
branches for zero checks but are not marked as being multi instruction and
thus could be put into delay slots. This patch fixes that.
gcc/ChangeLog:
2019-11-19 Zoran Jovanovic <zoran.jovanovic@mips.com>
Dragan Mladjenovic <dmladjenovic@wavecomp.com>
* config/mips/mips-msa.md (msa_<msabr>_<msafmt_f>, msa_<msabr>_v_<msafmt_f>):
Mark as not having "likely" version.
* config/mips/mips.md (insn_count): The simd_div instruction with
TARGET_CHECK_ZERO_DIV consists of 3 instructions.
(can_delay): Exclude simd_branch.
(defile_delay *): Add simd_branch instructions.
They have one regular delay slot.
gcc/testsuite/ChangeLog:
2019-11-19 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
* gcc.target/mips/msa-ds.c: New test.
From-SVN: r278458
To restore powerpc bootstrap.
2019-11-19 Richard Sandiford <richard.sandiford@arm.com>
gcc/
Revert:
2019-11-18 Richard Sandiford <richard.sandiford@arm.com>
* cse.c (cse_insn): Delete no-op register moves too.
* simplify-rtx.c (comparison_to_mask): Handle unsigned comparisons.
Take a second comparison to control the value for NE.
(mask_to_comparison): Handle unsigned comparisons.
(simplify_logical_relational_operation): Likewise. Update call
to comparison_to_mask. Handle AND if !HONOR_NANs.
(simplify_binary_operation_1): Call the above for AND too.
gcc/testsuite/
Revert:
2019-11-18 Richard Sandiford <richard.sandiford@arm.com>
* gcc.target/aarch64/sve/acle/asm/ptest_pmore.c: New test.
From-SVN: r278455
PR79262 has been fixed for almost all AArch64 cpus, however the example is still
vectorized in a few cases, resulting in lower performance. Adjust the vector
cost slightly so that so that -mcpu=cortex-a53 now has identical performance as
-mcpu=cortex-a57 on libquantum.
gcc/
PR target/79262
* config/aarch64/aarch64.c (generic_vector_cost): Adjust
vec_to_scalar_cost.
From-SVN: r278452
PR c++/89913
gcc/cp/
* pt.c (get_underlying_template): Exit loop if the original type
of the alias is null.
gcc/testsuite/
* g++.dg/cpp2a/pr89913.C: New test.
From-SVN: r278451
gcc/cp/
* pt.c (tsubst_copy_and_build): Perform the first substitution without
diagnostics and a second only if tsubst_requries_expr returns an error.
From-SVN: r278449
2019-11-19 Martin Liska <mliska@suse.cz>
* toplev.c (general_init): Move the call...
(toplev::main): ... here as we need init_options_struct
being called.
From-SVN: r278448
By default Armv7-A tunes for Cortex-A8. This is an ancient core
today and the settings are no longer useful for newer cores. So
switch to Cortex-A53 tuning since it works well across a wide range
of modern cores.
On SPECINT2006 the performance gain is 0.7% compared to Cortex-A8 tuning,
and codesize reduces by 0.2%.
gcc/
* config/arm/arm-cpus.in (armv7): Set tune to Cortex-A53.
(armv7-a): Likewise.
(armv7ve): Likewise.
From-SVN: r278447
2019-11-19 Richard Biener <rguenther@suse.de>
PR tree-optimization/92581
* tree-vect-loop.c (vect_create_epilog_for_reduction): For
condition reduction chains gather all conditions involved
for computing the index reduction vector.
* gcc.dg/vect/vect-cond-reduc-5.c: New testcase.
From-SVN: r278445
Thumb1 cannot support asm-flags currently, because we don't expose the
flags register to the compiler. Disable the support for that case.
Adjust the asm-flag-6 test for aarch64 ilp32 correctness.
gcc/
* config/arm/arm-c.c (arm_cpu_builtins): Use def_or_undef_macro
to define __GCC_ASM_FLAG_OUTPUTS__.
* config/arm/arm.c (thumb1_md_asm_adjust): New function.
(arm_option_params_internal): Swap out targetm.md_asm_adjust
depending on TARGET_THUMB1.
* doc/extend.texi (FlagOutputOperands): Document thumb1 restriction.
gcc/testsuite/
* testsuite/gcc.target/arm/asm-flag-3.c: Skip for thumb1.
* testsuite/gcc.target/arm/asm-flag-5.c: Likewise.
* testsuite/gcc.target/arm/asm-flag-6.c: Likewise.
* testsuite/gcc.target/arm/asm-flag-4.c: New test.
* testsuite/gcc.target/aarch64/asm-flag-6.c: Use %w for
asm inputs to cmp instruction for ILP32.
From-SVN: r278443
PR middle-end/91450
* internal-fn.c (expand_mul_overflow): For s1 * s2 -> ur, if one
operand is negative and one non-negative, compare the non-negative
one against 0 rather than comparing s1 & s2 against 0. Otherwise,
don't compare (s1 & s2) == 0, but compare separately both s1 == 0
and s2 == 0, unless one of them is known to be negative. Remove
tem2 variable, use tem where tem2 has been used before.
* gcc.c-torture/execute/pr91450-1.c: New test.
* gcc.c-torture/execute/pr91450-2.c: New test.
From-SVN: r278437
PR tree-optimization/92557
* omp-low.c (omp_clause_aligned_alignment): Punt if TYPE_MODE is not
vmode rather than asserting it always is.
* gcc.dg/gomp/pr92557.c: New test.
From-SVN: r278432
