Commit Graph

183252 Commits

Author SHA1 Message Date
Jonathan Wright
1d6228454c aarch64: Use RTL builtins for [su]mull_high_n intrinsics
Rewrite [su]mull_high_n Neon intrinsics to use RTL builtins rather
than inline assembly code, allowing for better scheduling and
optimization.

gcc/ChangeLog:

2021-02-03  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add [su]mull_hi_n
	builtin generator macros.
	* config/aarch64/aarch64-simd.md
	(aarch64_<su>mull_hi_n<mode>_insn): Define.
	(aarch64_<su>mull_hi_n<mode>): Define.
	* config/aarch64/arm_neon.h (vmull_high_n_s16): Use RTL builtin
	instead of inline asm.
	(vmull_high_n_s32): Likewise.
	(vmull_high_n_u16): Likewise.
	(vmull_high_n_u32): Likewise.
2021-02-04 13:56:50 +00:00
Richard Biener
7002a33d1b tree-optimization/98855 - fix some vectorizer cost issues
This fixes us not costing vectorized bswap for SLP as well as
avoiding biasing to the vectorized side when costing single-argument
PHIs.  Instead we assume coalescing here and cost them with zero cost
for both the scalar and vectorized code.

This doesn't fix the PR on its own.

2021-02-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98855
	* tree-vect-loop.c (vectorizable_phi): Do not cost
	single-argument PHIs.
	* tree-vect-slp.c (vect_bb_slp_scalar_cost): Likewise.
	* tree-vect-stmts.c (vectorizable_bswap): Also perform
	costing for SLP operation.
2021-02-04 13:02:09 +01:00
Tobias Burnus
f0e618faeb Fortran: OpenMP/OpenACC diagnose substring rejections better
gcc/fortran/ChangeLog:

	* openmp.c (resolve_omp_clauses): Explicitly diagnose
	substrings as not permitted.

gcc/testsuite/ChangeLog:

	* gfortran.dg/goacc/substring.f90: New test.
	* gfortran.dg/gomp/substring.f90: New test.
2021-02-04 12:32:59 +01:00
Martin Liska
5eb792e7a1 doc: mention -mprefer-vector-width in target attrs
gcc/ChangeLog:

	* doc/extend.texi: Mention -mprefer-vector-width in target
	attributes.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/prefer-vector-width-attr.c: New test.
2021-02-04 10:42:10 +01:00
Jason Merrill
787f3ebf00 c++: No aggregate CTAD with explicit dguide [PR98802]
In my implementation of P2082R1 I missed this piece: the aggregate deduction
candidate is not generated if the class has user-written deduction guides.

gcc/cp/ChangeLog:

	PR c++/98802
	* pt.c (do_class_deduction): No aggregate guide if any_dguides_p.

gcc/testsuite/ChangeLog:

	PR c++/98802
	* g++.dg/cpp1z/class-deduction78.C: New test.
2021-02-03 22:03:40 -05:00
Jason Merrill
7b258ac7af c++: subst failure in attribute argument [PR95192]
Another SFINAE issue: we weren't propagating substitution failure in
attributes back up.  And tsubst_function_decl needs to check substitution
before register_specialization.  I thought about moving the other error
returns up as well, but they aren't SFINAE cases, so they can stay where
they are.

This change caused pr84630.C to stop giving an error; this was because
partial instantiation of the lambda failed silently, and before the change
that meant error_mark_node passed to decl_attributes, which complained about
there being an argument at all.  With the change the partial instantiation
fails, but no error was ever given, because push_template_decl silently
failed if current_template_parms wasn't set.  So let's set c_t_p
appropriately.  lambda-uneval13.C is a valid testcase to exercise this.

gcc/cp/ChangeLog:

	PR c++/95192
	* pt.c (tsubst_attribute): Handle error.
	(apply_late_template_attributes): Return false on error.
	(tsubst_function_decl): Check its return value.
	(tsubst_decl): Likewise.
	(push_template_decl): Assert current_template_parms.
	(tsubst_template_decl): Set current_template_parms.

gcc/testsuite/ChangeLog:

	PR c++/95192
	* g++.dg/cpp0x/pr84630.C: Call b().
	* g++.dg/cpp2a/lambda-uneval13.C: New test.
	* g++.dg/ext/attr-expr1.C: New test.
2021-02-03 21:38:33 -05:00
GCC Administrator
9faaa80776 Daily bump. 2021-02-04 00:16:32 +00:00
Jakub Jelinek
ac16f4327f libcpp: Fix up -fdirectives-only preprocessing [PR98882]
GCC 11 ICEs on all -fdirectives-only preprocessing when the files don't end
with a newline.

The problem is in the assertion, for empty TUs buffer->cur == buffer->rlimit
and so buffer->rlimit[-1] access triggers UB in the preprocessor, for
non-empty TUs it refers to the last character in the file, which can be
anything.
The preprocessor adds a '\n' character (or '\r', in particular if the
user file ends with '\r' then it adds another '\r' rather than '\n'), but
that is added after the limit, i.e. at buffer->rlimit[0].

Now, if the routine handles occassional bumping of pos to buffer->rlimit + 1,
I think it is just the assert that needs changing, usually we read from *pos
if pos < limit and then e.g. if it is '\r', look at the following character
(which could be one of those '\n' or '\r' at buffer->rlimit[0]).  There is
also the case where for '\\' before the limit we read following character
and if it is '\n', do one thing, if it is '\r' read another character.
But in that case if '\\' was the last char in the TU, the limit char will be
'\n', so we are ok.

2021-02-03  Jakub Jelinek  <jakub@redhat.com>

	PR preprocessor/98882
	* lex.c (cpp_directive_only_process): Don't assert that rlimit[-1]
	is a newline, instead assert that rlimit[0] is either newline or
	carriage return.  When seeing '\\' followed by '\r', check limit
	before accessing pos[1].

	* gcc.dg/cpp/pr98882.c: New test.
2021-02-03 23:18:05 +01:00
Jeff Law
34215a7a3a Fix typo in Fortran manual
gcc/fortran:
	* intrinsic.texi (ANINT): Fix typo.
2021-02-03 15:01:19 -07:00
Iain Buclaw
b1a207c6df libphobos: Merge upstream druntime 9d0c8364, phobos 9d575282e.
Druntime changes:

 - Add platform-specific bindings for stdlib.h and sys/syctl.h.

 - Add darwin bindings for mach/dyld.h.

 - Fix solaris bindings for locale.h (PR98910).

 - Remove deprecated bindings from the module headers.

Phobos changes:

 - Backport platform-specific fixes for std.conv, std.datetime,
   std.exception, std.experimental.allocator, std.file, std.math,
   std.parallelism, std.socket, std.stdio, and std.system.

Reviewed-on: https://github.com/dlang/druntime/pull/3363
	     https://github.com/dlang/phobos/pull/7784

libphobos/ChangeLog:

	PR d/98910
	* libdruntime/MERGE: Merge upstream druntime 9d0c8364.
	* libdruntime/Makefile.am (DRUNTIME_DSOURCES): Add
	  core/internal/attributes.d
	(DRUNTIME_DSOURCES_BIONIC): Add core/sys/bionic/stdlib.d.
	(DRUNTIME_DSOURCES_DARWIN): Add core/sys/darwin/stdlib.d, and
	core/sys/darwin/sys/sysctl.d.
	(DRUNTIME_DSOURCES_DRAGONFLYBSD): Add
	core/sys/dragonflybsd/stdlib.d, and
	core/sys/dragonflybsd/sys/sysctl.d.
	(DRUNTIME_DSOURCES_FREEBSD): Add core/sys/freebsd/stdlib.d, and
	core/sys/freebsd/sys/sysctl.d.
	(DRUNTIME_DSOURCES_NETBSD): Add core/sys/netbsd/stdlib.d, and
	core/sys/netbsd/sys/sysctl.d.
	(DRUNTIME_DSOURCES_OPENBSD): Add core/sys/openbsd/stdlib.d, and
	core/sys/openbsd/sys/sysctl.d.
	(DRUNTIME_DSOURCES_SOLARIS): Add core/sys/solaris/stdlib.d.
	* libdruntime/Makefile.in: Regenerate.
	* src/MERGE: Merge upstream phobos 9d575282e.
2021-02-03 22:06:42 +01:00
Marek Polacek
b52a1dfe12 c++: Mark member functions as const [PR98951]
These member functions look like they could be marked const, since
they don't modify any (non-mutable) class members.

	PR c++/98951
	* call.c (struct z_candidate): Mark rewritten and reversed as const.
	(struct NonPublicField): Mark operator() as const.
	(struct NonTrivialField): Likewise.
2021-02-03 13:24:40 -05:00
Jason Merrill
5c62e4f255 c++: Fix alias comparison [PR98926]
The comparison of dependent aliases wasn't working here because
processing_template_decl wasn't set, so dependent_alias_template_spec_p was
always returning false.

gcc/cp/ChangeLog:

	PR c++/98926
	PR c++/98570
	* pt.c (spec_hasher::equal): Set processing_template_decl.
	* Make-lang.in (check-g++-strict-gc): Add --param
	hash-table-verification-limit=10000.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/alias-decl-dr1558.C: Pass --param
	hash-table-verification-limit=10000.
2021-02-03 12:50:18 -05:00
Martin Sebor
5c3d388aee PR tree-optimization/98937 - pointer_query cache leaks
gcc/ChangeLog:

	PR tree-optimization/98937
	* tree-ssa-strlen.c (strlen_dom_walker::~strlen_dom_walker): Define.
	Flush pointer_query cache.
2021-02-03 10:23:53 -07:00
Ed Smith-Rowland
1f69e63cfc c++: Implement C++23 P0330 - Literal Suffixes for ptrdiff_t and size_t.
Integer literal suffixes for signed size ('z') and unsigned size
(some permutation od 'zu') are provided as a language addition.

gcc/c-family/ChangeLog:

	* c-cppbuiltin.c (c_cpp_builtins): Define __cpp_size_t_suffix.
	* c-lex.c (interpret_integer): Set node type for size literal.

libcpp/ChangeLog:

	* expr.c (interpret_int_suffix): Detect 'z' integer suffix.
	(cpp_classify_number): Compat warning for use of 'z' suffix.
	* include/cpplib.h (struct cpp_options): New flag.
	(enum cpp_warning_reason): New flag.
	(CPP_N_USERDEF): Comment C++0x -> C++11.
	(CPP_N_SIZE_T): New flag for cpp_classify_number.
	* init.c (cpp_set_lang): Initialize new flag.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/udlit-shadow-neg.C: Test for 'z' and 'zu' shadowing.
	* g++.dg/cpp23/feat-cxx2b.C: New test.
	* g++.dg/cpp23/size_t-literals.C: New test.
	* g++.dg/warn/Wsize_t-literals.C: New test.
2021-02-03 12:12:31 -05:00
Ian Lance Taylor
530203d6e3 libgo: install new 1.16 packages
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/289069
2021-02-03 08:47:28 -08:00
Jakub Jelinek
c926940f52 testsuite: Add test for already fixed PR [PR97804]
This testcase got fixed with the PR98463
r11-6895-g94ff4c9dd98f39280fba22d1ad0958fb25a5363b fix.

2021-02-03  Jakub Jelinek  <jakub@redhat.com>

	PR c++/97804
	* g++.dg/cpp2a/no_unique_address11.C: New test.
2021-02-03 17:16:40 +01:00
Jonathan Wakely
a6f08be383 libstdc++: Fix incorrect test for std::error_code comparisons
The tests for std::error_code comparisons assumed that a default
constructed object uses std::generic_category(). That's true for a
default constructed std::error_condition, but not std::error_code.

Fix the three-way comparisons to correctly depend on the result of
comparing the categories, and add another test for comparing two objects
with the same category and different values.

libstdc++-v3/ChangeLog:

	* testsuite/19_diagnostics/error_code/operators/not_equal.cc:
	Add comparison with same category and different values.
	* testsuite/19_diagnostics/error_code/operators/less.cc:
	Likewise. Fix comparison involving different categories.
	* testsuite/19_diagnostics/error_code/operators/three_way.cc:
	Likewise.
	* testsuite/19_diagnostics/error_condition/operators/less.cc:
	Add comment.
	* testsuite/19_diagnostics/error_condition/operators/three_way.cc:
	Likewise.
2021-02-03 15:49:36 +00:00
yaozhongxiao
5988765741 libstdc++: Improve "find_first/last_set" for NEON
The find_first_set and find_last_set method is not optimal for neon, it
needs to be improved by synthesized with horizontal adds(vaddv) which
will reduce the generated assembly code. In the following cases,
vaddvq_s16 will generate 2 instructions but vpadd_s16 will generate 4
instructions:

 # vaddvq_s16
    vaddvq_s16(__asint);
    //  addv    h0, v1.8h
    //  smov    w1, v0.h[0]
 # vpadd_s16
    vpaddq_s16(vpaddq_s16(vpaddq_s16(__asint, __zero), __zero), __zero)[0]
    // addp v1.8h,v1.8h,v2.8h
    // addp v1.8h,v1.8h,v2.8h
    // addp v1.8h,v1.8h,v2.8h
    // smov    w1, v1.h[0]
 #

libstdc++-v3/ChangeLog:

	* include/experimental/bits/simd_neon.h: Replace repeated vpadd
	calls with a single vaddv for aarch64.
2021-02-03 15:49:30 +00:00
Matthias Kretz
3de9bd16c9 libstdc++: Work around test failures using -mno-tree-vrp
This is necessary to avoid failures resulting from PR98834.

libstdc++-v3/ChangeLog:

	* testsuite/Makefile.am: Warn about the workaround. Add
	-fno-tree-vrp to CXXFLAGS passed to the check_simd script.
	Improve initial user feedback from make check-simd.
	* testsuite/Makefile.in: Regenerated.
2021-02-03 15:49:30 +00:00
Matthias Kretz
4b940ccee1 libstc++: Implement hmin and hmax
From 9.7.4 in Parallelism TS 2. For some reason I overlooked these two
functions. Implement them via call to _S_reduce.

libstdc++-v3/ChangeLog:

	* include/experimental/bits/simd.h: Add __detail::_Minimum and
	__detail::_Maximum to use them as _BinaryOperation to _S_reduce.
	Add hmin and hmax overloads for simd and const_where_expression.
	* include/experimental/bits/simd_scalar.h
	(_SimdImplScalar::_S_reduce): Make unused _BinaryOperation
	parameter const-ref to allow calling _S_reduce with an rvalue.
	* testsuite/experimental/simd/tests/reductions.cc: Add tests for
	hmin and hmax. Since the compiler statically determined that all
	tests pass, repeat the test after a call to make_value_unknown.
2021-02-03 15:49:30 +00:00
Matthias Kretz
af60e4bd4b libstdc++: Improve test codegen for interpreting assembly
In many failure cases it is helpful to inspect the instructions leading
up to the test failure. After this change the location is easier to find
and the branch after failure is easier to find.

libstdc++-v3/ChangeLog:

	* testsuite/experimental/simd/tests/bits/verify.h (verify): Add
	instruction pointer data member. Ensure that the `if (m_failed)`
	branch is always inlined into the calling code. The body of the
	conditional can still be a function call. Move the get_ip call
	into the verify ctor to simplify the ctor calls.
	(COMPARE): Don't mention the use of all_of for reduction of a
	simd_mask. It only distracts from the real issue.
2021-02-03 15:49:30 +00:00
Matthias Kretz
8f7ad98651 libstdc++: Support timeout and timeout-factor options
libstdc++-v3/ChangeLog:

	* testsuite/experimental/simd/driver.sh: Abstract reading test
	options into read_src_option function. Read skip, only,
	expensive, and xfail via read_src_option. Add timeout and
	timeout-factor options and adjust timeout variable accordingly.
	* testsuite/experimental/simd/tests/loadstore.cc: Set
	timeout-factor 2.
2021-02-03 15:49:30 +00:00
Matthias Kretz
ec384c5690 libstdc++: Abort test after 1000 lines of output
Handle overly large output by aborting the log and thus the test. This
is a similar condition to a timeout.

libstdc++-v3/ChangeLog:

	* testsuite/experimental/simd/driver.sh: When handling the pipe
	to log (and on verbose to stdout) count the lines. If it exceeds
	1000 log the issue and exit 125, which is then handled as a
	failure.
2021-02-03 15:49:30 +00:00
Matthias Kretz
b83a52fe07 libstdc++: Skip testing hypot3 for long double on PPC
std::hypot(a, b, c) is imprecise and makes this test fail even though
the failure is unrelated to simd.

libstdc++-v3/ChangeLog:

	* testsuite/experimental/simd/tests/hypot3_fma.cc: Add skip:
	markup for long double on powerpc64*.
2021-02-03 15:49:30 +00:00
Matthias Kretz
81c2c32de9 libstdc++: Fix mask reduction of simd_mask<double> on POWER7
POWER7 does not support __vector long long reductions, making the
generic _S_popcount implementation ill-formed. Specializing _S_popcount
for PPC allows optimization and avoids the issue.

libstdc++-v3/ChangeLog:

	* include/experimental/bits/simd.h: Add __have_power10vec
	conditional on _ARCH_PWR10.
	* include/experimental/bits/simd_builtin.h: Forward declare
	_MaskImplPpc and use it as _MaskImpl when __ALTIVEC__ is
	defined.
	(_MaskImplBuiltin::_S_some_of): Call _S_popcount from the
	_SuperImpl for optimizations and correctness.
	* include/experimental/bits/simd_ppc.h: Add _MaskImplPpc.
	(_MaskImplPpc::_S_popcount): Implement via vec_cntm for POWER10.
	Otherwise, for >=int use -vec_sums divided by a sizeof factor.
	For <int use -vec_sums(vec_sum4s(...)) to sum all mask entries.
2021-02-03 15:49:30 +00:00
Matthias Kretz
71f9b9bd0a libstdc++: Immediate feedback with -v
libstdc++-v3/ChangeLog:

	* testsuite/experimental/simd/driver.sh: Remove executable on
	SIGINT. Process compiler and test executable output: In verbose
	mode print messages immediately, limited to 1000 lines and
	breaking long lines to below $COLUMNS (or 1024 if not set).
	Communicating the exit status of the compiler / test with the
	necessary pipe is done via a message through stdout/-in.
2021-02-03 15:49:29 +00:00
Matthias Kretz
0a8bc61fe0 libstdc++: Fix incorrect display of old test summaries
libstdc++-v3/ChangeLog:

	* testsuite/Makefile.am: Ensure .simd.summary is empty before
	collecting a new summary.
	* testsuite/Makefile.in: Regenerate.
2021-02-03 15:49:29 +00:00
Matthias Kretz
b27ea896dd libstdc++: Fix DRIVEROPTS and TESTFLAGS processing
libstdc++-v3/ChangeLog:

	* testsuite/experimental/simd/generate_makefile.sh: Use
	different variables internally than documented for user
	overrides. This makes internal append/prepend work as intended.
2021-02-03 15:49:29 +00:00
Matthias Kretz
471b193348 libstdc++: Fix several check-simd interaction issues
libstdc++-v3/ChangeLog:

	* testsuite/experimental/simd/driver.sh (verify_test): Print
	test output on run xfail. Do not repeat lines from the log that
	were already printed on stdout.
	(test_selector): Make the compiler flags pattern usable as a
	substring selector.
	(toplevel): Trap on SIGINT and remove the log and sum files.
	Call timout with --foreground to quickly terminate on SIGINT.
	* testsuite/experimental/simd/generate_makefile.sh: Simplify run
	targets via target patterns. Default DRIVEROPTS to -v for run
	targets. Remove log and sum files after completion of the run
	target (so that it's always recompiled).
	Place help text into text file for reasonable 'make help'
	performance.
2021-02-03 15:49:29 +00:00
Matthias Kretz
abc540e30a libstdc++: Fix simd_mask<double> on POWER w/o POWER8
libstdc++-v3/ChangeLog:

	* include/experimental/bits/simd.h: Remove unnecessary static
	assertion. Allow sizeof(8) integer __intrinsic_type to enable
	the necessary mask type.
2021-02-03 15:49:29 +00:00
Matthias Kretz
db256f9bef libstdc++: Support -mlong-double-64 on PPC
libstdc++-v3/ChangeLog:

	* include/experimental/bits/simd.h: Let __intrinsic_type<long
	double, N> be valid if sizeof(long double) == sizeof(double) and
	use a __vector double as member type.
2021-02-03 15:49:29 +00:00
Matthias Kretz
4f22942841 libstdc++: Fix NEON intrinsic types usage
Intrinsics types for NEON differ from gnu::vector_size types now. This
requires explicit specializations for __intrinsic_type and a new
__is_intrinsic_type trait.

libstdc++-v3/ChangeLog:

	* include/experimental/bits/simd.h (__is_intrinsic_type): New
	internal type trait. Alias for __is_vector_type on x86.
	(_VectorTraitsImpl): Enable for __intrinsic_type in addition for
	__vector_type.
	(__intrin_bitcast): Allow casting to & from vector & intrinsic
	types.
	(__intrinsic_type): Explicitly specialize for NEON intrinsic
	vector types.
2021-02-03 15:49:29 +00:00
Matthias Kretz
aa89c53c73 libstdc++: Support skip, only, expensive, and xfail markers for simd tests
libstdc++-v3/ChangeLog:

	* testsuite/experimental/simd/driver.sh: Implement skip, only,
	expensive, and xfail markers. They can select on type, ABI tag
	subset number, target-triplet, and compiler flags.
	* testsuite/experimental/simd/generate_makefile.sh: The summary
	now includes lines for unexpected passes and expected failures.
	If the skip or only markers are only conditional on the type, do
	not generate rules for those types.
	* testsuite/experimental/simd/tests/abs.cc: Mark test expensive
	for ABI tag subsets 1-9.
	* testsuite/experimental/simd/tests/algorithms.cc: Ditto.
	* testsuite/experimental/simd/tests/broadcast.cc: Ditto.
	* testsuite/experimental/simd/tests/casts.cc: Ditto.
	* testsuite/experimental/simd/tests/generator.cc: Ditto.
	* testsuite/experimental/simd/tests/integer_operators.cc: Ditto.
	* testsuite/experimental/simd/tests/loadstore.cc: Ditto.
	* testsuite/experimental/simd/tests/mask_broadcast.cc: Ditto.
	* testsuite/experimental/simd/tests/mask_conversions.cc: Ditto.
	* testsuite/experimental/simd/tests/mask_implicit_cvt.cc: Ditto.
	* testsuite/experimental/simd/tests/mask_loadstore.cc: Ditto.
	* testsuite/experimental/simd/tests/mask_operator_cvt.cc: Ditto.
	* testsuite/experimental/simd/tests/mask_operators.cc: Ditto.
	* testsuite/experimental/simd/tests/mask_reductions.cc: Ditto.
	* testsuite/experimental/simd/tests/operator_cvt.cc: Ditto.
	* testsuite/experimental/simd/tests/operators.cc: Ditto.
	* testsuite/experimental/simd/tests/reductions.cc: Ditto.
	* testsuite/experimental/simd/tests/simd.cc: Ditto.
	* testsuite/experimental/simd/tests/split_concat.cc: Ditto.
	* testsuite/experimental/simd/tests/splits.cc: Ditto.
	* testsuite/experimental/simd/tests/where.cc: Ditto.
	* testsuite/experimental/simd/tests/fpclassify.cc: Ditto. In
	addition replace "test only floattypes" marker by unconditional
	"float|double|ldouble" only marker.
	* testsuite/experimental/simd/tests/frexp.cc: Ditto.
	* testsuite/experimental/simd/tests/hypot3_fma.cc: Ditto.
	* testsuite/experimental/simd/tests/ldexp_scalbn_scalbln_modf.cc:
	Ditto.
	* testsuite/experimental/simd/tests/logarithm.cc: Ditto.
	* testsuite/experimental/simd/tests/math_1arg.cc: Ditto.
	* testsuite/experimental/simd/tests/math_2arg.cc: Ditto.
	* testsuite/experimental/simd/tests/remqo.cc: Ditto.
	* testsuite/experimental/simd/tests/trigonometric.cc: Ditto.
	* testsuite/experimental/simd/tests/trunc_ceil_floor.cc: Ditto.
	* testsuite/experimental/simd/tests/sincos.cc: Ditto. In
	addition, xfail on run because the reference data is missing.
2021-02-03 15:49:29 +00:00
Aaron Sawdey
74f2ae3f1f Fix earlier commit missing patch review changes
Somehow I lost my fixes based on Segher's review of the p10
logical-logical fusion patch. This commit adds the changes that
should have been there before. Bootstrap/regtest passed.

gcc/ChangeLog:

	* config/rs6000/genfusion.pl (gen_2logical): Add missing
	fixes based on patch review.
	* config/rs6000/fusion.md: Regenerate file.
2021-02-03 09:34:36 -06:00
Aaron Sawdey
05c93a63a6 do not generate fusion.md, update contrib/gcc_update
In a previous fusion-combine patch for rs6000, Segher had asked me to
comment out the automatic regeneration of fusion.md. And more recently
Edelsohn pointed out that gcc_update needed to fix the timestamp of
fusion.md so it didn't get unnecessarily regenerated.

contrib/ChangeLog:

	* gcc_update (files_and_dependencies): Add dependency for
	gcc/config/rs6000/fusion.md on gcc/config/rs6000/genfusion.md.

gcc/ChangeLog:

	* config/rs6000/t-rs6000: Comment out auto generation of
	fusion.md for now.
2021-02-03 09:34:23 -06:00
Marek Polacek
25fdd0d6df c++: ICE with late parsing of noexcept in nested class [PR98899]
Here we crash with a noexcept-specifier in a nested template class,
because my handling of such deferred-parse noexcept-specifiers was
gronked when we need to instantiate a DEFERRED_PARSE before it was
actually parsed at the end of the outermost class.

In

  struct S {
    template<class> struct B {
      B() noexcept(noexcept(x));
      int x;
    };
    struct A : B<int> {
      A() : B() {}
    };
  };

we call complete_type for B<int> which triggers tsubsting S::B<int>::B()
whose noexcept-specifier still contains a DEFERRED_PARSE.  The trick is
to stash such noexcept-specifiers into DEFPARSE_INSTANTIATIONS so that
we can replace it later when we've finally parsed all deferred
noexcept-specifiers.

In passing, fix missing usage of UNPARSED_NOEXCEPT_SPEC_P.

gcc/cp/ChangeLog:

	PR c++/98899
	* parser.c (cp_parser_class_specifier_1): Use any possible
	DEFPARSE_INSTANTIATIONS to update DEFERRED_NOEXCEPT_PATTERN.
	(cp_parser_save_noexcept): Initialize DEFPARSE_INSTANTIATIONS.
	* pt.c (tsubst_exception_specification): Stash new_specs into
	DEFPARSE_INSTANTIATIONS.
	* tree.c (fixup_deferred_exception_variants): Use
	UNPARSED_NOEXCEPT_SPEC_P.

gcc/testsuite/ChangeLog:

	PR c++/98899
	* g++.dg/cpp0x/noexcept65.C: New test.
2021-02-03 09:44:18 -05:00
Andrew Stubbs
3535402e20 amdgcn: Add gfx908 support
gcc/

	* config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX908.
	* config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Add gfx908.
	(output_file_start): Add gfx908.
	* config/gcn/gcn.opt (gpu_type): Add gfx908.
	* config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Add march=gfx908.
	(MULTILIB_DIRNAMES): Add gfx908.
	* config/gcn/mkoffload.c (EF_AMDGPU_MACH_AMDGCN_GFX908): New define.
	(main): Recognize gfx908.
	* config/gcn/t-omp-device: Add gfx908.

libgomp/

	* plugin/plugin-gcn.c (EF_AMDGPU_MACH): Add
	EF_AMDGPU_MACH_AMDGCN_GFX908.
	(gcn_gfx908_s): New constant string.
	(isa_hsa_name): Add gfx908.
	(isa_code): Add gfx908.
2021-02-03 14:25:33 +00:00
Jonathan Wright
9633e57976 aarch64: Use RTL builtins for [su]mlsl_high_lane[q] intrinsics
Rewrite [su]mlsl_high_lane[q] Neon intrinsics to use RTL builtins
rather than inline assembly code, allowing for better scheduling and
optimization.

gcc/ChangeLog:

2021-02-02  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add
	[su]mlsl_hi_lane[q] builtin macro generators.
	* config/aarch64/aarch64-simd.md
	(aarch64_<su>mlsl_hi_lane<mode>_insn): Define.
	(aarch64_<su>mlsl_hi_lane<mode>): Define.
	(aarch64_<su>mlsl_hi_laneq<mode>_insn): Define.
	(aarch64_<su>mlsl_hi_laneq<mode>): Define.
	* config/aarch64/arm_neon.h (vmlsl_high_lane_s16): Use RTL
	builtin instead of inline asm.
	(vmlsl_high_lane_s32): Likewise.
	(vmlsl_high_lane_u16): Likewise.
	(vmlsl_high_lane_u32): Likewise.
	(vmlsl_high_laneq_s16): Likewise.
	(vmlsl_high_laneq_s32): Likewise.
	(vmlsl_high_laneq_u16): Likewise.
	(vmlsl_high_laneq_u32): Likewise.
	(vmlal_high_laneq_u32): Likewise.
2021-02-03 14:02:34 +00:00
Jonathan Wright
9a00ff96fa aarch64: Use RTL builtins for [su]mlal_high_lane[q] intrinsics
Rewrite [su]mlal_high_lane[q] Neon intrinsics to use RTL builtins
rather than inline assembly code, allowing for better scheduling and
optimization.

gcc/ChangeLog:

2021-02-02  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add
	[su]mlal_hi_lane[q] builtin generator macros.
	* config/aarch64/aarch64-simd.md
	(aarch64_<su>mlal_hi_lane<mode>_insn): Define.
	(aarch64_<su>mlal_hi_lane<mode>): Define.
	(aarch64_<su>mlal_hi_laneq<mode>_insn): Define.
	(aarch64_<su>mlal_hi_laneq<mode>): Define.
	* config/aarch64/arm_neon.h (vmlal_high_lane_s16): Use RTL
	builtin instead of inline asm.
	(vmlal_high_lane_s32): Likewise.
	(vmlal_high_lane_u16): Likewise.
	(vmlal_high_lane_u32): Likewise.
	(vmlal_high_laneq_s16): Likewise.
	(vmlal_high_laneq_s32): Likewise.
	(vmlal_high_laneq_u16): Likewise.
	(vmlal_high_laneq_u32): Likewise.
2021-02-03 14:01:15 +00:00
Jonathan Wright
b2c4cf7b19 aarch64: Use RTL builtins for [su]mlsl_high_n intrinsics
Rewrite [su]mlsl_high_n Neon intrinsics to use RTL builtins rather
than inline assembly code, allowing for better scheduling and
optimization.

gcc/ChangeLog:

2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_hi_n
	builtin generator macros.
	* config/aarch64/aarch64-simd.md (aarch64_<su>mlsl_hi_n<mode>_insn):
	Define.
	(aarch64_<su>mlsl_hi_n<mode>): Define.
	* config/aarch64/arm_neon.h (vmlsl_high_n_s16): Use RTL builtin
	instead of inline asm.
	(vmlsl_high_n_s32): Likewise.
	(vmlsl_high_n_u16): Likewise.
	(vmlsl_high_n_u32): Likewise.
2021-02-03 14:00:14 +00:00
Jonathan Wright
2dac658600 aarch64: Use RTL builtins for [su]mlal_high_n intrinsics
Rewrite [su]mlal_high_n Neon intrinsics to use RTL builtins rather
than inline assembly code, allowing for better scheduling and
optimization.

gcc/ChangeLog:

2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add [su]mlal_hi_n
	builtin generator macros.
	* config/aarch64/aarch64-simd.md (aarch64_<su>mlal_hi_n<mode>_insn):
	Define.
	(aarch64_<su>mlal_hi_n<mode>): Define.
	* config/aarch64/arm_neon.h (vmlal_high_n_s16): Use RTL builtin
	instead of inline asm.
	(vmlal_high_n_s32): Likewise.
	(vmlal_high_n_u16): Likewise.
	(vmlal_high_n_u32): Likewise.
2021-02-03 13:35:24 +00:00
Jonathan Wright
719877b079 aarch64: Use RTL builtins for [su]mlal_high intrinsics
Rewrite [su]mlal_high Neon intrinsics to use RTL builtins rather than
inline assembly code, allowing for better scheduling and
optimization.

gcc/ChangeLog:

2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add RTL builtin
	generator macros.
	* config/aarch64/aarch64-simd.md (*aarch64_<su>mlal_hi<mode>):
	Rename to...
	(aarch64_<su>mlal_hi<mode>_insn): This.
	(aarch64_<su>mlal_hi<mode>): Define.
	* config/aarch64/arm_neon.h (vmlal_high_s8): Use RTL builtin
	instead of inline asm.
	(vmlal_high_s16): Likewise.
	(vmlal_high_s32): Likewise.
	(vmlal_high_u8): Likewise.
	(vmlal_high_u16): Likewise.
	(vmlal_high_u32): Likewise.
2021-02-03 13:33:50 +00:00
Ilya Leoshkevich
6dc82826ba lra: clear lra_insn_recog_data after simplifying a mem subreg
Suppose we have:

    (insn (set (reg:FPRX2 70) (subreg:FPRX2 (reg/v:TF 63) 0)))

where operand_loc[0] points to r70 and operand_loc[1] points to r63.
If r63 is spilled, remove_pseudos() will change this insn to:

  (insn (set (reg:FPRX2 70)
             (subreg:FPRX2 (mem/c:TF (plus:DI (reg:DI %fp)
	                                      (const_int 144))))))

This is fine so far: rtx pointed to by operand_loc[1] has been changed
from (reg) to (mem), but its slot is still under (subreg).  However,
alter_subreg() will simplify this insn to:

  (insn (set (reg:FPRX2 70)
             (mem/c:FPRX2 (plus:DI (reg:DI %fp) (const_int 144)))))

The (subreg) is gone, and therefore operand_loc[1] is no longer valid.
This will prevent process_insn_for_elimination() from updating the spill
slot offset, causing miscompilation: different instructions will refer
to the same spill slot using different offsets.

Fix by clearing all the cached data, and not just used_insn_alternative.

gcc/ChangeLog:

2021-01-13  Ilya Leoshkevich  <iii@linux.ibm.com>

	* lra-spills.c (remove_pseudos): Call lra_update_insn_recog_data()
	after calling alter_subreg() on a (mem).
2021-02-03 13:40:19 +01:00
Martin Liska
84110515b9 Fill up padding in lto_section struct.
gcc/ChangeLog:

	PR lto/98912
	* lto-streamer-out.c (produce_lto_section): Fill up missing
	padding.
	* lto-streamer.h (struct lto_section): Add _padding field.
2021-02-03 13:18:52 +01:00
Eric Botcazou
e8c87bc07b Fix regression with partial rep clause on variant record type
It can yield an incorrect layout when there is a partial representation
clause on a discriminated record type with a variant part.

gcc/ada/
	* gcc-interface/decl.c (components_to_record): If the first component
	with rep clause is the _Parent field with variable size, temporarily
	set it aside when computing the internal layout of the REP part again.
	* gcc-interface/utils.c (finish_record_type): Revert to taking the
	maximum when merging sizes for all record types with rep clause.
	(merge_sizes): Put SPECIAL parameter last and adjust recursive calls.
2021-02-03 11:38:04 +01:00
Eric Botcazou
fc130ab54f Assorted LTO fixes for Ada
This polishes a few rough edges visible in LTO mode.

gcc/ada/
	* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Array_Type>: Make the
	two fields of the fat pointer type addressable, and do not make the
	template type read-only.
	<E_Record_Type>: If the type has discriminants mark it as may_alias.
	* gcc-interface/utils.c (make_dummy_type): Likewise.
	(build_dummy_unc_pointer_types): Likewise.
2021-02-03 11:12:50 +01:00
Tobias Burnus
e3f9f80bfa Fortran: Fix Array dependency with local coarrays [PR98913]
gcc/fortran/ChangeLog:

	PR fortran/98913
	* dependency.c (gfc_dep_resolver): Treat local access
	to coarrays like any array access in dependency analysis.

gcc/testsuite/ChangeLog:

	PR fortran/98913
	* gfortran.dg/coarray/array_temporary.f90: New test.
2021-02-03 10:34:18 +01:00
Richard Biener
1b06fcb0c9 more memory leak fixes
This fixes more memory leaks as discovered by building 521.wrf_r.

2021-02-03  Richard Biener  <rguenther@suse.de>

	* lto-streamer.c (lto_get_section_name): Free temporary
	buffer.
	* tree-loop-distribution.c
	(loop_distribution::merge_dep_scc_partitions): Free edge data.
2021-02-03 10:04:13 +01:00
Jakub Jelinek
176c7bd840 ifcvt: Avoid ICEs trying to force_operand random RTL [PR97487]
As the testcase shows, RTL ifcvt can throw random RTL (whatever it found in
some insns) at expand_binop or expand_unop and expects it to do something
(and then will check if it created valid insns and punts if not).
These functions in the end if the operands don't match try to
copy_to_mode_reg the operands, which does
if (!general_operand (x, VOIDmode))
  x = force_operand (x, temp);
but, force_operand is far from handling all possible RTLs, it will ICE for
all more unusual RTL codes.  Basically handles just simple arithmetic and
unary RTL operations if they have an optab and
expand_simple_binop/expand_simple_unop ICE on others.

The following patch fixes it by adding some operand verification (whether
there is a hope that copy_to_mode_reg will succeed on those).  It is added
both to noce_emit_move_insn (not needed for this exact testcase,
that function simply tries to recog the insn as is and if it fails,
handles some simple binop/unop cases; the patch performs the verification
of their operands) and noce_try_sign_mask.

2021-02-03  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/97487
	* ifcvt.c (noce_can_force_operand): New function.
	(noce_emit_move_insn): Use it.
	(noce_try_sign_mask): Likewise.  Formatting fix.

	* gcc.dg/pr97487-1.c: New test.
	* gcc.dg/pr97487-2.c: New test.
2021-02-03 09:10:29 +01:00
Jakub Jelinek
eb69a49c4d lra-constraints: Fix error-recovery for bad inline-asms [PR97971]
The following testcase has ice-on-invalid, it can't be reloaded, but we
shouldn't ICE the compiler because the user typed non-sense.

In current_insn_transform we have:
  if (process_alt_operands (reused_alternative_num))
    alt_p = true;

  if (check_only_p)
    return ! alt_p || best_losers != 0;

  /* If insn is commutative (it's safe to exchange a certain pair of
     operands) then we need to try each alternative twice, the second
     time matching those two operands as if we had exchanged them.  To
     do this, really exchange them in operands.

     If we have just tried the alternatives the second time, return
     operands to normal and drop through.  */

  if (reused_alternative_num < 0 && commutative >= 0)
    {
      curr_swapped = !curr_swapped;
      if (curr_swapped)
        {
          swap_operands (commutative);
          goto try_swapped;
        }
      else
        swap_operands (commutative);
    }

  if (! alt_p && ! sec_mem_p)
    {
      /* No alternative works with reloads??  */
      if (INSN_CODE (curr_insn) >= 0)
        fatal_insn ("unable to generate reloads for:", curr_insn);
      error_for_asm (curr_insn,
                     "inconsistent operand constraints in an %<asm%>");
      lra_asm_error_p = true;
...
and so handle inline asms there differently (and delete/nullify them after
this) - fatal_insn is only called for non-inline asm.
But in process_alt_operands we do:
                /* Both the earlyclobber operand and conflicting operand
                   cannot both be user defined hard registers.  */
                if (HARD_REGISTER_P (operand_reg[i])
                    && REG_USERVAR_P (operand_reg[i])
                    && operand_reg[j] != NULL_RTX
                    && HARD_REGISTER_P (operand_reg[j])
                    && REG_USERVAR_P (operand_reg[j]))
                  fatal_insn ("unable to generate reloads for "
                              "impossible constraints:", curr_insn);
and thus ICE even for inline-asms.

I think it is inappropriate to delete/nullify the insn in
process_alt_operands, as it could be done e.g. in the check_only_p mode,
so this patch just returns false in that case, which results in the
caller have alt_p false, and as inline asm isn't simple move, sec_mem_p
will be also false (and it isn't commutative either), so for check_only_p
it will suggests to the callers it isn't ok and otherwise will emit
error and delete/nullify the inline asm insn.

2021-02-03  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/97971
	* lra-constraints.c (process_alt_operands): For inline asm, don't call
	fatal_insn, but instead return false.

	* gcc.target/i386/pr97971.c: New test.
2021-02-03 09:10:29 +01:00