pr71680.c -m64 -O1 -mlra, ira output showing two problem insns.
(insn 7 5 26 3 (set (reg:SI 159 [ a ])
(mem/c:SI (reg/f:DI 158) [1 a+0 S4 A8])) pr71680.c:13 464 {*movsi_internal1}
(expr_list:REG_EQUIV (mem/c:SI (reg/f:DI 158) [1 a+0 S4 A8])
(nil)))
(insn 26 7 27 3 (set (reg:DI 162)
(unspec:DI [
(fix:SI (subreg:SF (reg:SI 159 [ a ]) 0))
] UNSPEC_FCTIWZ)) pr71680.c:13 372 {fctiwz_sf}
(expr_list:REG_DEAD (reg:SI 159 [ a ])
(nil)))
Insn 26 requires that reg 159 be of class FLOAT_REGS.
first lra action:
deleting insn with uid = 7.
Changing pseudo 159 in operand 1 of insn 26 on equiv [r158:DI]
Creating newreg=164, assigning class ALL_REGS to subreg reg r164
26: r162:DI=unspec[fix(r164:SI#0)] 7
REG_DEAD r159:SI
Inserting subreg reload before:
30: r164:SI=[r158:DI]
[snip]
Change to class FLOAT_REGS for r164
Well, that didn't do much. lra tried the equiv mem, found that didn't
work, and had to reload. Effectively getting back to the two original
insns but r159 replaced with r164. simplify_operand_subreg did not do
anything in this case because SLOW_UNALIGNED_ACCESS was true (wrongly
for power8, but that's beside the point). So now we have, using
abbreviated rtl notation:
r164:SI=[r158:DI]
r162:DI=unspec[fix(r164:SI)]
The problem here is that the first insn isn't valid, due to the rs6000
backend not supporting SImode in fprs, and r164 must be an fpr to make
the second insn valid.
next lra action:
Creating newreg=165 from oldreg=164, assigning class GENERAL_REGS to r165
30: r165:SI=[r158:DI]
Inserting insn reload after:
31: r164:SI=r165:SI
so now we have
r165:SI=[r158:DI]
r164:SI=r165:SI
r162:DI=unspec[fix(r164:SI)]
This ought to be good on power8, except for one little thing.
r165 is GENERAL_REGS so the first insn is good, a gpr load from mem.
r164 is FLOAT_REGS, making the last insn good, a fctiwz.
The second insn ought to be a sldi, mtvsrd, xscvspdpn combination, but
that is only supported for SFmode. So lra continue on reloading the
second insn, but in vain because it never tries anything other than
SImode and as noted above, SImode is not valid in fprs.
What this patch does is arrange to emit the two reloads needed for the
SLOW_UNALIGNED_ACCESS case at once, moving the subreg to the second
insn in order to switch modes, producing:
r164:SI=[r158:DI]
r165:SF=r164:SI#0
r162:DI=unspec[fix(r165:SF)]
I've also tidied a couple of other things:
1) "old" is unnecessary as it duplicated "operand".
2) Rejecting mem subregs due to SLOW_UNALIGNED_ACCESS only makes sense
if the original mode was not slow.
PR target/71680
* lra-constraints.c (simplify_operand_subreg): Allow subreg
mode for mem when SLOW_UNALIGNED_ACCESS if inner mode is also
slow. Emit two reloads for slow mem case, first loading in
fast innermode, then converting to required mode.
testsuite/
* gcc.target/powerpc/pr71680.c: New.
From-SVN: r239342
* cp-tree.h (IF_STMT_CONSTEXPR_P): New.
* name-lookup.c (push_to_top_level, pop_from_top_level_1): Handle it.
* parser.h (struct cp_parser): Add in_discarded_stmt field.
* parser.c (cp_parser_selection_statement): Handle 'if constexpr'.
(cp_parser_jump_statement): Avoid deducing from a discarded return.
* pt.c (tsubst_expr): Only instantiate taken branch of constexpr if.
* semantics.c (begin_if_stmt): Set the binding level this_entity.
(finish_if_stmt_cond): Require the condition of a
constexpr if to be constant.
* decl.c (level_for_constexpr_if): New.
(named_label_entry): Add in_constexpr_if field.
(poplevel_named_label_1): Set it.
(check_goto): Check it.
(check_previous_goto_1): Check level_for_constexpr_if.
From-SVN: r239338
gcc/ChangeLog:
2016-08-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/altivec.h (vec_extract_exp): New macro.
(vec_extract_sig): New macro.
(vec_insert_exp): New macro.
(vec_test_data_class): New macro.
(scalar_extract_exp): New macro.
(scalar_extract_sig): New macro.
(scalar_insert_exp): New macro.
(scalar_test_data_class): New macro.
(scalar_test_neg): New macro.
(scalar_cmp_exp_gt): New macro.
(scalar_cmp_exp_lt): New macro.
(scalar_cmp_exp_eq): New macro.
(scalar_cmp_exp_unordered): New macro.
* config/rs6000/predicates.md (u7bit_cint_operand): New predicate
to enforce constraint that operand is a 7-bit unsigned literal.
* config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_1): New macro
for power9 built-ins.
(BU_P9V_VSX_2): Likewise.
(BU_P9V_64BIT_VSX_2): Likewise.
(VSEEDP): Add scalar extract exponent support.
(VSEESP): Add scalar extract signature support.
(VSTDCNDP): Add scalar test negative support.
(VSTDCNSP): Likewise.
(VSIEDP): Add scalar insert exponent support.
(VSCEDPGT): Add scalar compare exponent greater than support.
(VSCEDPLT): Add scalar compare exponent less than support.
(VSCEDPEQ): Add scalar compare exponent test-for-equality support.
(VSCEDPUO): Add scalar compare exponent test-for-unordered support.
(VSTDCDP): Add scalar test data class support.
(VSTDCSP): Likewise.
(VSEEDP): Add overload support for scalar extract exponent
operation.
(VSESDP): Add overload support for scalar extract signature
operation.
(VSTDCN): Add overload support for scalar test negative
operation.
(VSTDCNDP): Add overload support for scalar test negative
operation.
(VSTDCNSP): Add overload support for scalar test negative
operation.
(VSIEDP): Add overload support for scalar insert exponent
operation.
(VSTDC): Add overload support for scalar test data class
operation.
(VSTDCDP): Add overload support for scalar test data class
operation.
(VSTDCSP): Add overload support for scalar test data class
opreation.
(VSCEDPGT): Add overload support for scalar compare exponent
greater than operation.
(VSCEDPLT): Add overload support for scalar compare exponent
less than operation.
(VSCEDPEQ): Add overload support for scalar compare exponent
test-for-equality operation.
(VSCEDPUO): Add overload support for scalar compare exponent
test-for-unordered operation.
(VEEDP): Add vector extract exponent support.
(VEESP): Likewise.
(VESDP): Add vector extract significand support.
(VESSP): Likewise.
(VIEDP): Add vector insert exponent support.
(VIESP): Likewise.
(VTDCDP): Add vector test data class support.
(VTDCSP): Likewise.
(VES): Add overload support for vector extract significand operation.
(VESDP): Likewise.
(VESSP): Likewise
(VEE): Add overload support for vector extract exponent operation.
(VEEDP): Likewise.
(VEESP): Likewise.
(VTDC): Add overload support for vector test data class operation.
(VTDCDP): Likewise.
(VTDCSP): Likewise.
(VIE): Add overload support for vector insert exponent operation.
(VIEDP): Likewise.
(VIESP): Likewise.
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
overloaded binary floating point functions.
(altivec_resolve_overloaded_builtin): Improve error messages to
distinguish between functions not supported in the current
compiler configuration and functions that were invoked with an
invalid parameter combination, and include the built-in function
name in both error messages.
* config/rs6000/rs6000-protos.h (rs6000_overloaded_builtin_name):
New prototype.
* config/rs6000/rs6000.c (rs6000_overloaded_builtin_name): New
function.
(rs6000_expand_binop_builtin): Add check to enforce that argument
2 of the test data class operations is a 7-bit unsigned literal.
(rs6000_invalid_builtin): Add code to issue an error message if a
built-in function that requires the power9_vector and -m32
command-line options is compiled without these options.
* config/rs6000/vsx.md (UNSPEC_VSX_SXEXPDP): New value.
(UNSPEC_VSX_SXSIGDP): New value.
(UNSPEC_VSX_SXSIGPDP): New value.
(UNSPEC_VSX_SIEXPDP): New value.
(UNSPEC_VSX_SCMPEXPDP): New value.
(UNSPEC_VSX_STSTDC): New value.
(UNSPEC_VSX_VXEXP): New value.
(UNSPEC_VSX_VXSIG): New value.
(UNSPEC_VSX_VIEXP): New value.
(UNSPEC_VSX_VTSTDC): New value.
(xsxexpdp): New insn for scalar extract exponent.
(xsxsigdp): New insn for scalar extract significand.
(xsiexpdp): New insn for scalar insert exponent.
(xscmpexpdp_<code>): New expansion for scalar compare exponents.
(*xscmpexpdp): New insn for scalar compare exponents.
(xststdc<Fvsx): New expansion for both single- and
double-precision scalar test data class operations.
(xststdcneg<Fvsx>): New expansion for both single- and
double-precision scalar test for negative value operations.
(*xststdc<Fvsx>): New insn for scalar test data class
operation.
(xvxexp<VSs>): New insn for single- and double-precision
vector extract exponent operation.
(xvxsig<VSs>): New insn for single- and double-precision
vector extract significand operation.
(xviexp<VSs>): New insn for single- and double-precision
vector insert exponent operation.
(xvtstdc<VSs>): New insn for single- and double-precision
vector test data class operation.
* doc/extend.texi (PowerPC AltiVec Built-in Functions): Document
built-in functions to represent the Power9 binary floating-point
support instructions.
gcc/testsuite/ChangeLog:
2016-08-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
* gcc.target/powerpc/bfp/bfp.exp: New file.
* gcc.target/powerpc/bfp/scalar-cmp-exp-eq-0.c: New test.
* gcc.target/powerpc/bfp/scalar-cmp-exp-eq-1.c: New test.
* gcc.target/powerpc/bfp/scalar-cmp-exp-eq-2.c: New test.
* gcc.target/powerpc/bfp/scalar-cmp-exp-gt-0.c: New test.
* gcc.target/powerpc/bfp/scalar-cmp-exp-gt-1.c: New test.
* gcc.target/powerpc/bfp/scalar-cmp-exp-gt-2.c: New test.
* gcc.target/powerpc/bfp/scalar-cmp-exp-lt-0.c: New test.
* gcc.target/powerpc/bfp/scalar-cmp-exp-lt-1.c: New test.
* gcc.target/powerpc/bfp/scalar-cmp-exp-lt-2.c: New test.
* gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-0.c: New test.
* gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-1.c: New test.
* gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-2.c: New test.
* gcc.target/powerpc/bfp/scalar-extract-exp-0.c: New test.
* gcc.target/powerpc/bfp/scalar-extract-exp-1.c: New test.
* gcc.target/powerpc/bfp/scalar-extract-exp-2.c: New test.
* gcc.target/powerpc/bfp/scalar-extract-sig-0.c: New test.
* gcc.target/powerpc/bfp/scalar-extract-sig-1.c: New test.
* gcc.target/powerpc/bfp/scalar-extract-sig-2.c: New test.
* gcc.target/powerpc/bfp/scalar-insert-exp-0.c: New test.
* gcc.target/powerpc/bfp/scalar-insert-exp-1.c: New test.
* gcc.target/powerpc/bfp/scalar-insert-exp-2.c: New test.
* gcc.target/powerpc/bfp/scalar-test-data-class-0.c: New test.
* gcc.target/powerpc/bfp/scalar-test-data-class-1.c: New test.
* gcc.target/powerpc/bfp/scalar-test-data-class-2.c: New test.
* gcc.target/powerpc/bfp/scalar-test-data-class-3.c: New test.
* gcc.target/powerpc/bfp/scalar-test-data-class-4.c: New test.
* gcc.target/powerpc/bfp/scalar-test-data-class-5.c: New test.
* gcc.target/powerpc/bfp/scalar-test-data-class-6.c: New test.
* gcc.target/powerpc/bfp/scalar-test-data-class-7.c: New test.
* gcc.target/powerpc/bfp/scalar-test-neg-0.c: New test.
* gcc.target/powerpc/bfp/scalar-test-neg-1.c: New test.
* gcc.target/powerpc/bfp/scalar-test-neg-2.c: New test.
* gcc.target/powerpc/bfp/scalar-test-neg-3.c: New test.
* gcc.target/powerpc/bfp/vec-extract-exp-0.c: New test.
* gcc.target/powerpc/bfp/vec-extract-exp-1.c: New test.
* gcc.target/powerpc/bfp/vec-extract-exp-2.c: New test.
* gcc.target/powerpc/bfp/vec-extract-exp-3.c: New test.
* gcc.target/powerpc/bfp/vec-extract-sig-0.c: New test.
* gcc.target/powerpc/bfp/vec-extract-sig-1.c: New test.
* gcc.target/powerpc/bfp/vec-extract-sig-2.c: New test.
* gcc.target/powerpc/bfp/vec-extract-sig-3.c: New test.
* gcc.target/powerpc/bfp/vec-insert-exp-0.c: New test.
* gcc.target/powerpc/bfp/vec-insert-exp-1.c: New test.
* gcc.target/powerpc/bfp/vec-insert-exp-2.c: New test.
* gcc.target/powerpc/bfp/vec-insert-exp-3.c: New test.
* gcc.target/powerpc/bfp/vec-test-data-class-0.c: New test.
* gcc.target/powerpc/bfp/vec-test-data-class-1.c: New test.
* gcc.target/powerpc/bfp/vec-test-data-class-2.c: New test.
* gcc.target/powerpc/bfp/vec-test-data-class-3.c: New test.
* gcc.target/powerpc/bfp/vec-test-data-class-4.c: New test.
* gcc.target/powerpc/bfp/vec-test-data-class-5.c: New test.
* gcc.target/powerpc/bfp/vec-test-data-class-6.c: New test.
* gcc.target/powerpc/bfp/vec-test-data-class-7.c: New test.
From-SVN: r239334
A new GCC warning, -Wimplicit-fallthrough, detected these three cases
where a switch case falls through to another. One of them looks like
a bug, so I fixed it; the two other look like intended fall throughs
so I just added a "fall through" comment to suppress the GCC warning.
Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu.
Reviewed-on: https://go-review.googlesource.com/26695
From-SVN: r239332
* config/aarch64/aarch64-simd.md (vec_cmp<mode><mode>): New pattern.
(vec_cmp<mode><v_cmp_result>): New pattern.
(vec_cmpu<mode><mode>): New pattern.
(vcond_mask_<mode><v_cmp_result>): New pattern.
Co-Authored-By: Bin Cheng <bin.cheng@arm.com>
Co-Authored-By: Renlin Li <renlin.li@arm.com>
From-SVN: r239327
Fix PR tree-optimization/71734
2016-08-10 Yuri Rumyantsev <ysrumyan@gmail.com>
PR tree-optimization/71734
* tree-ssa-loop-im.c (ref_indep_loop_p): Add new argument
REF_LOOP, invoke ref_indep_loop_p_1.
(outermost_indep_loop): Pass LOOP argumnet where REF was defined
to ref_indep_loop_p.
(ref_indep_loop_p_1): Fix commentary, add argument REF_LOOP,
combine it with ref_indep_lopp_p_2, update SAFELEN if only REF
is inside LOOP, do not cache dpendence value for loops with
non-zero SAFELEN.
(ref_indep_loop_p_2): Delete function.
(can_sm_ref_p): Pass LOOP as additional argument to
ref_indep_loop_p.
From-SVN: r239326
[gcc]
2016-08-10 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/72853
* config/rs6000/rs6000.c (mem_operand_ds_form): Add check for op
being an offsettable address.
[gcc/testsuite]
2016-08-10 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/72853
* gcc.target/powerpc/pr72853.c: New test.
From-SVN: r239325
Extend computation of subreg_in_class to constants and plus expressions
inside SUBREGs, before recursively calling push_reload. SYMBOL_REFs are
also CONSTANT_P, so remove explicit handling of SYMBOL_REFs.
gcc/ChangeLog
PR target/71873
* reload.c (push_reload): Compute subreg_in_class for
subregs of constants and plus expressions. Remove special
handling of SYMBOL_REFs.
gcc/testsuite/ChangeLog
PR target/71873
* gcc.target/avr/pr71873.c: New test.
From-SVN: r239321
The fallback part of HARD_REGNO_CALLER_SAVE_MODE, choose_hard_reg_mode,
returns DFmode for SImode when TARGET_E500_DOUBLE. This confuses
lra when attempting to save ctr around a call.
PR target/71680
* config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Return
SImode for TARGET_E500_DOUBLE when given SImode.
From-SVN: r239317
* gccgo.texi (Invoking gccgo): Document -fgo-optimize-allocs and
-fgo-debug-escae.
(Compiler Directives): New chapter.
(Function Names): Describe using //go:linkname. Suggest using
-fgo-pkgpath rather than -fgo-prefix.
From-SVN: r239316
Implement the go:linkname compiler directive for functions (both
function definitions and function declarations). At least for now, give
an error for code that tries to use go:linkname with a non-function.
Reviewed-on: https://go-review.googlesource.com/26651
From-SVN: r239311
* doc/gcov.texi: Change _gcov_dump to __gcov_dump and
_gcov_reset to __gcov_reset.
* doc/gcov-tool.texi: Fix typo.
* libgcov-util.c: Fix typo and GNU coding style.
From-SVN: r239307
* Makefile.in: Remove __gcov_indirect_call_profiler.
* libgcov-profiler.c (__gcov_indirect_call_profiler): Remove
function.
* libgcov.h: And the declaration of the function.
From-SVN: r239306
* value-prof.c (gimple_divmod_values_to_profile): Do not
instrument MOD histogram if a value is not a SSA name.
* gcc.dg/tree-prof/val-prof-9.c: New test.
From-SVN: r239305
* gcc.dg/tree-prof/val-prof-8.c: New test.
* value-prof.c (dump_histogram_value): Swap pow2 and non-pow2
values.
* libgcov-profiler.c (__gcov_pow2_profiler): Consider 0 as not
power of two.
From-SVN: r239304
CLONE_NEWNET is needed to compile the syscall tests on GNU/Linux.
The symbol is not defined in the CentOS 5.11 header files.
Patch from Uros Bizjak.
Reviewed-on: https://go-review.googlesource.com/26630
From-SVN: r239296
2016-08-09 Martin Jambor <mjambor@suse.cz>
PR ipa/71981
* ipa-polymorphic-call.c (get_dynamic_type): Bail out gracefully
if instance is a MEM_REF.
testsuite/
PR ipa/71981
* gcc.dg/ipa/pr71981.c: New test.
From-SVN: r239294
Rewrite the compiler directive support to recognize all the compiler
directives implemented by the current gc compiler. The directives other
than go:linkname are now turned into GOPRAGMA flags attached to a
function or function declaration. The go:linkname directive is turned
into a map attached to the Lex object. No new directives are actually
implemented yet, they are just recognized.
Reviewed-on: https://go-review.googlesource.com/26610
From-SVN: r239282
2016-08-09 Richard Biener <rguenther@suse.de>
PR tree-optimization/71802
* tree-cfgcleanup.c (cleanup_tree_cfg_bb): Make sure to catch
all merge opportunities with the predecessor.
* gcc.dg/torture/pr71802.c: New testcase.
From-SVN: r239274
2016-08-09 Richard Biener <rguenther@suse.de>
PR ipa/68273
* ipa-prop.c (ipa_modify_formal_parameters): Build
parameter types with natural alignment also for the
over-aligned case.
From-SVN: r239273
Alan Modra
Alan Modra
Jason Merrill
Kelvin Nilsen
Ian Lance Taylor
Bin Cheng
Bin Cheng
Alan Lawrence
Yuri Rumyantsev
Michael Meissner
Martin Liska
David Malcolm
Senthil Kumar Selvaraj
Ian Lance Taylor
GCC Administrator
David Wohlferd
Martin Liska
Bernd Edlinger
Renlin Li
Marek Polacek
Martin Jambor
Uros Bizjak
Matthew Fortune
Richard Biener
Jakub Jelinek