In <https://gcc.gnu.org/ml/gcc-bugs/2016-08/msg03233.html>, Nick
reported i386-elf and ia64-elf failing to build because of
float128_type_node being NULL, but being used by the back end for
__float128.
The global float128_type_node is only available conditionally, if
target hooks indicate TFmode is not only available as a scalar mode
and of the right format, but also supported in libgcc. The back-end
support, however, expects the type always to be available for
__float128 even if the libgcc support is missing.
Although a target-specific node could be restored in the case where
libgcc support is missing, it seems better to address the missing
libgcc support. Thus, this patch enables TFmode soft-fp in libgcc
globally for all x86 targets - the only special cases needed being for
targets that use soft-fp for SFmode and DFmode, one of which already
had the support for TFmode as well (so I based the i[34567]86-*-rtems*
configuration on that present for i[34567]86-*-elfiamcu). The i386
implementation of TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P is then
removed as no longer needed.
I can provide such a patch for ia64 if useful, but am not in a
position to test it (and while I'm reasonably confident that enabling
this support would be right for ia64-elf and ia64-freebsd, I've no
real idea if enabling libgcc support for TFmode, with or without also
enabling it for XFmode, would be safe for ia64-vms).
Bootstrapped with no regressions on x86_64-pc-linux-gnu.
gcc:
* config/i386/i386.c (ix86_libgcc_floating_mode_supported_p)
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Remove.
* config/i386/i386elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/lynx.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/netbsd-elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE):
Likewise.
* config/i386/netbsd64.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/nto.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/openbsd.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/rtemself.h (IX86_NO_LIBGCC_TFMODE): Likewise.
* config/i386/vxworks.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
libgcc:
* config.host (i[34567]86-*-* | x86_64-*-*): Enable TFmode soft-fp
where not already enabled.
From-SVN: r239775
* doc/gcov.texi: Change _gcov_dump to __gcov_dump and
_gcov_reset to __gcov_reset.
* doc/gcov-tool.texi: Fix typo.
* libgcov-util.c: Fix typo and GNU coding style.
From-SVN: r239307
* Makefile.in: Remove __gcov_indirect_call_profiler.
* libgcov-profiler.c (__gcov_indirect_call_profiler): Remove
function.
* libgcov.h: And the declaration of the function.
From-SVN: r239306
* gcc.dg/tree-prof/val-prof-8.c: New test.
* value-prof.c (dump_histogram_value): Swap pow2 and non-pow2
values.
* libgcov-profiler.c (__gcov_pow2_profiler): Consider 0 as not
power of two.
From-SVN: r239304
For Aurelien Jarno <aurelien@aurel32.net>
On ARM soft-float, the float to double conversion doesn't convert a sNaN
to qNaN as the IEEE Std 754 standard mandates:
"Under default exception handling, any operation signaling an invalid
operation exception and for which a floating-point result is to be
delivered shall deliver a quiet NaN."
Given the soft float ARM code ignores exceptions and always provides a
result, a float to double conversion of a signaling NaN should return a
quiet NaN. Fix this in extendsfdf2.
gcc/ChangeLog:
PR target/59833
* config/arm/ieee754-df.S (extendsfdf2): Convert sNaN to qNaN.
gcc/testsuite/ChangeLog:
* gcc.dg/pr59833.c: New testcase.
From-SVN: r238584
2016-07-11 Hale Wang <hale.wang@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/arm/lib1funcs.S: Add new wrapper.
Co-Authored-By: Andre Vieira <andre.simoesdiasvieira@arm.com>
From-SVN: r238215
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm-arches.def (armv8-m.base): Define new architecture.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise.
* config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define.
(FL_FOR_ARCH8M_MAIN): Likewise.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and
armv8-m.main+dsp to BE8_LINK_SPEC.
* config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M.
(enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN.
* config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M
Baseline and Mainline.
(arm_option_override_internal): Also disable arm_restrict_it when
!arm_arch_notm. Update comment for -munaligned-access to also cover
ARMv8-M Baseline.
(arm_file_start): Increase buffer size for printing architecture name.
* doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main
and armv8-m.main+dsp.
(mno-unaligned-access): Clarify that this is disabled by default for
ARMv8-M Baseline architectures as well.
gcc/testsuite/
* lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and
check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and
ARMv8-M Mainline architectures.
libgcc/
* config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M.
From-SVN: r238081
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
libgcc/
* config/arm/lib1funcs.S (HAVE_ARM_CLZ): Define for ARMv6* or later
and ARMv5t* rather than for a fixed list of architectures.
From-SVN: r238080
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
decide whether to prevent some libgcc routines being included for some
multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
link between this condition and the one in
libgcc/config/arm/lib1func.S.
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
__ARM_ARCH_ISA_ARM to test for Cortex-M devices.
libgcc/
* config/arm/bpabi-v6m.S: Clarify what architectures is the
implementation suitable for.
* config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases
for all Thumb-1 only targets.
(NOT_ISA_TARGET_32BIT): Define for Thumb-1 only targets.
(THUMB_LDIV0): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__.
(EQUIV): Likewise.
(ARM_FUNC_ALIAS): Likewise.
(umodsi3): Add check to __ARM_ARCH_ISA_THUMB != 1 to guard the idiv
version.
(modsi3): Likewise.
(clzsi2): Test for NOT_ISA_TARGET_32BIT rather than __ARM_ARCH_6M__.
(clzdi2): Likewise.
(ctzsi2): Likewise.
(L_interwork_call_via_rX): Test for __ARM_ARCH_ISA_ARM rather than
__ARM_ARCH_6M__ in guard for checking whether it is defined.
(final includes): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__ and add comment to indicate the connection between
this condition and the one in gcc/config/arm/elf.h.
* config/arm/libunwind.S: Test for __ARM_ARCH_ISA_THUMB and
__ARM_ARCH_ISA_ARM rather than __ARM_ARCH_6M__.
* config/arm/t-softfp: Likewise.
From-SVN: r238079
The last target to use this was i386-interix, so since that is gone we
don't need this anymore.
libgcc/ChangeLog:
2016-07-06 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* libgcc2.c (SYMBOL__MAIN): Remove checks for
CTOR_LISTS_DEFINED_EXTERNALLY.
From-SVN: r238067
gcc/ChangeLog
* config/tilegx/linux.h: Do not include arch/icache.h
(CLEAR_INSN_CACHE): Provide inlined definition directly.
* config/tilepro/linux.h: Do not include arch/icache.h
(CLEAR_INSN_CACHE): Provide inlined definition directly.
libgcc/ChangeLog
* config/tilepro/atomic.h: Do not include arch/spr_def.h and
asm/unistd.h.
(SPR_CMPEXCH_VALUE): Define for tilegx.
(__NR_FAST_cmpxchg): Define for tilepro.
(__NR_FAST_atomic_update): Define for tilepro.
(__NR_FAST_cmpxchg64): Define for tilepro.
From-SVN: r237824
libgcc/
PR libgcc/70720
* config.host (moxie-*-rtems*): Merge this stanza with other moxie
targets so the same extra_parts are built. Also have tmake_file add
on to its value rather than override.
From-SVN: r236064
[gcc]
2016-04-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/70381
* config/rs6000/rs6000.c (rs6000_opt_masks): Disable using the
target attribute and pragma from changing the -mfloat128
and -mfloat128-hardware options.
* doc/extend.texi (Additional Floating Types): Document PowerPC
__float128 restrictions.
[libgcc]
2016-04-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/70381
* configure.ac (powerpc*-*-linux*): Rework tests to build
__float128 emulation routines to not depend on using #pragma GCC
target to enable -mfloat128.
* configure: Regnerate.
[gcc/testsuite]
2016-04-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/70381
* gcc.target/powerpc/float128-1.c: New tests to make sure the
__float128 emulator is built and runs.
* gcc.target/powerpc/float128-1.c: Likewise.
* lib/target-supports.exp (check_ppc_float128_sw_available):
Rework tests for __float128 software and hardware
availability. Fix exit condition to return 0 on success.
From-SVN: r234884
2016-03-22 Michael Meissner <meissner@linux.vnet.ibm.com>
PR libgcc/70363
* config/rs6000/extendkftf2-sw.c (__extendkftf2_sw): If libgcc was
built with an assembler that does not support ISA 3.0
instructions, rename __extendkftf2_sw to __extendkftf2.
From-SVN: r234408
Martin Liska
Joseph Myers
Szabolcs Nagy
Gilles Gouaillardet
Bill Schmidt
Georg-Johann Lay
Aurelien Jarno
Nick Clifton
Hale Wang
Thomas Preud'homme
Trevor Saunders
Walter Lee
Jakub Sejdak
John David Anglin
Uros Bizjak
Aaron Conole
Nathan Sidwell
Nathan Sidwell
Sandra Loosemore
Joel Sherrill
Oleg Endo
Claudiu Zissulescu
Waldemar Brodkorb
Martin Galvan
Michael Meissner
Eric Botcazou
James Bowman
Rainer Orth