2016-07-09 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/71783
* frontend-passes.c (create_var): Always allocate a charlen
for character variables.
2016-07-09 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/71783
* gfortran.dg/dependency_46.f90: New test.
From-SVN: r238192
The FT32 binutils use a bias to distinguish between RAM and flash
addresses.
This fix adds an ASM_OUTPUT_SYMBOL_REF() that unbiases references to
RAM symbols.
Only references to RAM objects have the bias applied. Flash objects
(that is, objects in ADDR SPACE 1) are not biased, so for these no bias
should be applied. Likewise references in the gdb section need to use
the biased address, so references in debug sections are not unbiased.
gcc/ChangeLog:
2016-07-08 James Bowman <james.bowman@ftdichip.com>
* config/ft32/ft32.c (ft32_elf_encode_section_info): New function.
* config/ft32/ft32.h (ASM_OUTPUT_SYMBOL_REF): New function.
From-SVN: r238185
gcc/fortran/
* parse.c (matcha): Define.
(decode_oacc_directive): Add spec_only local var and set it. Use
matcha to parse acc directives except for routine and declare. Return
ST_GET_FCN_CHARACTERISTICS if a non-declarative directive could be
matched.
gcc/testsuite/
* gfortran.dg/goacc/pr71704.f90: New test.
From-SVN: r238171
[gcc]
2016-07-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR target/71297
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Allow standard error handling to take over when a wrong number
of arguments is presented to __builtin_vec_ld () or
__builtin_vec_st ().
[gcc/testsuite]
2016-07-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR target/71297
* gcc.target/powerpc/pr71297.c: New.
From-SVN: r238168
[gcc]
2016-07-08 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/71806
* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Do not
enable -mfloat128-hardware by default.
(ISA_3_0_MASKS_IEEE): New macro to give all of the VSX options
that IEEE 128-bit hardware support needs.
* config/rs6000/rs6000.c (rs6000_option_override_internal): If
-mcpu=power9 -mfloat128, enable -mfloat128-hardware by default.
Use ISA_3_0_MASKS_IEEE as the set of options that IEEE 128-bit
floating point requires.
* doc/invoke.texi (RS/6000 and PowerPC Options): Document
-mfloat128 and -mfloat128-hardware changes.
[gcc/testsuite]
2016-07-08 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/71806
* gcc.target/powerpc/p9-lxvx-stxvx-3.c: Add -mfloat128 option.
From-SVN: r238164
PR c++/70869
PR c++/71054
* cp-gimplify.c (cp_genericize_r): For DECL_EXPR for non-static
artificial vars, genericize their initializers.
* g++.dg/cpp0x/pr70869.C: New test.
* g++.dg/cpp0x/pr71054.C: New test.
Co-Authored-By: Kai Tietz <ktietz70@googlemail.com>
From-SVN: r238124
2016-07-07 Ed Schonberg <schonberg@adacore.com>
* exp_ch6.adb (Expand_Internal_Init_Call): Subsidiary procedure
to Expand_Protected_ Subprogram_Call, to handle properly a
call to a protected function that provides the initialization
expression for a private component of the same protected type.
* sem_ch9.adb (Analyze_Protected_Definition): Layout must be
applied to itypes generated for a private operation of a protected
type that has a formal of an anonymous access to subprogram,
because these itypes have no freeze nodes and are frozen in place.
* sem_ch4.adb (Analyze_Selected_Component): If prefix is a
protected type and it is not a current instance, do not examine
the first private component of the type.
2016-07-07 Arnaud Charlet <charlet@adacore.com>
* exp_imgv.adb, g-dynhta.adb, s-regexp.adb, s-fatgen.adb, s-poosiz.adb:
Minor removal of extra whitespace.
* einfo.ads: minor removal of repeated "as" in comment
2016-07-07 Vadim Godunko <godunko@adacore.com>
* adaint.c: Complete previous change.
From-SVN: r238117
2016-07-07 Vadim Godunko <godunko@adacore.com>
* adainit.h, adainit.c (__gnat_is_read_accessible_file): New
subprogram.
(__gnat_is_write_accessible_file): New subprogram.
* s-os_lib.ads, s-os_lib.adb (Is_Read_Accessible_File): New subprogram.
(Is_Write_Accessible_File): New subprogram.
2016-07-07 Justin Squirek <squirek@adacore.com>
* sem_ch12.adb (Install_Body): Minor refactoring in the order
of local functions.
(In_Same_Scope): Change loop condition to be more expressive.
From-SVN: r238116
2016-07-07 Gary Dismukes <dismukes@adacore.com>
* sem_ch3.adb, sem_prag.adb, sem_prag.ads, prj-ext.adb, freeze.adb,
sem_attr.adb: Minor reformatting, fix typos.
2016-07-07 Justin Squirek <squirek@adacore.com>
* sem_ch12.adb (In_Same_Scope): Created this function to check
a generic package definition against an instantiation for scope
dependancies.
(Install_Body): Add function In_Same_Scope and
amend conditional in charge of delaying the package instance.
(Is_In_Main_Unit): Add guard to check if parent is present in
assignment of Current_Unit.
From-SVN: r238115
* gfortran.dg/do_1.f90: Remove a corner case that triggers
an undefined behavior.
* gfortran.dg/do_3.F90: Likewise.
* gfortran.dg/do_check_11.f90: New test.
* gfortran.dg/do_check_12.f90: New test.
* gfortran.dg/do_corner_warn.f90: New test.
* lang.opt (Wundefined-do-loop): New option.
* resolve.c (gfc_resolve_iterator): Warn for Wundefined-do-loop.
(gfc_trans_simple_do): Generate a c-style loop.
(gfc_trans_do): Fix GNU coding style.
* invoke.texi: Mention the new warning.
From-SVN: r238114
* trans-stmt.c (gfc_trans_do): Add expect builtin for DO
loops with step bigger than +-1.
* gfortran.dg/predict-1.f90: Ammend the test.
* gfortran.dg/predict-2.f90: Likewise.
From-SVN: r238112
2016-07-07 Ed Schonberg <schonberg@adacore.com>
* sem_prag.ads, sem_prag.adb (Build_Classwide_Expression): Include
overridden operation as parameter, in order to map formals of
the overridden and overring operation properly prior to rewriting
the inherited condition.
* freeze.adb (Check_Inherited_Cnonditions): Change call to
Build_Class_Wide_Expression accordingly. In Spark_Mode, add
call to analyze the contract of the parent operation, prior to
mapping formals between operations.
2016-07-07 Arnaud Charlet <charlet@adacore.com>
* adabkend.adb (Scan_Back_End_Switches): Ignore -o/-G switches
as done in back_end.adb.
(Scan_Compiler_Args): Remove special case for CodePeer/SPARK, no longer
needed, and prevents proper handling of multi-unit sources.
2016-07-07 Thomas Quinot <quinot@adacore.com>
* g-sechas.adb, g-sechas.ads (GNAT.Secure_Hashes.H): Add Hash_Stream
type with Write primitive calling Update on the underlying context
(and dummy Read primitive raising P_E).
2016-07-07 Thomas Quinot <quinot@adacore.com>
* sem_ch13.adb: Minor reformatting.
From-SVN: r238111
2016-07-07 Yannick Moy <moy@adacore.com>
* sem_ch6.adb (Process_Formals): Set ghost flag
on formal entities of ghost subprograms.
* ghost.adb (Check_Ghost_Context.Is_OK_Ghost_Context): Accept ghost
entities in use type clauses.
From-SVN: r238106
* file-find.c (remove_prefix): New function.
* file-find.h (remove_prefix): Declare the function.
* gcc-ar.c (main): Skip a folder of the wrapper if
a wrapped binary would point to the same file.
From-SVN: r238089
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm-arches.def (armv8-m.base): Define new architecture.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise.
* config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define.
(FL_FOR_ARCH8M_MAIN): Likewise.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and
armv8-m.main+dsp to BE8_LINK_SPEC.
* config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M.
(enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN.
* config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M
Baseline and Mainline.
(arm_option_override_internal): Also disable arm_restrict_it when
!arm_arch_notm. Update comment for -munaligned-access to also cover
ARMv8-M Baseline.
(arm_file_start): Increase buffer size for printing architecture name.
* doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main
and armv8-m.main+dsp.
(mno-unaligned-access): Clarify that this is disabled by default for
ARMv8-M Baseline architectures as well.
gcc/testsuite/
* lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and
check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and
ARMv8-M Mainline architectures.
libgcc/
* config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M.
From-SVN: r238081
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
libgcc/
* config/arm/lib1funcs.S (HAVE_ARM_CLZ): Define for ARMv6* or later
and ARMv5t* rather than for a fixed list of architectures.
From-SVN: r238080
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
decide whether to prevent some libgcc routines being included for some
multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
link between this condition and the one in
libgcc/config/arm/lib1func.S.
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
__ARM_ARCH_ISA_ARM to test for Cortex-M devices.
libgcc/
* config/arm/bpabi-v6m.S: Clarify what architectures is the
implementation suitable for.
* config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases
for all Thumb-1 only targets.
(NOT_ISA_TARGET_32BIT): Define for Thumb-1 only targets.
(THUMB_LDIV0): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__.
(EQUIV): Likewise.
(ARM_FUNC_ALIAS): Likewise.
(umodsi3): Add check to __ARM_ARCH_ISA_THUMB != 1 to guard the idiv
version.
(modsi3): Likewise.
(clzsi2): Test for NOT_ISA_TARGET_32BIT rather than __ARM_ARCH_6M__.
(clzdi2): Likewise.
(ctzsi2): Likewise.
(L_interwork_call_via_rX): Test for __ARM_ARCH_ISA_ARM rather than
__ARM_ARCH_6M__ in guard for checking whether it is defined.
(final includes): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__ and add comment to indicate the connection between
this condition and the one in gcc/config/arm/elf.h.
* config/arm/libunwind.S: Test for __ARM_ARCH_ISA_THUMB and
__ARM_ARCH_ISA_ARM rather than __ARM_ARCH_6M__.
* config/arm/t-softfp: Likewise.
From-SVN: r238079
2016-07-07 Richard Biener <rguenther@suse.de>
* tree-ssa-pre.c: Include alias.h.
(compute_avail): If we have multiple VN_REFERENCEs with the
same hashtable entry adjust that to make it a valid replacement
for all of them with respect to alignment and aliasing
when doing insertion.
* tree-ssa-sccvn.h (vn_reference_operands_for_lookup): Declare.
* tree-ssa-sccvn.c (vn_reference_operands_for_lookup): New function.
From-SVN: r238078
Similar to PR70098, which is about integers in floating point registers,
we can have the completely analogous problem with vector registers as well
now that we allow integers in vector registers. So, this patch solves it
in the same way. This only works for targets with direct move.
To recap: register allocation can decide to put an integer mode value in
a floating point or vector register. If that register is used in a bd*z
instruction, which is a jump instruction, reload can not do an output
reload on it (it does not do output reloads on any jump insns), so the
float or vector register will remain, and we have to allow it here or
recog will ICE. Later on we will split this to valid instructions,
including a move from that fp/vec register to an int register; it is this
move that will still fail (PR70098) if we do not have direct move enabled.
PR target/70098
PR target/71763
* config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2,
*ctr<mode>_internal5, *ctr<mode>_internal6): Add *wi to the output
constraint.
gcc/testsuite/
PR target/70098
PR target/71763
* gcc.target/powerpc/pr71763.c: New file.
From-SVN: r238076
The last target to use this was i386-interix, so since that is gone we
don't need this anymore.
libgcc/ChangeLog:
2016-07-06 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* libgcc2.c (SYMBOL__MAIN): Remove checks for
CTOR_LISTS_DEFINED_EXTERNALLY.
From-SVN: r238067
