PR gcov-profile/7970
PR gcov-profile/16855
PR gcov-profile/44779
* g++.dg/gcov/pr16855.C: New test.
* coverage.c (build_gcov_exit_decl): New function.
(coverage_obj_init): Call the function and generate __gcov_exit
destructor.
* doc/gcov.texi: Document when __gcov_exit function is called.
* libgcov-driver.c (__gcov_init): Do not register a atexit
handler.
(__gcov_exit): Rename from gcov_exit.
* libgcov.h (__gcov_exit): Declare.
From-SVN: r240529
* configure.ac: Do not create links, only substitute the filenames.
* configure: Regenerate.
* Makefile.in: Assign the substitution results to variables.
(LIBGCC_LINKS): Define.
(enable-execute-stack.c): New rule.
(unwind.h): Likewise.
(md-unwind-support.h): Likewise.
(sfp-machine.h): Likewise.
(gthr-default.h): Likewise.
Add $(LIBGCC_LINKS) to the prerequisites of all object files and
unwind.h as prerequisite of install-unwind_h-forbuild.
From-SVN: r240312
PR libgcc/71744
* unwind-dw2-fde.c (ATOMIC_FDE_FAST_PATH): Define if __register_frame*
is not the primary registry and atomics are available.
(any_objects_registered): New variable.
(__register_frame_info_bases, __register_frame_info_table_bases):
Atomically store 1 to any_objects_registered after registering first
unwind info.
(_Unwind_Find_FDE): Return early if any_objects_registered is 0.
From-SVN: r240193
This patch arranges for half-precision complex multiply and divide
routines to be built if __LIBGCC_HAS_HF_MODE__. This will be true
if the target supports the _Float16 type.
libgcc/
PR target/63250
* Makefile.in (lib2funcs): Build _mulhc3 and _divhc3.
* libgcc2.h (LIBGCC_HAS_HF_MODE): Conditionally define.
(HFtype): Likewise.
(HCtype): Likewise.
(__divhc3): Likewise.
(__mulhc3): Likewise.
* libgcc2.c: Support _mulhc3 and _divhc3.
From-SVN: r240043
libgcc complex multiply is meant to eliminate excess
precision from certain internal values by forcing them to memory in
exactly those cases where the type has excess precision. But in
https://gcc.gnu.org/ml/gcc-patches/2014-09/msg01894.html I
accidentally inverted the logic so that values get forced to memory in
exactly the cases where it's not needed. (This is a pessimization in
the no-excess-precision case, in principle could lead to bad results
depending on code generation in the excess-precision case. Note: I do
not have a test demonstrating bad results.)
Bootstrapped with no regressions on x86_64-pc-linux-gnu. Code size
went down on x86_64 as expected; old sizes:
text data bss dec hex filename
887 0 0 887 377 _muldc3.o
810 0 0 810 32a _mulsc3.o
2032 0 0 2032 7f0 _multc3.o
983 0 0 983 3d7 _mulxc3.o
New sizes:
847 0 0 847 34f _muldc3.o
770 0 0 770 302 _mulsc3.o
2032 0 0 2032 7f0 _multc3.o
951 0 0 951 3b7 _mulxc3.o
PR libgcc/77519
* libgcc2.c (NOTRUNC): Invert settings.
From-SVN: r240033
In <https://gcc.gnu.org/ml/gcc-bugs/2016-08/msg03233.html>, Nick
reported i386-elf and ia64-elf failing to build because of
float128_type_node being NULL, but being used by the back end for
__float128.
The global float128_type_node is only available conditionally, if
target hooks indicate TFmode is not only available as a scalar mode
and of the right format, but also supported in libgcc. The back-end
support, however, expects the type always to be available for
__float128 even if the libgcc support is missing.
Although a target-specific node could be restored in the case where
libgcc support is missing, it seems better to address the missing
libgcc support. Thus, this patch enables TFmode soft-fp in libgcc
globally for all x86 targets - the only special cases needed being for
targets that use soft-fp for SFmode and DFmode, one of which already
had the support for TFmode as well (so I based the i[34567]86-*-rtems*
configuration on that present for i[34567]86-*-elfiamcu). The i386
implementation of TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P is then
removed as no longer needed.
I can provide such a patch for ia64 if useful, but am not in a
position to test it (and while I'm reasonably confident that enabling
this support would be right for ia64-elf and ia64-freebsd, I've no
real idea if enabling libgcc support for TFmode, with or without also
enabling it for XFmode, would be safe for ia64-vms).
Bootstrapped with no regressions on x86_64-pc-linux-gnu.
gcc:
* config/i386/i386.c (ix86_libgcc_floating_mode_supported_p)
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Remove.
* config/i386/i386elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/lynx.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/netbsd-elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE):
Likewise.
* config/i386/netbsd64.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/nto.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/openbsd.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/rtemself.h (IX86_NO_LIBGCC_TFMODE): Likewise.
* config/i386/vxworks.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
libgcc:
* config.host (i[34567]86-*-* | x86_64-*-*): Enable TFmode soft-fp
where not already enabled.
From-SVN: r239775
* doc/gcov.texi: Change _gcov_dump to __gcov_dump and
_gcov_reset to __gcov_reset.
* doc/gcov-tool.texi: Fix typo.
* libgcov-util.c: Fix typo and GNU coding style.
From-SVN: r239307
* Makefile.in: Remove __gcov_indirect_call_profiler.
* libgcov-profiler.c (__gcov_indirect_call_profiler): Remove
function.
* libgcov.h: And the declaration of the function.
From-SVN: r239306
* gcc.dg/tree-prof/val-prof-8.c: New test.
* value-prof.c (dump_histogram_value): Swap pow2 and non-pow2
values.
* libgcov-profiler.c (__gcov_pow2_profiler): Consider 0 as not
power of two.
From-SVN: r239304
For Aurelien Jarno <aurelien@aurel32.net>
On ARM soft-float, the float to double conversion doesn't convert a sNaN
to qNaN as the IEEE Std 754 standard mandates:
"Under default exception handling, any operation signaling an invalid
operation exception and for which a floating-point result is to be
delivered shall deliver a quiet NaN."
Given the soft float ARM code ignores exceptions and always provides a
result, a float to double conversion of a signaling NaN should return a
quiet NaN. Fix this in extendsfdf2.
gcc/ChangeLog:
PR target/59833
* config/arm/ieee754-df.S (extendsfdf2): Convert sNaN to qNaN.
gcc/testsuite/ChangeLog:
* gcc.dg/pr59833.c: New testcase.
From-SVN: r238584
2016-07-11 Hale Wang <hale.wang@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/arm/lib1funcs.S: Add new wrapper.
Co-Authored-By: Andre Vieira <andre.simoesdiasvieira@arm.com>
From-SVN: r238215
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm-arches.def (armv8-m.base): Define new architecture.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise.
* config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define.
(FL_FOR_ARCH8M_MAIN): Likewise.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and
armv8-m.main+dsp to BE8_LINK_SPEC.
* config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M.
(enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN.
* config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M
Baseline and Mainline.
(arm_option_override_internal): Also disable arm_restrict_it when
!arm_arch_notm. Update comment for -munaligned-access to also cover
ARMv8-M Baseline.
(arm_file_start): Increase buffer size for printing architecture name.
* doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main
and armv8-m.main+dsp.
(mno-unaligned-access): Clarify that this is disabled by default for
ARMv8-M Baseline architectures as well.
gcc/testsuite/
* lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and
check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and
ARMv8-M Mainline architectures.
libgcc/
* config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M.
From-SVN: r238081
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
libgcc/
* config/arm/lib1funcs.S (HAVE_ARM_CLZ): Define for ARMv6* or later
and ARMv5t* rather than for a fixed list of architectures.
From-SVN: r238080
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
decide whether to prevent some libgcc routines being included for some
multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
link between this condition and the one in
libgcc/config/arm/lib1func.S.
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
__ARM_ARCH_ISA_ARM to test for Cortex-M devices.
libgcc/
* config/arm/bpabi-v6m.S: Clarify what architectures is the
implementation suitable for.
* config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases
for all Thumb-1 only targets.
(NOT_ISA_TARGET_32BIT): Define for Thumb-1 only targets.
(THUMB_LDIV0): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__.
(EQUIV): Likewise.
(ARM_FUNC_ALIAS): Likewise.
(umodsi3): Add check to __ARM_ARCH_ISA_THUMB != 1 to guard the idiv
version.
(modsi3): Likewise.
(clzsi2): Test for NOT_ISA_TARGET_32BIT rather than __ARM_ARCH_6M__.
(clzdi2): Likewise.
(ctzsi2): Likewise.
(L_interwork_call_via_rX): Test for __ARM_ARCH_ISA_ARM rather than
__ARM_ARCH_6M__ in guard for checking whether it is defined.
(final includes): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__ and add comment to indicate the connection between
this condition and the one in gcc/config/arm/elf.h.
* config/arm/libunwind.S: Test for __ARM_ARCH_ISA_THUMB and
__ARM_ARCH_ISA_ARM rather than __ARM_ARCH_6M__.
* config/arm/t-softfp: Likewise.
From-SVN: r238079
The last target to use this was i386-interix, so since that is gone we
don't need this anymore.
libgcc/ChangeLog:
2016-07-06 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* libgcc2.c (SYMBOL__MAIN): Remove checks for
CTOR_LISTS_DEFINED_EXTERNALLY.
From-SVN: r238067
gcc/ChangeLog
* config/tilegx/linux.h: Do not include arch/icache.h
(CLEAR_INSN_CACHE): Provide inlined definition directly.
* config/tilepro/linux.h: Do not include arch/icache.h
(CLEAR_INSN_CACHE): Provide inlined definition directly.
libgcc/ChangeLog
* config/tilepro/atomic.h: Do not include arch/spr_def.h and
asm/unistd.h.
(SPR_CMPEXCH_VALUE): Define for tilegx.
(__NR_FAST_cmpxchg): Define for tilepro.
(__NR_FAST_atomic_update): Define for tilepro.
(__NR_FAST_cmpxchg64): Define for tilepro.
From-SVN: r237824
libgcc/
PR libgcc/70720
* config.host (moxie-*-rtems*): Merge this stanza with other moxie
targets so the same extra_parts are built. Also have tmake_file add
on to its value rather than override.
From-SVN: r236064
[gcc]
2016-04-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/70381
* config/rs6000/rs6000.c (rs6000_opt_masks): Disable using the
target attribute and pragma from changing the -mfloat128
and -mfloat128-hardware options.
* doc/extend.texi (Additional Floating Types): Document PowerPC
__float128 restrictions.
[libgcc]
2016-04-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/70381
* configure.ac (powerpc*-*-linux*): Rework tests to build
__float128 emulation routines to not depend on using #pragma GCC
target to enable -mfloat128.
* configure: Regnerate.
[gcc/testsuite]
2016-04-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/70381
* gcc.target/powerpc/float128-1.c: New tests to make sure the
__float128 emulator is built and runs.
* gcc.target/powerpc/float128-1.c: Likewise.
* lib/target-supports.exp (check_ppc_float128_sw_available):
Rework tests for __float128 software and hardware
availability. Fix exit condition to return 0 on success.
From-SVN: r234884
2016-03-22 Michael Meissner <meissner@linux.vnet.ibm.com>
PR libgcc/70363
* config/rs6000/extendkftf2-sw.c (__extendkftf2_sw): If libgcc was
built with an assembler that does not support ISA 3.0
instructions, rename __extendkftf2_sw to __extendkftf2.
From-SVN: r234408
2016-02-26 Paul E. Murphy <murphyp@linux.vnet.ibm.com>
Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/sfp-machine.h (_FP_DECL_EX): Declare _fpsr as a
union of u64 and double.
(FP_TRAPPING_EXCEPTIONS): Return a bitmask of trapping exceptions.
(FP_INIT_ROUNDMODE): Read the fpscr instead of writing a mystery
value.
(FP_ROUNDMODE): Update the usage of _fpscr.
Co-Authored-By: Bill Schmidt <wschmidt@linux.vnet.ibm.com>
From-SVN: r233756
gcc/
PR driver/68463
* config/gnu-user.h (CRTOFFLOADBEGIN): Define. Add crtoffloadbegin.o if
offloading is enabled and -fopenacc or -fopenmp is specified.
(CRTOFFLOADEND): Likewise.
(GNU_USER_TARGET_STARTFILE_SPEC): Add CRTOFFLOADBEGIN.
(GNU_USER_TARGET_ENDFILE_SPEC): Add CRTOFFLOADEND.
* lto-wrapper.c (offloadbegin, offloadend): Remove static vars.
(offload_objects_file_name): New static var.
(tool_cleanup): Remove offload_objects_file_name file.
(find_offloadbeginend): Replace with ...
(find_crtoffloadtable): ... this.
(run_gcc): Remove offload_argc and offload_argv.
Get offload_objects_file_name from -foffload-objects=... option.
Read names of object files with offload from this file, pass them to
compile_images_for_offload_targets. Don't call find_offloadbeginend and
don't pass offloadbegin and offloadend to the linker. Don't pass
offload non-LTO files to the linker, because now they're not claimed.
libgcc/
PR driver/68463
* Makefile.in (crtoffloadtable$(objext)): New rule.
* configure.ac (extra_parts): Add crtoffloadtable$(objext) if
enable_offload_targets is not empty.
* configure: Regenerate.
* offloadstuff.c: Move __OFFLOAD_TABLE__ from crtoffloadend to
crtoffloadtable.
libgomp/
PR driver/68463
* testsuite/libgomp.oacc-c-c++-common/parallel-dims-2.c: Remove.
lto-plugin/
PR driver/68463
* lto-plugin.c (struct plugin_offload_file): New.
(offload_files): Change type.
(offload_files_last, offload_files_last_obj): New.
(offload_files_last_lto): New.
(free_2): Adjust accordingly.
(all_symbols_read_handler): Don't add offload files to lto_arg_ptr.
Don't call free_1 for offload_files. Write names of object files with
offloading to the temporary file. Add new option to lto_arg_ptr.
(claim_file_handler): Don't claim file if it contains offload sections
without LTO sections. If it contains offload sections, add to the list.
From-SVN: r233712
Functions __muldf3_aux, __divdf3_aux, __mulsf3_aux and __divsf3_aux
don't start with leaf_entry, so they need explicit .literal_position,
otherwise libgcc build fails in the presence of --text-section-literals.
2016-02-17 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/ieee754-df.S (__muldf3_aux, __divdf3_aux): Add
.literal_position before the function.
* config/xtensa/ieee754-sf.S (__mulsf3_aux, __divsf3_aux):
Likewise.
From-SVN: r233505
libgcc/ChangeLog:
* config.host: Use t-stack and t-stack-s390 for s390*-*-linux.
* config/s390/morestack.S: New file.
* config/s390/t-stack-s390: New file.
* generic-morestack.c (__splitstack_find): Add s390-specific code.
gcc/ChangeLog:
* common/config/s390/s390-common.c (s390_supports_split_stack):
New function.
(TARGET_SUPPORTS_SPLIT_STACK): New macro.
* config/s390/s390-protos.h: Add s390_expand_split_stack_prologue.
* config/s390/s390.c (struct machine_function): New field
split_stack_varargs_pointer.
(s390_register_info): Mark r12 as clobbered if it'll be used as temp
in s390_emit_prologue.
(s390_emit_prologue): Use r12 as temp if r1 is taken by split-stack
vararg pointer.
(morestack_ref): New global.
(SPLIT_STACK_AVAILABLE): New macro.
(s390_expand_split_stack_prologue): New function.
(s390_live_on_entry): New function.
(s390_va_start): Use split-stack vararg pointer if appropriate.
(s390_asm_file_end): Emit the split-stack note sections.
(TARGET_EXTRA_LIVE_ON_ENTRY): New macro.
* config/s390/s390.md (UNSPEC_STACK_CHECK): New unspec.
(UNSPECV_SPLIT_STACK_CALL): New unspec.
(UNSPECV_SPLIT_STACK_DATA): New unspec.
(split_stack_prologue): New expand.
(split_stack_space_check): New expand.
(split_stack_data): New insn.
(split_stack_call): New expand.
(split_stack_call_*): New insn.
(split_stack_cond_call): New expand.
(split_stack_cond_call_*): New insn.
From-SVN: r233421
2016-02-03 Andreas Tobler <andreast@gcc.gnu.org>
PR bootstrap/69611
* config/rs6000/sfp-machine.h: Guard __sfp_exceptions with
__FLOAT128__ to compile only for __float128 capable targets.
From-SVN: r233111
2016-01-21 Michael Meissner <meissner@linux.vnet.ibm.com>
Steven Munroe <munroesj@linux.vnet.ibm.com>
Tulio Magno Quites Machado Filho <tulioqm@br.ibm.com>
* config/rs6000/float128-sed: New files to convert TF names to KF
names for PowerPC IEEE 128-bit floating point support.
* config/rs6000/float128-sed-hw: Likewise.
* config/rs6000/float128-hw.c: New file for ISA 3.0 IEEE 128-bit
floating point hardware support.
* config/rs6000/float128-ifunc.c: New file to pick either IEEE
128-bit floating point software emulation or use ISA 3.0 hardware
support if it is available.
* config/rs6000/quad-float128.h: New file to support IEEE 128-bit
floating point.
* config/rs6000/extendkftf2-sw.c: New file, convert IEEE 128-bit
floating point to IBM extended double.
* config/rs6000/trunctfkf2-sw.c: New file, convert IBM extended
double to IEEE 128-bit floating point.
* config/rs6000/t-float128: New Makefile fragments to enable
building __float128 emulation support.
* config/rs6000/t-float128-hw: Likewise.
* config/rs6000/sfp-exceptions.c: New file to provide exception
support for IEEE 128-bit floating point.
* config/rs6000/floattikf.c: New files for converting between IEEE
128-bit floating point and signed/unsigned 128-bit integers.
* config/rs6000/fixunskfti.c: Likewise.
* config/rs6000/fixkfti.c: Likewise.
* config/rs6000/floatuntikf.c: Likewise.
* config/rs6000/sfp-machine.h (_FP_W_TYPE_SIZE): Use 64-bit types
when building on 64-bit systems, or when VSX is enabled.
(_FP_W_TYPE): Likewise.
(_FP_WS_TYPE): Likewise.
(_FP_I_TYPE): Likewise.
(TItype): Define on 64-bit systems.
(UTItype): Likewise.
(TI_BITS): Likewise.
(_FP_MUL_MEAT_D): Add support for using 64-bit types.
(_FP_MUL_MEAT_Q): Likewise.
(_FP_DIV_MEAT_D): Likewise.
(_FP_DIV_MEAT_Q): Likewise.
(_FP_NANFRAC_D): Likewise.
(_FP_NANFRAC_Q): Likewise.
(ISA_BIT): Add exception support if we are being compiled on a
machine with hardware floating point support to build the IEEE
128-bit emulation functions.
(FP_EX_INVALID): Likewise.
(FP_EX_OVERFLOW): Likewise.
(FP_EX_UNDERFLOW): Likewise.
(FP_EX_DIVZERO): Likewise.
(FP_EX_INEXACT): Likewise.
(FP_EX_ALL): Likewise.
(__sfp_handle_exceptions): Likewise.
(FP_HANDLE_EXCEPTIONS): Likewise.
(FP_RND_NEAREST): Likewise.
(FP_RND_ZERO): Likewise.
(FP_RND_PINF): Likewise.
(FP_RND_MINF): Likewise.
(FP_RND_MASK): Likewise.
(_FP_DECL_EX): Likewise.
(FP_INIT_ROUNDMODE): Likewise.
(FP_ROUNDMODE): Likewise.
* libgcc/config.host (powerpc*-*-linux*): If compiler can compile
VSX code, enable IEEE 128-bit floating point. If the compiler can
compile IEEE 128-bit floating point code with ISA 3.0 IEEE 128-bit
floating point hardware instructions and it supports declaring
functions with the ifunc attribute, enable ifunc functions to
switch between software and hardware support.
* configure.ac (powerpc*-*-linux*): Likewise.
* configure: Regenerate.
Co-Authored-By: Steven Munroe <munroesj@linux.vnet.ibm.com>
Co-Authored-By: Tulio Magno Quites Machado Filho <tulioqm@br.ibm.com>
From-SVN: r232685
* config/msp430/t-msp430 (lib2_mul_none.o): Only use the first
dependency as the source file to be compiled.
(lib2_mul_16bit.o, lib2hw_mul_16.o, lib2hw_mul_32.o)
(lib2hw_mul_f5.o): Likewise.
From-SVN: r232402
[gcc]
2016-01-13 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-builtin.def (BU_FLOAT128_2): Add support
for pack/unpack functions for __ibm128.
(PACK_IF): Likewise.
(UNPACK_IF): Likewise.
* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
support for __ibm128 pack/unpack functions.
(rs6000_invalid_builtin): Likewise.
(rs6000_init_builtins): Likewise.
(rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.h (MASK_FLOAT128): Add short name.
(RS6000_BTM_FLOAT128): Add support for __ibm128 pack/unpack
functions
(RS6000_BTM_COMMON): Likewise.
* config/rs6000/rs6000.md (f128_vsx): New mode attribute.
(unpack<mode>): Use FMOVE128_FPR iterator instead of FMOVE128, to
disallow __builtin_{pack,unpack}_longdouble if long double is IEEE
128-bit floating point. Add support for the double values to be
in Altivec registers for TF/IF packing and unpacking, but restrict
TD packing sub-fields to be FPR registers. Don't allow overlapped
register support for packing. Allow pack inputs to be memory
locations. Don't build generator functions for unpack<mode>_dm
and unpack<mode>_nodm.
(unpack<mode>_dm): Likewise.
(unpack<mode>_nodm): Likewise.
(pack<mode>): Likewise.
* config/rs6000/rs6000-builtin.def (__builtin_pack_ibm128): Add
built-in functions to pack/unpack explicit __ibm128 values.
(__builtin_unpack_ibm128): Likewise.
* doc/extend.texi (PowerPC Built-in Functions): Document
__builtin_pack_ibm128 and __builtin_unpack_ibm128.
[libgcc]
2016-01-13 Michael Meissner <meissner@linux.vnet.ibm.com>
Steven Munroe <munroesj@linux.vnet.ibm.com>
Tulio Magno Quites Machado Filho <tulioqm@br.ibm.com>
* config/rs6000/sfp-exceptions.c: New file to provide exception
support for IEEE 128-bit floating point.
* config/rs6000/float128-hw.c: New file for ISA 3.0 IEEE 128-bit
floating point hardware support.
* config/rs6000/floattikf.c: New files for IEEE 128-bit floating
point conversions.
* config/rs6000/fixunskfti.c: Likewise.
* config/rs6000/fixkfti.c: Likewise.
* config/rs6000/floatuntikf.c: Likewise.
* config/rs6000/extendkftf2-sw.c: Likewise.
* config/rs6000/trunctfkf2-sw.c: Likewise.
* config/rs6000/float128-ifunc.c: New file to pick either IEEE
128-bit floating point software emulation or use ISA 3.0 hardware
support if it is available.
* config/rs6000/quad-float128.h: New file to support IEEE 128-bit
floating point.
* config/rs6000/t-float128: New Makefile fragments to enable
building __float128 emulation support.
* config/rs6000/t-float128-hw: Likewise.
* config/rs6000/float128-sed: New file to convert TF names to KF
names for PowerPC IEEE 128-bit floating point support.
* config/rs6000/sfp-machine.h (_FP_W_TYPE_SIZE): Use 64-bit types
when building on 64-bit systems, or when VSX is enabled.
(_FP_W_TYPE): Likewise.
(_FP_WS_TYPE): Likewise.
(_FP_I_TYPE): Likewise.
(TItype): Define on 64-bit systems.
(UTItype): Likewise.
(TI_BITS): Likewise.
(_FP_MUL_MEAT_D): Add support for using 64-bit types.
(_FP_MUL_MEAT_Q): Likewise.
(_FP_DIV_MEAT_D): Likewise.
(_FP_DIV_MEAT_Q): Likewise.
(_FP_NANFRAC_D): Likewise.
(_FP_NANFRAC_Q): Likewise.
(ISA_BIT): Add exception support if we are being compiled on a
machine with hardware floating point support to build the IEEE
128-bit emulation functions.
(FP_EX_INVALID): Likewise.
(FP_EX_OVERFLOW): Likewise.
(FP_EX_UNDERFLOW): Likewise.
(FP_EX_DIVZERO): Likewise.
(FP_EX_INEXACT): Likewise.
(FP_EX_ALL): Likewise.
(__sfp_handle_exceptions): Likewise.
(FP_HANDLE_EXCEPTIONS): Likewise.
(FP_RND_NEAREST): Likewise.
(FP_RND_ZERO): Likewise.
(FP_RND_PINF): Likewise.
(FP_RND_MINF): Likewise.
(FP_RND_MASK): Likewise.
(_FP_DECL_EX): Likewise.
(FP_INIT_ROUNDMODE): Likewise.
(FP_ROUNDMODE): Likewise.
* configure.ac (powerpc*-*-linux*): Check whether the PowerPC
compiler can do __float128.
* configure: Regenerate.
* libgcc/config.host (powerpc*-*-linux*): If compiler can compile
VSX code, enable IEEE 128-bit floating point.
From-SVN: r232346
* common/config/msp430/msp430-common.c (msp430_handle_option):
Pass both -mmcu and -mcpu on to the back end if they are both
defined.
* config/msp430/msp430.c (hwmult_name): New function.
(msp430_option_override): If an unrecognised MCU name is
detected only warn if the user has not provided suitable
-mhwmult and -mcpu options. Use msp430_warn_mcu to control
warning messages. Generate warnings about conflicts between
-mmcu and -mcpu and -mhwmult options.
If neither -mcpu nor -mmcu have been specified but -mhwmult=
f5series has the select the 430X isa.
(msp430_no_hwmult): If -mmcu has not been specified and
msp430_hwmult_type is AUTO then return true.
* config/msp430/msp430.h (EXTRA_SPEC_FUNCTIONS): Define.
(LIB_SPEC): Add hardware multiply library selection.
* config/msp430/t-msp430: Delete hardware multiply multilibs.
Add rule to build driver-msp430.o
* config/msp430/driver-msp430.c: New file.
* config/msp430/msp430.opt (warn-mcu): New option.
* doc/invoke.texi: Update description of -mhwmult=auto.
Document -mwarn-mcu option.
tests * gcc.target/msp430/msp_abi_div_funcs.c: New test.
* gcc.target/msp430/mul_main.h: New test support file.
* gcc.target/msp430/mul_none.c: New test.
* gcc.target/msp430/mul_16bit.c: New test.
* gcc.target/msp430/mul_32bit.c: New test.
* gcc.target/msp430/mul_f5.c: New test.
libgcc * config/msp430/mpy.c (__mulhi3): Use a faster algorithm.
Allow for the second argument being negative.
* config.host (extra_parts): Define for MSP430. Create separate
libraries for each of the hardware multiply formats.
* config/msp430/lib2hw_mul.S: Build only the multiply routines
that are needed.
* config/msp430/lib2mul.c: Likewise.
* config/msp430/t-msp430 (LIB2ADD): Remove lib2hw_mul.S.
Add rules to build hardware multiply libraries.
* config/msp430/lib2divSI.c: (__mspabi_divlu): Alias for
__mspabi_divul function.
(__mspabi_divllu): New stub function.
From-SVN: r231286
PR libgcc/66883
* config/epiphany/udivsi3-float.c: Fix CONCISE test, and comment typo.
N.B., this is not active code, just documenting a previous approach for this
function in C.
From-SVN: r229236
* config/rl78/divmodqi.S: Return 0x00 by default for div by 0.
* config/rl78/divmodsi.S: Update return register to r8.
* config/rl78/divmodhi.S: Update return register to r8,r9.
Branch to main_loop_done_himode to pop registers before return.
From-SVN: r228926
libgcc/
* config/ft32/crti-hw.S: Use __PMSIZE to allow configurable
memory layout. Deal correctly with BSS region larger than 32K.
Handle a watchdog reset like a power-on reset. Clean up unused
code.
From-SVN: r227986
2015-09-15 Max Filippov <jcmvbkbc@gmail.com>
gcc/
* config/xtensa/xtensa.h (DWARF_ALT_FRAME_RETURN_COLUMN): New
definition.
(DWARF_FRAME_REGISTERS): Reserve space for one extra register in
call0 ABI.
libgcc/
* config/xtensa/linux-unwind.h (xtensa_fallback_frame_state):
Add support for call0 ABI.
From-SVN: r227809
Returning context->cfa in _Unwind_GetCFA makes CFA point one stack frame
higher than what was actually used by code at context->ra. This results
in invalid CFA value in signal frames and premature unwinding completion
in forced unwinding used by uClibc NPTL thread cancellation.
Returning context->sp from _Unwind_GetCFA makes all CFA values valid and
matching code that used them.
2015-08-18 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/unwind-dw2-xtensa.c (_Unwind_GetCFA): Return
context->sp instead of context->cfa.
From-SVN: r226964
This allows having exception cleanup code in binaries that don't
register their unwind tables.
2015-08-18 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/t-windowed (LIB2ADDEH): Replace unwind-dw2-fde
with unwind-dw2-fde-dip.
From-SVN: r226963
Spilling windowed registers in userspace is much easier, more portable,
less error-prone and equally effective as in kernel. Now that register
spilling syscall is considered obsolete in the xtensa linux kernel
replace it with CALL12 followed by series of ENTRY in libgcc.
2015-08-18 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/lib2funcs.S (__xtensa_libgcc_window_spill): Use
CALL12 followed by series of ENTRY to spill windowed registers.
(__xtensa_nonlocal_goto): Call __xtensa_libgcc_window_spill
instead of making linux spill syscall.
From-SVN: r226962
Make up to 3.80 (documented as minimal permitted version) doesn't
support "else if...".
2015-07-17 Jan Beulich <jbeulich@suse.com>
* config/t-softfp: Split up "else ifneq".
From-SVN: r225920
Patch in the bottom adds support of IA MCU psABI to libgcc (enables
soft-fp) and libdecnumber (enables it for IA MCU).
config/
* dfp.m4 (enable_decimal_float): Also set to yes for
i?86*-*-elfiamcu target.
gcc/
* configure: Regenerated.
libdecnumber/
* configure: Regenerated.
libgcc/
* config.host: Support i[34567]86-*-elfiamcu target.
* config/t-softfp-sfdftf: New file.
* config/i386/32/t-iamcu: Likewise.
* configure: Regenerated.
From-SVN: r225198
* Makefile.in (real_host_noncanonical): New variable.
(libsubdir): Use it.
* configure.ac (real_host_noncanonical): Compute. Remove special
case for intelmicemul.
* configure: Regenerate.
From-SVN: r222585
On behalf of szabolcs.nagy@arm.com
2015-04-22 Gregor Richards <gregor.richards@uwaterloo.ca>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* unwind-dw2-fde-dip.c (USE_PT_GNU_EH_FRAME): Define it on
Linux if target provides dl_iterate_phdr.
Co-Authored-By: Szabolcs Nagy <szabolcs.nagy@arm.com>
From-SVN: r222328
We shouldn't call external function, __cpu_indicator_init, while an object
is being relocated since its .got.plt section hasn't been updated. It
works for non-PIE since no update on .got.plt section is required. This
patch creates libgcc.so as a linker script, hides __cpu_indicator_init
and __cpu_model in libgcc.so.1 from linker, forces linker to resolve
__cpu_indicator_init and __cpu_model to their hidden definitions in
libgcc.a while providing backward binary compatibility.
gcc/testsuite/
PR target/65612
* g++.dg/ext/mv18.C: New test.
* g++.dg/ext/mv19.C: Likewise.
* g++.dg/ext/mv20.C: Likewise.
* g++.dg/ext/mv21.C: Likewise.
* g++.dg/ext/mv22.C: Likewise.
* g++.dg/ext/mv23.C: Likewise.
libgcc/
PR target/65612
* config.host (tmake_file): Add t-slibgcc-libgcc for Linux/x86.
* config/i386/cpuinfo.c (__cpu_model): Initialize.
(__cpu_indicator_init@GCC_4.8.0): New.
(__cpu_model@GCC_4.8.0): Likewise.
* config/i386/t-linux (HOST_LIBGCC2_CFLAGS): Add
-DUSE_ELF_SYMVER.
From-SVN: r222178
* config/rl78/rl78-opts.h (enum rl78_mul_types): Add MUL_G14 and
MUL_UNINIT.
(enum rl78_cpu_type): New.
* config/rl78/rl78-virt.md (attr valloc): Add divhi and divsi.
(umulhi3_shift_virt): Remove m constraint from operand 1.
(umulqihi3_virt): Likewise.
* config/rl78/rl78.c (rl78_option_override): Add code to process
-mcpu and -mmul options.
(rl78_alloc_physical_registers): Add code to handle divhi and
divsi valloc attributes.
(set_origin): Likewise.
* config/rl78/rl78.h (RL78_MUL_G14): Define.
(TARGET_G10, TARGET_G13, TARGET_G14): Define.
(TARGET_CPU_CPP_BUILTINS): Define __RL78_MUL_xxx__ and
__RL78_Gxx__.
(ASM_SPEC): Pass -mcpu on to assembler.
* config/rl78/rl78.md (mulqi3): Add a clobber of AX.
(mulqi3_rl78): Likewise.
(mulhi3_g13): Likewise.
(mulhi3): Generate the G13 or G14 versions of the insn directly.
(mulsi3): Likewise.
(mulhi3_g14): Add clobbers of AX and BC.
(mulsi3_g14): Likewise.
(mulsi3_g13): Likewise.
(udivmodhi4, udivmodhi4_g14, udivmodsi4): New patterns.
(udivmodsi4_g14, udivmodsi4_g13): New patterns.
* config/rl78/rl78.opt (mmul): Initialise value to
RL78_MUL_UNINIT.
(mcpu): New option.
(m13, m14, mrl78): New option aliases.
* config/rl78/t-rl78 (MULTILIB_OPTIONS): Add mg13 and mg14.
(MULTILIB_DIRNAMES): Add g13 and g14.
* doc/invoke.texi: Document -mcpu and -mmul options.
* config/rl78/divmodhi.S: Add G14 and G13 versions of the __divhi3
and __modhi3 functions.
* config/rl78/divmodso.S: Add G14 and G13 versions of the
__divsi3, __udivsi3, __modsi3 and __umodsi3 functions.
From-SVN: r222142
2015-04-15 Chen Gang <gang.chen.5i5j@gmail.com>
* gthr-single.h (__GTHREAD_MUTEX_INIT_FUNCTION): Use empty
do-while loop as macro body to avoid warnings.
From-SVN: r222127
PR target/65351
config/
* mh-darwin: Only apply -mdynamic-no-pic for m32 Darwin when the compiler in
use supports -mno-dynamic-no-pic.
* picflag.m4: Only append -mno-dynamic-no-pic for Darwin when -mdynamic-no-pic
is present in CFLAGS.
libiberty/
* configure: Regenerate.
libada/
* configure: Regenerate.
libgcc/
* configure: Regenerate.
gcc/
* configure: Regenerate.
Co-Authored-By: Iain Sandoe <iain@codesourcery.com>
From-SVN: r221967
call0 is an ABI that doesn't use register windows.
2015-03-03 Max Filippov <jcmvbkbc@gmail.com>
gcc/
* config/xtensa/constraints.md ("a" constraint): Include stack
pointer in case of call0 ABI.
("q" constraint): Make empty in case of call0 ABI.
("D" constraint): Include stack pointer in case of call0 ABI.
* config/xtensa/xtensa-protos.h (xtensa_set_return_address,
xtensa_expand_epilogue, xtensa_regno_to_class): Add new function
prototypes.
* config/xtensa/xtensa.c (xtensa_callee_save_size): New
variable.
(xtensa_regno_to_class): Make it a local variable in the
function xtensa_regno_to_class.
(xtensa_function_epilogue, TARGET_ASM_FUNCTION_EPILOGUE): Remove
macro, function prototype and implementation.
(reg_nonleaf_alloc_order): Make it a local variable in the
function order_regs_for_local_alloc.
(xtensa_conditional_register_usage): New function.
(TARGET_CONDITIONAL_REGISTER_USAGE): Define macro.
(xtensa_valid_move): Allow direct moves to stack pointer
register in call0 ABI.
(xtensa_setup_frame_addresses): Only spill register windows in
windowed ABI.
(xtensa_emit_call): Emit call(x)8 or call(x)0 in windowed and
call0 ABI respectively.
(xtensa_function_arg_1): Only mark a7 register for copying in
windowed ABI.
(xtensa_call_save_reg): New function.
(compute_frame_size): Add space for callee saved register
storage to the frame size in call0 ABI.
(xtensa_expand_prologue): Generate code to set up stack frame
and save callee-saved registers in call0 ABI.
(xtensa_expand_epilogue): New function.
(xtensa_set_return_address): New function.
(xtensa_return_addr): Calculate return address in call0 ABI.
(xtensa_builtin_saveregs): Only mark a7 register for copying and
emit copying code in windowed ABI.
(order_regs_for_local_alloc): Add preferred register allocation
order for non-leaf function in call0 ABI.
(xtensa_static_chain): Add atatic chain passing for call0 ABI.
(xtensa_asm_trampoline_template): Add trampoline generation for
call0 ABI.
(xtensa_trampoline_init): Add trampoline initialization for
call0 ABI.
(xtensa_conditional_register_usage, xtensa_regno_to_class): New
functions.
* config/xtensa/xtensa.h (TARGET_WINDOWED_ABI): New macro.
(TARGET_CPU_CPP_BUILTINS): Add built-in define for call0 ABI.
(CALL_USED_REGISTERS): Modify to encode both windowed and call0
ABI call-used registers.
(HARD_FRAME_POINTER_REGNUM): Add frame pointer for call0 ABI.
(INCOMING_REGNO, OUTGOING_REGNO): Use argument unchanged in
call0 ABI.
(REG_CLASS_CONTENTS): Include all registers into the preferred
reload registers set, adjust the set in the
xtensa_conditional_register_usage.
(xtensa_regno_to_class): Drop variable declaration.
(REGNO_REG_CLASS): Redefine to use xtensa_regno_to_class
function.
(WINDOW_SIZE): Define as 8 or 0 for windowed and call0 ABI
respectively.
(FUNCTION_PROFILER): Add _mcount call for call0 ABI.
(TRAMPOLINE_SIZE): Define trampoline size for call0 ABI.
(RETURN_ADDR_IN_PREVIOUS_FRAME): Define to 0 in call0 ABI.
(ASM_OUTPUT_POOL_PROLOGUE): Always generate literal pool
location in call0 ABI.
(EH_RETURN_STACKADJ_RTX): New definition, use a10 for passing
stack adjustment size when handling exception.
(CRT_CALL_STATIC_FUNCTION): Add definition for call0 ABI.
* config/xtensa/xtensa.md (A9_REG, UNSPECV_BLOCKAGE): New
definitions.
("return" pattern): Generate ret.n/ret in call0 ABI.
("epilogue" pattern): Expand epilogue.
("nonlocal_goto" pattern): Use default in call0 ABI.
("eh_return" pattern): Move implementation to eh_set_a0_windowed,
emit eh_set_a0_* depending on ABI.
("eh_set_a0_windowed" pattern): Former eh_return pattern.
("eh_set_a0_call0", "blockage"): New patterns.
libgcc/
* config/xtensa/lib2funcs.S (__xtensa_libgcc_window_spill,
__xtensa_nonlocal_goto): Don't compile for call0 ABI.
(__xtensa_sync_caches): Only use entry and retw in windowed ABI,
use ret in call0 ABI.
* config/xtensa/t-windowed: New file.
* libgcc/config/xtensa/t-xtensa (LIB2ADDEH): Move to t-windowed.
* libgcc/configure: Regenerated.
* libgcc/configure.ac: Check if xtensa target is configured for
windowed ABI and thus needs to use custom unwind code.
From-SVN: r221158
PR target/65038
* config.in: Regenerated.
* configure: Likewise.
* configure.ac (AC_HEADER_STDC): Added explicit.
(AC_CHECK_HEADERS): Check for default headers plus
for ftw.h header.
* libgcov-util.c (gcov_read_profile_dir): Disable use
of ftw-function, if header is not found.
(ftw_read_file): Likewise.
From-SVN: r221059
