Commit Graph

16 Commits

Author SHA1 Message Date
Jakub Jelinek
99dee82307 Update copyright years. 2021-01-04 10:26:59 +01:00
Jakub Jelinek
8d9254fc8a Update copyright years.
From-SVN: r279813
2020-01-01 12:51:42 +01:00
Jakub Jelinek
a554497024 Update copyright years.
From-SVN: r267494
2019-01-01 13:31:55 +01:00
H.J. Lu
97cad5113b libitm/x86: Correct offsets of __private_tm and pointer_guard
In glibc, sysdeps/i386/nptl/tls.h has

typedef struct
{
  void *tcb;            /* Pointer to the TCB.  Not necessarily the
                           thread descriptor used by libpthread.  */
  dtv_t *dtv;
  void *self;           /* Pointer to the thread descriptor.  */
  int multiple_threads;
  uintptr_t sysinfo;
  uintptr_t stack_guard;
  uintptr_t pointer_guard;
  int gscope_flag;
  int __glibc_reserved1;
  /* Reservation of some values for the TM ABI.  */
  void *__private_tm[4];
  /* GCC split stack support.  */
  void *__private_ss;
} tcbhead_t;

and sysdeps/x86_64/nptl/tls.h has

typedef struct
{
  void *tcb;            /* Pointer to the TCB.  Not necessarily the
                           thread descriptor used by libpthread.  */
  dtv_t *dtv;
  void *self;           /* Pointer to the thread descriptor.  */
  int multiple_threads;
  int gscope_flag;
  uintptr_t sysinfo;
  uintptr_t stack_guard;
  uintptr_t pointer_guard;
  unsigned long int vgetcpu_cache[2];
  int __glibc_reserved1;
  int __glibc_unused1;
  /* Reservation of some values for the TM ABI.  */
  void *__private_tm[4];
  /* GCC split stack support.  */
  void *__private_ss;
  long int __glibc_reserved2;
  /* Must be kept even if it is no longer used by glibc since programs,
     like AddressSanitizer, depend on the size of tcbhead_t.  */
  __128bits __glibc_unused2[8][4] __attribute__ ((aligned (32)));

  void *__padding[8];
} tcbhead_t;

The offsets of __private_tm are

i386:   36 bytes
x32:    48 bytes
x86_64: 80 bytes

and the offsets of pointer_guard are:

i386:   24 bytes
x32:    28 bytes
x86_64: 48 bytes

But config/linux/x86/tls.h had

 #ifdef __x86_64__
 #ifdef __LP64__
 # define SEG_READ(OFS)          "movq\t%%fs:(" #OFS "*8),%0"
 # define SEG_WRITE(OFS)         "movq\t%0,%%fs:(" #OFS "*8)"
 # define SEG_DECODE_READ(OFS)   SEG_READ(OFS) "\n\t" \
                                 "rorq\t$17,%0\n\t" \
                                 "xorq\t%%fs:48,%0"
 # define SEG_ENCODE_WRITE(OFS)  "xorq\t%%fs:48,%0\n\t" \
                                 "rolq\t$17,%0\n\t" \
                                 SEG_WRITE(OFS)
 #else
 // For X32.
 # define SEG_READ(OFS)          "movl\t%%fs:(" #OFS "*4),%0"
 # define SEG_WRITE(OFS)         "movl\t%0,%%fs:(" #OFS "*4)"
 # define SEG_DECODE_READ(OFS)   SEG_READ(OFS) "\n\t" \
                                 "rorl\t$9,%0\n\t" \
                                 "xorl\t%%fs:24,%0"
 # define SEG_ENCODE_WRITE(OFS)  "xorl\t%%fs:24,%0\n\t" \
                                 "roll\t$9,%0\n\t" \
                                 SEG_WRITE(OFS)
 #endif
 #else
 # define SEG_READ(OFS)  "movl\t%%gs:(" #OFS "*4),%0"
 # define SEG_WRITE(OFS) "movl\t%0,%%gs:(" #OFS "*4)"
 # define SEG_DECODE_READ(OFS)   SEG_READ(OFS) "\n\t" \
                                 "rorl\t$9,%0\n\t" \
                                 "xorl\t%%gs:24,%0"
 # define SEG_ENCODE_WRITE(OFS)  "xorl\t%%gs:24,%0\n\t" \
                                 "roll\t$9,%0\n\t" \
                                 SEG_WRITE(OFS)
 #endif

static inline struct gtm_thread *gtm_thr(void)
{
  struct gtm_thread *r;
  asm volatile (SEG_READ(10) : "=r"(r));
  return r;
}

static inline void set_gtm_thr(struct gtm_thread *x)
{
  asm volatile (SEG_WRITE(10) : : "r"(x));
}

static inline struct abi_dispatch *abi_disp(void)
{
  struct abi_dispatch *r;
  asm volatile (SEG_DECODE_READ(11) : "=r"(r));
  return r;
}

static inline void set_abi_disp(struct abi_dispatch *x)
{
  void *scratch;
  asm volatile (SEG_ENCODE_WRITE(11) : "=r"(scratch) : "0"(x));
}

SEG_READ, SEG_WRITE, SEG_DECODE_READ and SEG_ENCODE_WRITE were correct
only for x86-64.

Update SEG_READ and SEG_WRITE to use the offset of __private_tm as base
and correct the offset of pointer_guard for x32.  This patch doesn't
change ABI of libitm.

	PR libitm/85988
	* config/linux/x86/tls.h (SEG_READ): Use the offset of
	__private_tm as base.
	(SEG_WRITE): Likewise.
	(SEG_ENCODE_WRITE): Correct the offset of pointer_guard for x32.
	(gtm_thr): Replace SEG_READ(10) with SEG_READ(0).
	(set_gtm_thr): Replace SEG_WRITE(10) with SEG_WRITE(0).
	(abi_disp): Replace SEG_DECODE_READ(11) with SEG_DECODE_READ(1).
	(set_abi_disp): Replace SEG_ENCODE_WRITE(11) with
	SEG_ENCODE_WRITE(1).

From-SVN: r261491
2018-06-12 04:08:52 -07:00
Jakub Jelinek
85ec4feb11 Update copyright years.
From-SVN: r256169
2018-01-03 11:03:58 +01:00
Jakub Jelinek
cbe34bb5ed Update copyright years.
From-SVN: r243994
2017-01-01 13:07:43 +01:00
Jakub Jelinek
818ab71a41 Update copyright years.
From-SVN: r232055
2016-01-04 15:30:50 +01:00
Uros Bizjak
22749d7e82 * config/linux/x86/futex_bits.h (sys_futex0): Cosmetics.
From-SVN: r224151
2015-06-05 12:57:07 +02:00
Uros Bizjak
d778b5a09c futex_bits.h (sys_futex0): Change operands "op" and "val" to int.
* config/linux/x86/futex_bits.h (sys_futex0) [__x86_64__]: Change
	operands "op" and "val" to int.

	* config/linux/sh/futex_bits.h (sys_futex0) Change operands
	"op" and "val" to int.

	* config/linux/alpha/futex_bits.h (sys_futex0) Change operands
	"op" and "val" to int.

	* config/linux/futex.cc (gtm_futex_wait, gtm_futex_wake):
	Declare as static int.
	(FUTEX_PRIVATE_FLAG): Remove L suffix.
	* config/linux/futex_bits.h (sys_futex0) Change operand "op" to int.

	Revert:
	* config/linux/x86/futex.h (sys_futex0) [!__x86_64__]:
	Change operand "op" to long.

From-SVN: r223844
2015-05-28 19:36:47 +02:00
Uros Bizjak
ea023bcfd8 futex.h (sys_futex0): Change operand "op" to long.
libgomp/ChangeLog:

	* config/linux/x86/futex.h (sys_futex0) [!__x86_64__]:
	Change operand "op" to long.
	[__PIC__]: Remove sys_futex0 function.

libitm/ChangeLog:

	* config/linux/x86/futex_bits.h (sys_futex0) [!__x86_64__]:
	Change operand "op" to long.
	[__PIC__]: Remove sys_futex0 function.

From-SVN: r223771
2015-05-27 21:35:58 +02:00
Gregor Richards
96ce40cbce libitm fixes for musl support
On behalf of Szabolcs.Nagy@arm.com

2015-04-22  Gregor Richards  <gregor.richards@uwaterloo.ca>

       * config/arm/hwcap.cc: Use fcntl.h instead of sys/fcntl.h.
       * config/linux/x86/tls.h: Only use __GLIBC_PREREQ if defined.

From-SVN: r222325
2015-04-22 14:11:25 +00:00
Jakub Jelinek
5624e564d2 Update copyright years.
From-SVN: r219188
2015-01-05 13:33:28 +01:00
Richard Sandiford
f93608e6d4 Update copyright years in libitm/
From-SVN: r206298
2014-01-02 22:26:00 +00:00
Richard Sandiford
75f9527c9b Update copyright in libitm.
From-SVN: r195697
2013-02-03 17:46:11 +00:00
Torvald Riegel
799142bf74 libitm: Fixed conversion to C++11 atomics.
libitm/
	* beginend.cc (GTM::gtm_thread::begin_transaction): Add comment.
	(GTM::gtm_thread::try_commit): Changed memory order.
	* config/linux/alpha/futex_bits.h (sys_futex0): Take atomic int
	as parameter.
	* config/linux/x86/futex_bits.h (sys_futex0): Same.
	* config/linux/sh/futex_bits.h (sys_futex0): Same.
	* config/linux/futex_bits.h (sys_futex0): Same.
	* config/linux/futex.cc (futex_wait, futex_wake): Same.
	* config/linux/futex.h (futex_wait, futex_wake): Same.
	* config/linux/rwlock.h (gtm_rwlock::writers,
	gtm_rwlock::writer_readers, gtm_rwlock::readers): Change to atomic
	ints.
	* config/linux/rwlock.cc (gtm_rwlock::read_lock,
	gtm_rwlock::write_lock_generic, gtm_rwlock::read_unlock,
	gtm_rwlock::write_unlock): Fix memory orders and fences.
	* config/posix/rwlock.cc (gtm_rwlock::read_lock,
	gtm_rwlock::write_lock_generic, gtm_rwlock::read_unlock,
	gtm_rwlock::write_unlock): Same.
	* config/linux/rwlock.h (gtm_rwlock::summary): Change to atomic int.
	* method-gl.cc (gl_mg::init, gl_wt_dispatch::memtransfer_static,
	gl_wt_dispatch::memset_static, gl_wt_dispatch::begin_or_restart):
	Add comments.
	(gl_wt_dispatch::pre_write, gl_wt_dispatch::validate,
	gl_wt_dispatch::load, gl_wt_dispatch::store,
	gl_wt_dispatch::try_commit, gl_wt_dispatch::rollback): Fix memory
	orders and fences.  Add comments.

From-SVN: r182674
2011-12-24 01:42:20 +00:00
Aldy Hernandez
0a35513e4e Merge from transactional-memory branch.
From-SVN: r181154
2011-11-08 11:13:41 +00:00