This patch makes some changes to the frame layout in order to simplify
stack probing. We want to use the save of LR as a probe in any non-leaf
function. With shrinkwrapping we may only save LR before a call, so it
is useful to define a fixed location in the callee-saves. So force LR at
the bottom of the callee-saves even with -fomit-frame-pointer.
Also remove a rarely used frame layout that saves the callee-saves first
with -fomit-frame-pointer. Doing so allows the store of LR to be used as
a valid stack probe in all frames.
gcc/
* config/aarch64/aarch64.c (aarch64_layout_frame):
Ensure LR is always stored at the bottom of the callee-saves.
Remove rarely used frame layout which saves callee-saves at top of
frame, so the store of LR can be used as a valid probe in all cases.
From-SVN: r254112
In https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01125.html Jiong
pointed out some addressing inefficiencies due to a recent change in
regcprop (https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00775.html).
This patch improves aarch64_legitimize_address_displacement to split
unaligned offsets of TImode and TFmode accesses. The resulting code
is better and no longer relies on the original regcprop optimization.
For the test we now produce:
add x1, sp, 4
stp xzr, xzr, [x1, 24]
rather than:
mov x1, sp
add x1, x1, 28
stp xzr, xzr, [x1]
gcc/
* config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
Improve unaligned TImode/TFmode base/offset split.
testsuite/
* gcc.target/aarch64/ldp_stp_unaligned_2.c: New file.
From-SVN: r254111
This patch uses df_read_modify_subreg_p to check whether writing
to a subreg would preserve some of the existing contents.
This has the effect of putting more emphasis on the
REGMODE_NATURAL_SIZE-based definition of whether something can be
partially modified, instead of using UNITS_PER_WORD unconditionally.
This becomes important for SVE, where UNITS_PER_WORD has no
significance for subregs of multi-register LD2/ST2, LD3/ST3 and
LD4/ST4 tuples.
2017-10-26 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* caller-save.c (mark_referenced_regs): Use read_modify_subreg_p.
* combine.c (find_single_use_1): Likewise.
(expand_field_assignment): Likewise.
(move_deaths): Likewise.
* lra-constraints.c (simplify_operand_subreg): Likewise.
(curr_insn_transform): Likewise.
* lra.c (collect_non_operand_hard_regs): Likewise.
(add_regs_to_insn_regno_info): Likewise.
* rtlanal.c (reg_referenced_p): Likewise.
(covers_regno_no_parallel_p): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254110
2017-10-26 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* wide-int-print.cc (print_hex): Loop based on extract_uhwi.
Don't print any bits outside the precision of the value.
* wide-int.cc (test_printing): Add some new tests.
From-SVN: r254109
After r254010 we now add -gcolumn-info by default, that means the tests
in gcc.target/arm/require-pic-register-loc.c need adjusting to not expect
to see column zero.
gcc/testsuite/
* gcc.target/arm/require-pic-register-loc.c: Use wider regex for
column information.
From-SVN: r254106
TARGET_STATIC_RTX_ALIGNMENT
This patch adds a new hook that gives the preferred alignment for
a static rtx, so that we don't need to query the front end in
force_const_mem.
2017-10-26 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* target.def (static_rtx_alignment): New hook.
* targhooks.h (default_static_rtx_alignment): Declare.
* targhooks.c (default_static_rtx_alignment): New function.
* doc/tm.texi.in (TARGET_STATIC_RTX_ALIGNMENT): New hook.
* doc/tm.texi: Regenerate.
* varasm.c (force_const_mem): Use targetm.static_rtx_alignment
instead of targetm.constant_alignment. Remove call to
set_mem_attributes.
* config/cris/cris.c (TARGET_STATIC_RTX_ALIGNMENT): Redefine.
(cris_preferred_mininum_alignment): New function, split out from...
(cris_constant_alignment): ...here.
(cris_static_rtx_alignment): New function.
* config/i386/i386.c (ix86_static_rtx_alignment): New function,
split out from...
(ix86_constant_alignment): ...here.
(TARGET_STATIC_RTX_ALIGNMENT): Redefine.
* config/mmix/mmix.c (TARGET_STATIC_RTX_ALIGNMENT): Redefine.
(mmix_static_rtx_alignment): New function.
* config/spu/spu.c (spu_static_rtx_alignment): New function.
(TARGET_STATIC_RTX_ALIGNMENT): Redefine.
From-SVN: r254102
c_parser_declaration_or_fndef has logic for parsing what might be
either a declaration or a function definition.
This patch adds a test to detect cases where a semicolon would have
terminated the decls as a declaration, where the token that follows
would start a new declaration specifier, and updates the error message
accordingly, with a fix-it hint.
This addresses PR c/7356, fixing the case of a stray token before a
#include that previously gave inscrutable output, and improving e.g.:
int i
int j;
from:
t.c:2:1: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'int'
int j;
^~~
to:
t.c:1:6: error: expected ';' before 'int'
int i
^
;
int j;
~~~
gcc.dg/noncompile/920923-1.c needs a slight update, as the output for
the first line changes from:
920923-1.c:2:14: error: expected '=', ',', ';', 'asm' or
'__attribute__' before 'unsigned'
typedef BYTE unsigned char; /* { dg-error "expected" } */
^~~~~~~~
to:
920923-1.c:2:13: error: expected ';' before 'unsigned'
typedef BYTE unsigned char; /* { dg-error "expected" } */
^~~~~~~~~
;
920923-1.c:2:1: warning: useless type name in empty declaration
typedef BYTE unsigned char; /* { dg-error "expected" } */
^~~~~~~
The patch also adds a test for PR c/44515 as a baseline.
gcc/c/ChangeLog:
PR c/7356
* c-parser.c (c_parser_declaration_or_fndef): Detect missing
semicolons.
gcc/testsuite/ChangeLog:
PR c/7356
PR c/44515
* c-c++-common/pr44515.c: New test case.
* gcc.dg/pr7356-2.c: New test case.
* gcc.dg/pr7356.c: New test case.
* gcc.dg/spellcheck-typenames.c: Update the "singed" char "TODO"
case to reflect changes to output.
* gcc.dg/noncompile/920923-1.c: Add dg-warning to reflect changes
to output.
From-SVN: r254093
Loads on RISC-V are sign-extending by default, but we weren't telling
GCC this in our PIC load patterns. This corrects the problem, and adds
a zero-extending pattern as well.
gcc/ChangeLog
2017-10-25 Palmer Dabbelt <palmer@dabbelt.com>
* config/riscv/riscv.md (ZERO_EXTEND_LOAD): Define.
* config/riscv/pic.md (local_pic_load): Rename to local_pic_load_s,
mark as a sign-extending load.
(local_pic_load_u): Define.
From-SVN: r254092
PR middle-end/82062
* fold-const.c (operand_equal_for_comparison_p): Also return true
if ARG0 is a simple variant of ARG1 with narrower precision.
(fold_ternary_loc): Always pass unstripped operands to the predicate.
From-SVN: r254089
PR libstdc++/82716
* include/std/array (tuple_size, tuple_element): Change class-key
from class to struct, to avoid annoying Clang warnings.
From-SVN: r254077
2017-10-25 Richard Biener <rguenther@suse.de>
* tree-ssa-sccvn.h (vn_eliminate): Declare.
* tree-ssa-pre.c (class eliminate_dom_walker, eliminate,
class pass_fre): Move to ...
* tree-ssa-sccvn.c (class eliminate_dom_walker, vn_eliminate,
class pass_fre): ... here and adjust for statistics.
From-SVN: r254074
2017-10-25 Tom de Vries <tom@codesourcery.com>
* gcc.dg/tree-ssa/loop-1.c: Add xfail for nvptx in scan-assembler-times
line, and add nvptx-specific version.
From-SVN: r254071
PR libstdc++/81706
* attribs.c (attribute_value_equal): Use omp_declare_simd_clauses_equal
for comparison of OMP_CLAUSEs regardless of flag_openmp{,_simd}.
(duplicate_one_attribute, copy_attributes_to_builtin): New functions.
* attribs.h (duplicate_one_attribute, copy_attributes_to_builtin): New
declarations.
* c-decl.c (merge_decls): Copy "omp declare simd" attributes from
newdecl to corresponding __builtin_ if any.
* decl.c (duplicate_decls): Copy "omp declare simd" attributes from
newdecl to corresponding __builtin_ if any.
* gcc.target/i386/pr81706.c: New test.
* g++.dg/ext/pr81706.C: New test.
From-SVN: r254069
2017-10-25 Richard Biener <rguenther@suse.de>
* tree-ssa-pre.c (need_eh_cleanup, need_ab_cleanup, el_to_remove,
el_to_fixup, el_todo, el_avail, el_avail_stack, eliminate_avail,
eliminate_push_avail, eliminate_insert): Move inside...
(class eliminate_dom_walker): ... this class in preparation
of move.
(fini_eliminate): Remove by merging with ...
(eliminate): ... this function. Adjust for class changes.
(pass_pre::execute): Remove fini_eliminate call.
(pass_fre::execute): Likewise.
From-SVN: r254068
r253236 broke AArch64 bootstrap. Earlier revision r253071 changed scheduling
behaviour on AArch64 as autopref scheduling no longer checks the base.
This patch fixes the bootstrap failure and cleans up autopref scheduling.
The code is greatly simplified. Sort accesses on the offset first, and
only if the offsets are the same fall back to other comparisons in
rank_for_schedule. This doesn't at all restore the original behaviour
since we no longer compare the base address, but it now defines a total
sorting order. More work will be required to improve the sorting so
that only loads/stores with the same base are affected.
gcc/
PR rtl-optimization/82396
* gcc/haifa-sched.c (ready_sort_real): Remove qsort workaround.
(autopref_multipass_init): Simplify initialization.
(autopref_rank_data): Simplify sort order.
* gcc/sched-int.h (autopref_multipass_data_): Remove
multi_mem_insn_p, min_offset and max_offset.
From-SVN: r254056
To fix PR60580 simplify the logic in aarch64_override_options_after_change_1 ().
If the frame pointer is enabled, set it to a special value that behaves similar
to frame pointer omission. If we don't do this all leaf functions will get a
frame pointer even if flag_omit_leaf_frame_pointer is set.
If flag_omit_frame_pointer has this special value, we must force the frame
pointer if not in a leaf function. We also need to force it in a leaf function
if flag_omit_frame_pointer is not set or if LR is used.
Doing this allows both -fomit-frame-pointer and -fomit-leaf-frame-pointer to be
independently set and changed in each function with the expected behaviour.
gcc/
PR middle-end/60580
* config/aarch64/aarch64.c (aarch64_frame_pointer_required)
Check special value of flag_omit_frame_pointer.
(aarch64_can_eliminate): Likewise.
(aarch64_override_options_after_change_1): Simplify handling of
-fomit-frame-pointer and -fomit-leaf-frame-pointer.
From-SVN: r254052
2017-10-24 Richard Biener <rguenther@suse.de>
PR tree-optimization/82697
* tree-ssa-phiopt.c (cond_store_replacement): Use alias-set
zero for conditional load and unconditional store.
* gcc.dg/torture/pr82697.c: New testcase.
From-SVN: r254047
Bootstrap GCC with Intel CET by configuring GCC with
--with-build-config="bootstrap-cet bootstrap-debug"
Tested on Linux/i686 and Linux/x86-64.
config/
* bootstrap-cet.mk: New file.
gcc/
* doc/install.texi: Document bootstrap-cet.
From-SVN: r254043
